Alex Marginean | 72f3aa5 | 2021-01-27 13:00:00 +0200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ OR X11 |
| 2 | /* |
| 3 | * NXP LS1028A-QDS device tree fragment for RCW x5xx |
| 4 | * |
Vladimir Oltean | 5041e42 | 2021-09-17 14:27:13 +0300 | [diff] [blame] | 5 | * Copyright 2019-2021 NXP |
Alex Marginean | 72f3aa5 | 2021-01-27 13:00:00 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * This setup is using SCH-28021 cards with VSC8514 QSGMII PHY in slot 2. |
| 10 | * This is only available on LS1028A QDS boards with lane B rework. |
| 11 | */ |
| 12 | &slot2 { |
| 13 | #include "fsl-sch-28021.dtsi" |
| 14 | }; |
| 15 | |
Vladimir Oltean | c32039a | 2021-06-29 20:53:11 +0300 | [diff] [blame] | 16 | &enetc2 { |
| 17 | status = "okay"; |
| 18 | }; |
| 19 | |
Alex Marginean | 72f3aa5 | 2021-01-27 13:00:00 +0200 | [diff] [blame] | 20 | &mscc_felix { |
| 21 | status = "okay"; |
| 22 | }; |
| 23 | |
| 24 | &mscc_felix_port0 { |
| 25 | status = "okay"; |
| 26 | phy-mode = "qsgmii"; |
| 27 | phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>; |
| 28 | }; |
| 29 | |
| 30 | &mscc_felix_port1 { |
| 31 | status = "okay"; |
| 32 | phy-mode = "qsgmii"; |
| 33 | phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>; |
| 34 | }; |
| 35 | |
| 36 | &mscc_felix_port2 { |
| 37 | status = "okay"; |
| 38 | phy-mode = "qsgmii"; |
| 39 | phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>; |
| 40 | }; |
| 41 | |
| 42 | &mscc_felix_port3 { |
| 43 | status = "okay"; |
| 44 | phy-mode = "qsgmii"; |
| 45 | phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>; |
| 46 | }; |
Vladimir Oltean | c32039a | 2021-06-29 20:53:11 +0300 | [diff] [blame] | 47 | |
| 48 | &mscc_felix_port4 { |
| 49 | ethernet = <&enetc2>; |
| 50 | status = "okay"; |
| 51 | }; |