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git01.mediatek.com / filogic / uboot / 5b8577db0604e3b9e2ce61e86e6a1a2590cac537 / . / configs / Yones_Toptech_BD1078_defconfig
blob: 9b13659bccd203925026ee1fcbdb3c430bd47dbe [file] [log] [blame]
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SUNXI=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]3CONFIG_DEFAULT_DEVICE_TREE="sun7i-a20-yones-toptech-bd1078"
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]4CONFIG_SPL=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]5CONFIG_MACH_SUN7I=y
6CONFIG_DRAM_CLK=408
Samuel Holland51951052021-09-12 10:28:35 -0500[diff] [blame]7CONFIG_MMC1_PINS_PH=y
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]8CONFIG_MMC_SUNXI_SLOT_EXTRA=1
Paul Kocialkowskid1a8d5b2015-03-22 18:12:24 +0100[diff] [blame]9CONFIG_USB0_VBUS_PIN="PB9"
Hans de Goede3ae1d132015-04-25 17:25:14 +0200[diff] [blame]10CONFIG_AXP_GPIO=y
Paul Kocialkowskid1a8d5b2015-03-22 18:12:24 +0100[diff] [blame]11CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:24,pclk_khz:63000,le:32,ri:287,up:22,lo:12,hs:1,vs:1,sync:3,vmode:0"
12CONFIG_VIDEO_LCD_DCLK_PHASE=0
Paul Kocialkowskid1a8d5b2015-03-22 18:12:24 +0100[diff] [blame]13CONFIG_VIDEO_LCD_POWER="PH8"
14CONFIG_VIDEO_LCD_BL_EN="PH7"
15CONFIG_VIDEO_LCD_BL_PWM="PB2"
Joe Hershbergera274ded2015-05-12 14:46:24 -0500[diff] [blame]16# CONFIG_VIDEO_LCD_BL_PWM_ACTIVE_LOW is not set
17CONFIG_VIDEO_LCD_PANEL_LVDS=y
Joe Hershberger17491a82015-06-22 16:15:29 -0500[diff] [blame]18# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]19CONFIG_SPL_I2C=y
Tom Rini8825ec42021-08-17 17:59:47 -0400[diff] [blame]20CONFIG_SYS_I2C_MVTWSI=y
Tom Rinia6e29232021-08-18 23:12:32 -0400[diff] [blame]21CONFIG_SYS_I2C_SLAVE=0x7f
22CONFIG_SYS_I2C_SPEED=400000
Samuel Holland2b6e2642023-01-22 17:46:21 -0600[diff] [blame]23CONFIG_REGULATOR_AXP_USB_POWER=y
Simon Glass2347daa2015-08-19 09:33:42 -0600[diff] [blame]24CONFIG_USB_MUSB_HOST=y