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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
maxims@google.com750875c2017-04-17 12:00:24 -07002/*
3 * Copyright 2017 Google, Inc
Chia-Wei, Wangacc78362020-10-15 10:25:13 +08004 * Copyright 2020 ASPEED Technology Inc.
maxims@google.com750875c2017-04-17 12:00:24 -07005 */
6
7#include <common.h>
8#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06009#include <log.h>
maxims@google.com750875c2017-04-17 12:00:24 -070010#include <misc.h>
11#include <reset.h>
12#include <reset-uclass.h>
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080013#include <linux/err.h>
maxims@google.com750875c2017-04-17 12:00:24 -070014#include <asm/io.h>
15#include <asm/arch/scu_ast2500.h>
maxims@google.com750875c2017-04-17 12:00:24 -070016
maxims@google.com750875c2017-04-17 12:00:24 -070017struct ast2500_reset_priv {
maxims@google.com750875c2017-04-17 12:00:24 -070018 struct ast2500_scu *scu;
19};
20
maxims@google.com750875c2017-04-17 12:00:24 -070021static int ast2500_reset_assert(struct reset_ctl *reset_ctl)
22{
23 struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080024 struct ast2500_scu *scu = priv->scu;
maxims@google.com750875c2017-04-17 12:00:24 -070025
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080026 debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
maxims@google.com750875c2017-04-17 12:00:24 -070027
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080028 if (reset_ctl->id < 32)
29 setbits_le32(&scu->sysreset_ctrl1, BIT(reset_ctl->id));
30 else
31 setbits_le32(&scu->sysreset_ctrl2, BIT(reset_ctl->id - 32));
maxims@google.com750875c2017-04-17 12:00:24 -070032
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080033 return 0;
maxims@google.com750875c2017-04-17 12:00:24 -070034}
35
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080036static int ast2500_reset_deassert(struct reset_ctl *reset_ctl)
maxims@google.com750875c2017-04-17 12:00:24 -070037{
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080038 struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
39 struct ast2500_scu *scu = priv->scu;
40
41 debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
42
43 if (reset_ctl->id < 32)
44 clrbits_le32(&scu->sysreset_ctrl1, BIT(reset_ctl->id));
45 else
46 clrbits_le32(&scu->sysreset_ctrl2, BIT(reset_ctl->id - 32));
maxims@google.com750875c2017-04-17 12:00:24 -070047
48 return 0;
49}
50
51static int ast2500_reset_probe(struct udevice *dev)
52{
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080053 int rc;
maxims@google.com750875c2017-04-17 12:00:24 -070054 struct ast2500_reset_priv *priv = dev_get_priv(dev);
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080055 struct udevice *scu_dev;
56
57 /* get SCU base from clock device */
58 rc = uclass_get_device_by_driver(UCLASS_CLK,
Simon Glass65130cd2020-12-28 20:34:56 -070059 DM_DRIVER_GET(aspeed_ast2500_scu), &scu_dev);
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080060 if (rc) {
61 debug("%s: clock device not found, rc=%d\n", __func__, rc);
62 return rc;
63 }
maxims@google.com750875c2017-04-17 12:00:24 -070064
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080065 priv->scu = devfdt_get_addr_ptr(scu_dev);
66 if (IS_ERR_OR_NULL(priv->scu)) {
67 debug("%s: invalid SCU base pointer\n", __func__);
68 return PTR_ERR(priv->scu);
69 }
maxims@google.com750875c2017-04-17 12:00:24 -070070
71 return 0;
72}
73
74static const struct udevice_id ast2500_reset_ids[] = {
75 { .compatible = "aspeed,ast2500-reset" },
76 { }
77};
78
79struct reset_ops ast2500_reset_ops = {
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080080 .rst_assert = ast2500_reset_assert,
81 .rst_deassert = ast2500_reset_deassert,
maxims@google.com750875c2017-04-17 12:00:24 -070082};
83
84U_BOOT_DRIVER(ast2500_reset) = {
Chia-Wei, Wangacc78362020-10-15 10:25:13 +080085 .name = "ast2500_reset",
86 .id = UCLASS_RESET,
maxims@google.com750875c2017-04-17 12:00:24 -070087 .of_match = ast2500_reset_ids,
88 .probe = ast2500_reset_probe,
89 .ops = &ast2500_reset_ops,
Simon Glass8a2b47f2020-12-03 16:55:17 -070090 .priv_auto = sizeof(struct ast2500_reset_priv),
maxims@google.com750875c2017-04-17 12:00:24 -070091};