Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. |
| 4 | * |
| 5 | * Wolfgang Denk <wd@denx.de> |
| 6 | * Copyright 2004 Freescale Semiconductor. |
| 7 | * (C) Copyright 2002,2003 Motorola,Inc. |
| 8 | * Xianghua Xiao <X.Xiao@motorola.com> |
| 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
| 29 | /* |
| 30 | * Socrates |
| 31 | */ |
| 32 | |
| 33 | #ifndef __CONFIG_H |
| 34 | #define __CONFIG_H |
| 35 | |
u-boot@bugs.denx.de | f0421ec | 2008-09-11 15:40:01 +0200 | [diff] [blame] | 36 | /* new uImage format support */ |
| 37 | #define CONFIG_FIT 1 |
| 38 | #define CONFIG_OF_LIBFDT 1 |
| 39 | #define CONFIG_FIT_VERBOSE 1 /* enable fit_format_{error,warning}() */ |
| 40 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 41 | /* High Level Configuration Options */ |
| 42 | #define CONFIG_BOOKE 1 /* BOOKE */ |
| 43 | #define CONFIG_E500 1 /* BOOKE e500 family */ |
| 44 | #define CONFIG_MPC85xx 1 /* MPC8540/60/55/41 */ |
| 45 | #define CONFIG_MPC8544 1 |
| 46 | #define CONFIG_SOCRATES 1 |
| 47 | |
| 48 | #define CONFIG_PCI |
| 49 | |
| 50 | #define CONFIG_TSEC_ENET /* tsec ethernet support */ |
| 51 | |
| 52 | #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 53 | #define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_r */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 54 | |
| 55 | #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ |
| 56 | |
| 57 | /* |
| 58 | * Only possible on E500 Version 2 or newer cores. |
| 59 | */ |
| 60 | #define CONFIG_ENABLE_36BIT_PHYS 1 |
| 61 | |
| 62 | /* |
| 63 | * sysclk for MPC85xx |
| 64 | * |
| 65 | * Two valid values are: |
| 66 | * 33000000 |
| 67 | * 66000000 |
| 68 | * |
| 69 | * Most PCI cards are still 33Mhz, so in the presence of PCI, 33MHz |
| 70 | * is likely the desired value here, so that is now the default. |
| 71 | * The board, however, can run at 66MHz. In any event, this value |
| 72 | * must match the settings of some switches. Details can be found |
| 73 | * in the README.mpc85xxads. |
| 74 | */ |
| 75 | |
| 76 | #ifndef CONFIG_SYS_CLK_FREQ |
| 77 | #define CONFIG_SYS_CLK_FREQ 66666666 |
| 78 | #endif |
| 79 | |
| 80 | /* |
| 81 | * These can be toggled for performance analysis, otherwise use default. |
| 82 | */ |
| 83 | #define CONFIG_L2_CACHE /* toggle L2 cache */ |
| 84 | #define CONFIG_BTB /* toggle branch predition */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 85 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 86 | #define CONFIG_SYS_INIT_DBCR DBCR_IDM /* Enable Debug Exceptions */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 87 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 88 | #undef CONFIG_SYS_DRAM_TEST /* memory test, takes time */ |
| 89 | #define CONFIG_SYS_MEMTEST_START 0x00400000 |
| 90 | #define CONFIG_SYS_MEMTEST_END 0x00C00000 |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 91 | |
| 92 | /* |
| 93 | * Base addresses -- Note these are effective addresses where the |
| 94 | * actual resources get mapped (not physical addresses) |
| 95 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 96 | #define CONFIG_SYS_CCSRBAR_DEFAULT 0xFF700000 /* CCSRBAR Default */ |
| 97 | #define CONFIG_SYS_CCSRBAR 0xE0000000 /* relocated CCSRBAR */ |
| 98 | #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of CCSRBAR */ |
| 99 | #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses CONFIG_SYS_IMMR */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 100 | |
Kumar Gala | 01135a8 | 2008-08-26 22:56:56 -0500 | [diff] [blame] | 101 | /* DDR Setup */ |
| 102 | #define CONFIG_FSL_DDR2 |
| 103 | #undef CONFIG_FSL_DDR_INTERACTIVE |
| 104 | #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ |
| 105 | #define CONFIG_DDR_SPD |
| 106 | |
| 107 | #undef CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */ |
| 108 | #define CONFIG_MEM_INIT_VALUE 0xDeadBeef |
| 109 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 110 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 |
| 111 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
Kumar Gala | 01135a8 | 2008-08-26 22:56:56 -0500 | [diff] [blame] | 112 | #define CONFIG_VERY_BIG_RAM |
| 113 | |
| 114 | #define CONFIG_NUM_DDR_CONTROLLERS 1 |
| 115 | #define CONFIG_DIMM_SLOTS_PER_CTLR 1 |
| 116 | #define CONFIG_CHIP_SELECTS_PER_CTRL 2 |
| 117 | |
| 118 | /* I2C addresses of SPD EEPROMs */ |
Anatolij Gustschin | 2c04bc3 | 2008-09-17 11:45:51 +0200 | [diff] [blame] | 119 | #define SPD_EEPROM_ADDRESS 0x50 /* CTLR 0 DIMM 0 */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 120 | |
| 121 | #define CONFIG_DDR_DEFAULT_CL 30 /* CAS latency 3 */ |
| 122 | |
| 123 | /* Hardcoded values, to use instead of SPD */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 124 | #define CONFIG_SYS_DDR_CS0_BNDS 0x0000000f |
| 125 | #define CONFIG_SYS_DDR_CS0_CONFIG 0x80010102 |
| 126 | #define CONFIG_SYS_DDR_TIMING_0 0x00260802 |
| 127 | #define CONFIG_SYS_DDR_TIMING_1 0x3935D322 |
| 128 | #define CONFIG_SYS_DDR_TIMING_2 0x14904CC8 |
| 129 | #define CONFIG_SYS_DDR_MODE 0x00480432 |
| 130 | #define CONFIG_SYS_DDR_INTERVAL 0x030C0100 |
| 131 | #define CONFIG_SYS_DDR_CONFIG_2 0x04400000 |
| 132 | #define CONFIG_SYS_DDR_CONFIG 0xC3008000 |
| 133 | #define CONFIG_SYS_DDR_CLK_CONTROL 0x03800000 |
| 134 | #define CONFIG_SYS_SDRAM_SIZE 256 /* in Megs */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 135 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 136 | /* |
| 137 | * Flash on the LocalBus |
| 138 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 139 | #define CONFIG_SYS_LBC_CACHE_BASE 0xf0000000 /* Localbus cacheable */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 140 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_FLASH0 0xFE000000 |
| 142 | #define CONFIG_SYS_FLASH1 0xFC000000 |
| 143 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 } |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 144 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 145 | #define CONFIG_SYS_LBC_FLASH_BASE CONFIG_SYS_FLASH1 /* Localbus flash start */ |
| 146 | #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_LBC_FLASH_BASE /* start of FLASH */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 147 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 148 | #define CONFIG_SYS_BR0_PRELIM 0xfe001001 /* port size 16bit */ |
| 149 | #define CONFIG_SYS_OR0_PRELIM 0xfe000030 /* 32MB Flash */ |
| 150 | #define CONFIG_SYS_BR1_PRELIM 0xfc001001 /* port size 16bit */ |
| 151 | #define CONFIG_SYS_OR1_PRELIM 0xfe000030 /* 32MB Flash */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 152 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 153 | #define CONFIG_SYS_FLASH_CFI /* flash is CFI compat. */ |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 154 | #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver*/ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 155 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 156 | #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* number of banks */ |
| 157 | #define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per device */ |
| 158 | #undef CONFIG_SYS_FLASH_CHECKSUM |
| 159 | #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ |
| 160 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 161 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 162 | #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 163 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 164 | #define CONFIG_SYS_LBC_LCRR 0x00030004 /* LB clock ratio reg */ |
| 165 | #define CONFIG_SYS_LBC_LBCR 0x00000000 /* LB config reg */ |
| 166 | #define CONFIG_SYS_LBC_LSRT 0x20000000 /* LB sdram refresh timer */ |
| 167 | #define CONFIG_SYS_LBC_MRTPR 0x20000000 /* LB refresh timer presc.*/ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 168 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 169 | #define CONFIG_SYS_INIT_RAM_LOCK 1 |
| 170 | #define CONFIG_SYS_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */ |
| 171 | #define CONFIG_SYS_INIT_RAM_END 0x4000 /* End used area in RAM */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 172 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 173 | #define CONFIG_SYS_GBL_DATA_SIZE 128 /* num bytes initial data*/ |
| 174 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) |
| 175 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 176 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 177 | #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256kB for Mon */ |
| 178 | #define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4 MB for malloc */ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 179 | |
| 180 | /* FPGA and NAND */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 181 | #define CONFIG_SYS_FPGA_BASE 0xc0000000 |
| 182 | #define CONFIG_SYS_FPGA_SIZE 0x00100000 /* 1 MB */ |
| 183 | #define CONFIG_SYS_HMI_BASE 0xc0010000 |
| 184 | #define CONFIG_SYS_BR3_PRELIM 0xc0001881 /* UPMA, 32-bit */ |
| 185 | #define CONFIG_SYS_OR3_PRELIM 0xfff00000 /* 1 MB */ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 186 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 187 | #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_FPGA_BASE + 0x70) |
| 188 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 189 | #define CONFIG_CMD_NAND |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 190 | |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 191 | /* LIME GDC */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 192 | #define CONFIG_SYS_LIME_BASE 0xc8000000 |
| 193 | #define CONFIG_SYS_LIME_SIZE 0x04000000 /* 64 MB */ |
| 194 | #define CONFIG_SYS_BR2_PRELIM 0xc80018a1 /* UPMB, 32-bit */ |
| 195 | #define CONFIG_SYS_OR2_PRELIM 0xfc000000 /* 64 MB */ |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 196 | |
| 197 | #define CONFIG_VIDEO |
| 198 | #define CONFIG_VIDEO_MB862xx |
| 199 | #define CONFIG_CFB_CONSOLE |
| 200 | #define CONFIG_VIDEO_LOGO |
| 201 | #define CONFIG_VIDEO_BMP_LOGO |
| 202 | #define CONFIG_CONSOLE_EXTRA_INFO |
| 203 | #define VIDEO_FB_16BPP_PIXEL_SWAP |
| 204 | #define CONFIG_VGA_AS_SINGLE_DEVICE |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 205 | #define CONFIG_SYS_CONSOLE_IS_IN_ENV |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 206 | #define CONFIG_VIDEO_SW_CURSOR |
| 207 | #define CONFIG_SPLASH_SCREEN |
| 208 | #define CONFIG_VIDEO_BMP_GZIP |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 209 | #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) /* decompressed img */ |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 210 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 211 | /* Serial Port */ |
| 212 | |
| 213 | #define CONFIG_CONS_INDEX 1 |
| 214 | #undef CONFIG_SERIAL_SOFTWARE_FIFO |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 215 | #define CONFIG_SYS_NS16550 |
| 216 | #define CONFIG_SYS_NS16550_SERIAL |
| 217 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 218 | #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 219 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 220 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) |
| 221 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 222 | |
| 223 | #define CONFIG_BAUDRATE 115200 |
| 224 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 225 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 226 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} |
| 227 | |
| 228 | #define CONFIG_CMDLINE_EDITING 1 /* add command line history */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 229 | #define CONFIG_SYS_HUSH_PARSER 1 /* Use the HUSH parser */ |
| 230 | #ifdef CONFIG_SYS_HUSH_PARSER |
| 231 | #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 232 | #endif |
| 233 | |
| 234 | |
| 235 | /* |
| 236 | * I2C |
| 237 | */ |
| 238 | #define CONFIG_FSL_I2C /* Use FSL common I2C driver */ |
| 239 | #define CONFIG_HARD_I2C /* I2C with hardware support */ |
| 240 | #undef CONFIG_SOFT_I2C /* I2C bit-banged */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 241 | #define CONFIG_SYS_I2C_SPEED 102124 /* I2C speed and slave address */ |
| 242 | #define CONFIG_SYS_I2C_SLAVE 0x7F |
| 243 | #define CONFIG_SYS_I2C_OFFSET 0x3000 |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 244 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 245 | #define CONFIG_I2C_MULTI_BUS |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 246 | #define CONFIG_SYS_I2C2_OFFSET 0x3100 |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 247 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 248 | /* I2C RTC */ |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 249 | #define CONFIG_RTC_RX8025 /* Use Epson rx8025 rtc via i2c */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 250 | #define CONFIG_SYS_I2C_RTC_ADDR 0x32 /* at address 0x32 */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 251 | |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 252 | /* I2C W83782G HW-Monitoring IC */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 253 | #define CONFIG_SYS_I2C_W83782G_ADDR 0x28 /* W83782G address */ |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 254 | |
Sergei Poselenov | 92cdc44 | 2008-05-27 10:36:07 +0200 | [diff] [blame] | 255 | /* I2C temp sensor */ |
| 256 | /* Socrates uses Maxim's DS75, which is compatible with LM75 */ |
| 257 | #define CONFIG_DTT_LM75 1 |
| 258 | #define CONFIG_DTT_SENSORS {4} /* Sensor addresses */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 259 | #define CONFIG_SYS_DTT_MAX_TEMP 125 |
| 260 | #define CONFIG_SYS_DTT_LOW_TEMP -55 |
| 261 | #define CONFIG_SYS_DTT_HYSTERESIS 3 |
| 262 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 |
Sergei Poselenov | 92cdc44 | 2008-05-27 10:36:07 +0200 | [diff] [blame] | 263 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 264 | /* |
| 265 | * General PCI |
| 266 | * Memory space is mapped 1-1. |
| 267 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 268 | #define CONFIG_SYS_PCI_PHYS 0x80000000 /* 1G PCI TLB */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 269 | |
Sergei Poselenov | e13be1a | 2008-05-27 13:47:00 +0200 | [diff] [blame] | 270 | /* PCI is clocked by the external source at 33 MHz */ |
| 271 | #define CONFIG_PCI_CLK_FREQ 33000000 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 272 | #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 |
| 273 | #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE |
| 274 | #define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ |
| 275 | #define CONFIG_SYS_PCI1_IO_BASE 0xE2000000 |
| 276 | #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE |
| 277 | #define CONFIG_SYS_PCI1_IO_SIZE 0x01000000 /* 16M */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 278 | |
| 279 | #if defined(CONFIG_PCI) |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 280 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ |
Sergei Poselenov | 18343da | 2008-06-06 15:42:39 +0200 | [diff] [blame] | 281 | #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 282 | #endif /* CONFIG_PCI */ |
| 283 | |
| 284 | |
| 285 | #define CONFIG_NET_MULTI 1 |
| 286 | #define CONFIG_MII 1 /* MII PHY management */ |
| 287 | #define CONFIG_TSEC1 1 |
| 288 | #define CONFIG_TSEC1_NAME "TSEC0" |
Sergei Poselenov | 6be5775 | 2008-05-08 17:46:23 +0200 | [diff] [blame] | 289 | #define CONFIG_TSEC3 1 |
| 290 | #define CONFIG_TSEC3_NAME "TSEC1" |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 291 | #undef CONFIG_MPC85XX_FEC |
| 292 | |
| 293 | #define TSEC1_PHY_ADDR 0 |
Sergei Poselenov | 6be5775 | 2008-05-08 17:46:23 +0200 | [diff] [blame] | 294 | #define TSEC3_PHY_ADDR 1 |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 295 | |
| 296 | #define TSEC1_PHYIDX 0 |
Sergei Poselenov | 6be5775 | 2008-05-08 17:46:23 +0200 | [diff] [blame] | 297 | #define TSEC3_PHYIDX 0 |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 298 | #define TSEC1_FLAGS TSEC_GIGABIT |
Sergei Poselenov | 6be5775 | 2008-05-08 17:46:23 +0200 | [diff] [blame] | 299 | #define TSEC3_FLAGS TSEC_GIGABIT |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 300 | |
Sergei Poselenov | 6be5775 | 2008-05-08 17:46:23 +0200 | [diff] [blame] | 301 | /* Options are: TSEC[0,1] */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 302 | #define CONFIG_ETHPRIME "TSEC0" |
| 303 | #define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */ |
| 304 | |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 305 | #define CONFIG_HAS_ETH0 |
| 306 | #define CONFIG_HAS_ETH1 |
| 307 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 308 | /* |
| 309 | * Environment |
| 310 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 311 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 312 | #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 313 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 314 | #define CONFIG_ENV_SIZE 0x4000 |
| 315 | #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE) |
| 316 | #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE) |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 317 | |
| 318 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 319 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 320 | |
| 321 | #define CONFIG_TIMESTAMP /* Print image info with ts */ |
| 322 | |
| 323 | |
| 324 | /* |
| 325 | * BOOTP options |
| 326 | */ |
| 327 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 328 | #define CONFIG_BOOTP_BOOTPATH |
| 329 | #define CONFIG_BOOTP_GATEWAY |
| 330 | #define CONFIG_BOOTP_HOSTNAME |
| 331 | |
| 332 | |
| 333 | /* |
| 334 | * Command line configuration. |
| 335 | */ |
| 336 | #include <config_cmd_default.h> |
| 337 | |
| 338 | #define CONFIG_CMD_DATE |
| 339 | #define CONFIG_CMD_DHCP |
Sergei Poselenov | 92cdc44 | 2008-05-27 10:36:07 +0200 | [diff] [blame] | 340 | #define CONFIG_CMD_DTT |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 341 | #undef CONFIG_CMD_EEPROM |
| 342 | #define CONFIG_CMD_I2C |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 343 | #define CONFIG_CMD_SDRAM |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 344 | #define CONFIG_CMD_MII |
| 345 | #define CONFIG_CMD_NFS |
| 346 | #define CONFIG_CMD_PING |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 347 | #define CONFIG_CMD_SNTP |
Sergei Poselenov | eeaaa61 | 2008-05-27 11:49:13 +0200 | [diff] [blame] | 348 | #define CONFIG_CMD_USB |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 349 | #define CONFIG_CMD_EXT2 /* EXT2 Support */ |
Anatolij Gustschin | e6f5c91 | 2008-08-15 15:42:13 +0200 | [diff] [blame] | 350 | #define CONFIG_CMD_BMP |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 351 | |
| 352 | #if defined(CONFIG_PCI) |
| 353 | #define CONFIG_CMD_PCI |
| 354 | #endif |
| 355 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 356 | #undef CONFIG_WATCHDOG /* watchdog disabled */ |
| 357 | |
| 358 | /* |
| 359 | * Miscellaneous configurable options |
| 360 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 361 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 362 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
| 363 | #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 364 | |
| 365 | #if defined(CONFIG_CMD_KGDB) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 366 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 367 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 368 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 369 | #endif |
| 370 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 371 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buf Size */ |
| 372 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 373 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| 374 | #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1ms ticks */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 375 | |
| 376 | /* |
| 377 | * For booting Linux, the board info and command line data |
| 378 | * have to be in the first 8 MB of memory, since this is |
| 379 | * the maximum mapped by the Linux kernel during initialization. |
| 380 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 381 | #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 382 | |
| 383 | /* |
| 384 | * Internal Definitions |
| 385 | * |
| 386 | * Boot Flags |
| 387 | */ |
| 388 | #define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */ |
| 389 | #define BOOTFLAG_WARM 0x02 /* Software reboot */ |
| 390 | |
| 391 | #if defined(CONFIG_CMD_KGDB) |
| 392 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/ |
| 393 | #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ |
| 394 | #endif |
| 395 | |
| 396 | |
| 397 | #define CONFIG_LOADADDR 200000 /* default addr for tftp & bootm*/ |
| 398 | |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 399 | #define CONFIG_BOOTDELAY 1 /* -1 disables auto-boot */ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 400 | |
| 401 | #define CONFIG_PREBOOT "echo;" \ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 402 | "echo Welcome on the ABB Socrates Board;" \ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 403 | "echo" |
| 404 | |
| 405 | #undef CONFIG_BOOTARGS /* the boot command will set bootargs */ |
| 406 | |
| 407 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 408 | "netdev=eth0\0" \ |
| 409 | "consdev=ttyS0\0" \ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 410 | "uboot_file=/home/tftp/syscon3/u-boot.bin\0" \ |
| 411 | "bootfile=/home/tftp/syscon3/uImage\0" \ |
| 412 | "fdt_file=/home/tftp/syscon3/socrates.dtb\0" \ |
| 413 | "initrd_file=/home/tftp/syscon3/uinitrd.gz\0" \ |
| 414 | "uboot_addr=FFFA0000\0" \ |
| 415 | "kernel_addr=FE000000\0" \ |
| 416 | "fdt_addr=FE1E0000\0" \ |
| 417 | "ramdisk_addr=FE200000\0" \ |
| 418 | "fdt_addr_r=B00000\0" \ |
| 419 | "kernel_addr_r=200000\0" \ |
| 420 | "ramdisk_addr_r=400000\0" \ |
| 421 | "rootpath=/opt/eldk/ppc_85xxDP\0" \ |
| 422 | "ramargs=setenv bootargs root=/dev/ram rw\0" \ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 423 | "nfsargs=setenv bootargs root=/dev/nfs rw " \ |
| 424 | "nfsroot=$serverip:$rootpath\0" \ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 425 | "addcons=setenv bootargs $bootargs " \ |
| 426 | "console=$consdev,$baudrate\0" \ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 427 | "addip=setenv bootargs $bootargs " \ |
| 428 | "ip=$ipaddr:$serverip:$gatewayip:$netmask" \ |
| 429 | ":$hostname:$netdev:off panic=1\0" \ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 430 | "boot_nor=run ramargs addcons;" \ |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 431 | "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 432 | "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ |
| 433 | "tftp ${fdt_addr_r} ${fdt_file}; " \ |
| 434 | "run nfsargs addip addcons;" \ |
| 435 | "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 436 | "update_uboot=tftp 100000 ${uboot_file};" \ |
| 437 | "protect off fffa0000 ffffffff;" \ |
| 438 | "era fffa0000 ffffffff;" \ |
| 439 | "cp.b 100000 fffa0000 ${filesize};" \ |
| 440 | "setenv filesize;saveenv\0" \ |
| 441 | "update_kernel=tftp 100000 ${bootfile};" \ |
| 442 | "era fe000000 fe1dffff;" \ |
| 443 | "cp.b 100000 fe000000 ${filesize};" \ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 444 | "setenv filesize;saveenv\0" \ |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 445 | "update_fdt=tftp 100000 ${fdt_file};" \ |
| 446 | "era fe1e0000 fe1fffff;" \ |
| 447 | "cp.b 100000 fe1e0000 ${filesize};" \ |
| 448 | "setenv filesize;saveenv\0" \ |
| 449 | "update_initrd=tftp 100000 ${initrd_file};" \ |
| 450 | "era fe200000 fe9fffff;" \ |
| 451 | "cp.b 100000 fe200000 ${filesize};" \ |
| 452 | "setenv filesize;saveenv\0" \ |
| 453 | "clean_data=era fea00000 fff5ffff\0" \ |
| 454 | "usbargs=setenv bootargs root=/dev/sda1 rw\0" \ |
| 455 | "load_usb=usb start;" \ |
| 456 | "ext2load usb 0:1 ${kernel_addr_r} /boot/uImage\0" \ |
| 457 | "boot_usb=run load_usb usbargs addcons;" \ |
| 458 | "bootm ${kernel_addr_r} - ${fdt_addr};" \ |
| 459 | "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \ |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 460 | "" |
Detlev Zundel | 0244f67 | 2008-08-15 15:42:12 +0200 | [diff] [blame] | 461 | #define CONFIG_BOOTCOMMAND "run boot_nor" |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 462 | |
Sergei Poselenov | 09842c5 | 2008-05-07 15:10:49 +0200 | [diff] [blame] | 463 | /* pass open firmware flat tree */ |
| 464 | #define CONFIG_OF_LIBFDT 1 |
| 465 | #define CONFIG_OF_BOARD_SETUP 1 |
| 466 | |
Sergei Poselenov | eeaaa61 | 2008-05-27 11:49:13 +0200 | [diff] [blame] | 467 | /* USB support */ |
| 468 | #define CONFIG_USB_OHCI_NEW 1 |
| 469 | #define CONFIG_PCI_OHCI 1 |
| 470 | #define CONFIG_PCI_OHCI_DEVNO 3 /* Number in PCI list */ |
Yuri Tikhonov | 11af42c | 2008-09-04 11:19:05 +0200 | [diff] [blame] | 471 | #define CONFIG_PCI_EHCI_DEVNO (CONFIG_PCI_OHCI_DEVNO / 2) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 472 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 |
| 473 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "ohci_pci" |
| 474 | #define CONFIG_SYS_OHCI_SWAP_REG_ACCESS 1 |
Sergei Poselenov | eeaaa61 | 2008-05-27 11:49:13 +0200 | [diff] [blame] | 475 | #define CONFIG_DOS_PARTITION 1 |
| 476 | #define CONFIG_USB_STORAGE 1 |
| 477 | |
Sergei Poselenov | f2bf96c | 2008-04-30 11:42:50 +0200 | [diff] [blame] | 478 | #endif /* __CONFIG_H */ |