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Masahiro Yamada31adfc22016-01-19 13:55:28 +09001/*
2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
Stephen Warrena9622432016-06-17 09:44:00 -06008#include <clk-uclass.h>
Masahiro Yamada31adfc22016-01-19 13:55:28 +09009#include <dm/device.h>
10
11DECLARE_GLOBAL_DATA_PTR;
12
13struct clk_fixed_rate {
14 unsigned long fixed_rate;
15};
16
17#define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev))
18
Stephen Warrena9622432016-06-17 09:44:00 -060019static ulong clk_fixed_rate_get_rate(struct clk *clk)
Masahiro Yamada31adfc22016-01-19 13:55:28 +090020{
Stephen Warrena9622432016-06-17 09:44:00 -060021 if (clk->id != 0)
22 return -EINVAL;
Masahiro Yamada31adfc22016-01-19 13:55:28 +090023
Stephen Warrena9622432016-06-17 09:44:00 -060024 return to_clk_fixed_rate(clk->dev)->fixed_rate;
Masahiro Yamada31adfc22016-01-19 13:55:28 +090025}
26
27const struct clk_ops clk_fixed_rate_ops = {
28 .get_rate = clk_fixed_rate_get_rate,
Masahiro Yamada31adfc22016-01-19 13:55:28 +090029};
30
31static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
32{
Simon Glass589d9152016-07-04 11:58:03 -060033#if !CONFIG_IS_ENABLED(OF_PLATDATA)
Masahiro Yamada31adfc22016-01-19 13:55:28 +090034 to_clk_fixed_rate(dev)->fixed_rate =
35 fdtdec_get_int(gd->fdt_blob, dev->of_offset,
36 "clock-frequency", 0);
Simon Glass589d9152016-07-04 11:58:03 -060037#endif
Masahiro Yamada31adfc22016-01-19 13:55:28 +090038
39 return 0;
40}
41
42static const struct udevice_id clk_fixed_rate_match[] = {
43 {
44 .compatible = "fixed-clock",
45 },
46 { /* sentinel */ }
47};
48
49U_BOOT_DRIVER(clk_fixed_rate) = {
50 .name = "fixed_rate_clock",
51 .id = UCLASS_CLK,
52 .of_match = clk_fixed_rate_match,
53 .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
54 .platdata_auto_alloc_size = sizeof(struct clk_fixed_rate),
55 .ops = &clk_fixed_rate_ops,
56};