blob: 710a139a01dce449f92ab06259c8e3123b83192a [file] [log] [blame]
wdenkefee1702002-07-20 20:14:13 +00001/*
2 * (C) Copyright 2000, 2001
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
25SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
26/* Do we need any of these for elf?
27 __DYNAMIC = 0; */
28SECTIONS
29{
30 .resetvec 0xFFFFFFFC :
31 {
32 *(.resetvec)
33 } = 0xffff
wdenke39c2842003-06-04 15:05:30 +000034 .bootpg 0xFFFFF000 :
35 {
36 board/mpl/mip405/init.o (.bootpg)
37 } = 0xffff
wdenkefee1702002-07-20 20:14:13 +000038
39 /* Read-only sections, merged into text segment: */
40 . = + SIZEOF_HEADERS;
41 .interp : { *(.interp) }
42 .hash : { *(.hash) }
43 .dynsym : { *(.dynsym) }
44 .dynstr : { *(.dynstr) }
45 .rel.text : { *(.rel.text) }
46 .rela.text : { *(.rela.text) }
47 .rel.data : { *(.rel.data) }
48 .rela.data : { *(.rela.data) }
49 .rel.rodata : { *(.rel.rodata) }
50 .rela.rodata : { *(.rela.rodata) }
51 .rel.got : { *(.rel.got) }
52 .rela.got : { *(.rela.got) }
53 .rel.ctors : { *(.rel.ctors) }
54 .rela.ctors : { *(.rela.ctors) }
55 .rel.dtors : { *(.rel.dtors) }
56 .rela.dtors : { *(.rela.dtors) }
57 .rel.bss : { *(.rel.bss) }
58 .rela.bss : { *(.rela.bss) }
59 .rel.plt : { *(.rel.plt) }
60 .rela.plt : { *(.rela.plt) }
61 .init : { *(.init) }
62 .plt : { *(.plt) }
63 .text :
64 {
65 /* WARNING - the following is hand-optimized to fit within */
66 /* the sector layout of our flash chips! XXX FIXME XXX */
67
68 cpu/ppc4xx/start.o (.text)
69 board/mpl/mip405/init.o (.text)
70 cpu/ppc4xx/kgdb.o (.text)
71 cpu/ppc4xx/traps.o (.text)
72 cpu/ppc4xx/interrupts.o (.text)
73 cpu/ppc4xx/serial.o (.text)
74 cpu/ppc4xx/cpu_init.o (.text)
75 cpu/ppc4xx/speed.o (.text)
76 cpu/ppc4xx/405gp_enet.o (.text)
77 common/dlmalloc.o (.text)
78 lib_generic/crc32.o (.text)
79 lib_ppc/extable.o (.text)
80 lib_generic/zlib.o (.text)
81
82/* . = env_offset;*/
83/* common/environment.o(.text)*/
84
85 *(.text)
86 *(.fixup)
87 *(.got1)
88 }
89 _etext = .;
90 PROVIDE (etext = .);
91 .rodata :
92 {
93 *(.rodata)
94 *(.rodata1)
wdenkbb2d9272003-06-25 22:26:29 +000095 *(.rodata.str1.4)
wdenkefee1702002-07-20 20:14:13 +000096 }
97 .fini : { *(.fini) } =0
98 .ctors : { *(.ctors) }
99 .dtors : { *(.dtors) }
100
101 /* Read-write section, merged into data segment: */
102 . = (. + 0x00FF) & 0xFFFFFF00;
103 _erotext = .;
104 PROVIDE (erotext = .);
105 .reloc :
106 {
107 *(.got)
108 _GOT2_TABLE_ = .;
109 *(.got2)
110 _FIXUP_TABLE_ = .;
111 *(.fixup)
112 }
113 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
114 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
115
116 .data :
117 {
118 *(.data)
119 *(.data1)
120 *(.sdata)
121 *(.sdata2)
122 *(.dynamic)
123 CONSTRUCTORS
124 }
125 _edata = .;
126 PROVIDE (edata = .);
127
128 __start___ex_table = .;
129 __ex_table : { *(__ex_table) }
130 __stop___ex_table = .;
131
132 . = ALIGN(256);
133 __init_begin = .;
134 .text.init : { *(.text.init) }
135 .data.init : { *(.data.init) }
136 . = ALIGN(256);
137 __init_end = .;
138
139 __bss_start = .;
140 .bss :
141 {
142 *(.sbss) *(.scommon)
143 *(.dynbss)
144 *(.bss)
145 *(COMMON)
146 }
147 _end = . ;
148 PROVIDE (end = .);
149}