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git01.mediatek.com / filogic / uboot / 573ad30214ad3df0d842562d9ebb1ef0f26e9e08 / . / include / asm-ppc / fsl_law.h
blob: 5bba08d44b419b0fc64b0c413a0c99248a097108 [file] [log] [blame]
Kumar Gala95fd2f62008-01-16 01:13:58 -0600[diff] [blame]1#ifndef _FSL_LAW_H_
2#define _FSL_LAW_H_
3
4#include <asm/io.h>
5
Kumar Gala95fd2f62008-01-16 01:13:58 -0600[diff] [blame]6#define SET_LAW_ENTRY(idx, a, sz, trgt) \
7 { .index = idx, .addr = a, .size = sz, .trgt_id = trgt }
8
Kumar Gala75639e02008-06-11 00:44:10 -0500[diff] [blame]9#define SET_LAW(a, sz, trgt) \
10 { .index = -1, .addr = a, .size = sz, .trgt_id = trgt }
11
Kumar Gala95fd2f62008-01-16 01:13:58 -0600[diff] [blame]12enum law_size {
13 LAW_SIZE_4K = 0xb,
14 LAW_SIZE_8K,
15 LAW_SIZE_16K,
16 LAW_SIZE_32K,
17 LAW_SIZE_64K,
18 LAW_SIZE_128K,
19 LAW_SIZE_256K,
20 LAW_SIZE_512K,
21 LAW_SIZE_1M,
22 LAW_SIZE_2M,
23 LAW_SIZE_4M,
24 LAW_SIZE_8M,
25 LAW_SIZE_16M,
26 LAW_SIZE_32M,
27 LAW_SIZE_64M,
28 LAW_SIZE_128M,
29 LAW_SIZE_256M,
30 LAW_SIZE_512M,
31 LAW_SIZE_1G,
32 LAW_SIZE_2G,
33 LAW_SIZE_4G,
34 LAW_SIZE_8G,
35 LAW_SIZE_16G,
36 LAW_SIZE_32G,
37};
38
39enum law_trgt_if {
40 LAW_TRGT_IF_PCI = 0x00,
41 LAW_TRGT_IF_PCI_2 = 0x01,
42#ifndef CONFIG_MPC8641
43 LAW_TRGT_IF_PCIE_1 = 0x02,
44#endif
45#ifndef CONFIG_MPC8572
46 LAW_TRGT_IF_PCIE_3 = 0x03,
47#endif
48 LAW_TRGT_IF_LBC = 0x04,
49 LAW_TRGT_IF_CCSR = 0x08,
50 LAW_TRGT_IF_DDR_INTRLV = 0x0b,
51 LAW_TRGT_IF_RIO = 0x0c,
52 LAW_TRGT_IF_DDR = 0x0f,
53 LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */
54};
55#define LAW_TRGT_IF_DDR_1 LAW_TRGT_IF_DDR
56#define LAW_TRGT_IF_PCI_1 LAW_TRGT_IF_PCI
57#define LAW_TRGT_IF_PCIX LAW_TRGT_IF_PCI
58#define LAW_TRGT_IF_PCIE_2 LAW_TRGT_IF_PCI_2
59
60#ifdef CONFIG_MPC8641
61#define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI
62#endif
63
64#ifdef CONFIG_MPC8572
65#define LAW_TRGT_IF_PCIE_3 LAW_TRGT_IF_PCI
66#endif
67
68struct law_entry {
69 int index;
70 phys_addr_t addr;
71 enum law_size size;
72 enum law_trgt_if trgt_id;
73};
74
75extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
Kumar Gala75639e02008-06-11 00:44:10 -0500[diff] [blame]76extern int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
Kumar Galaa9abb002008-06-10 16:16:02 -0500[diff] [blame]77extern int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
Kumar Gala61ed0532008-08-26 15:01:28 -0500[diff] [blame]78extern int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id);
Kumar Gala95fd2f62008-01-16 01:13:58 -0600[diff] [blame]79extern void disable_law(u8 idx);
80extern void init_laws(void);
Becky Bruce2a15f752008-01-23 16:31:05 -0600[diff] [blame]81extern void print_laws(void);
Kumar Gala95fd2f62008-01-16 01:13:58 -0600[diff] [blame]82
83/* define in board code */
84extern struct law_entry law_table[];
85extern int num_law_entries;
86#endif