Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 2 | /* |
| 3 | * ti_armv7_common.h |
| 4 | * |
| 5 | * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ |
| 6 | * |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 7 | * The various ARMv7 SoCs from TI all share a number of IP blocks when |
| 8 | * implementing a given feature. Rather than define these in every |
| 9 | * board or even SoC common file, we define a common file to be re-used |
| 10 | * in all cases. While technically true that some of these details are |
| 11 | * configurable at the board design, they are common throughout SoC |
| 12 | * reference platforms as well as custom designs and become de facto |
| 13 | * standards. |
| 14 | */ |
| 15 | |
| 16 | #ifndef __CONFIG_TI_ARMV7_COMMON_H__ |
| 17 | #define __CONFIG_TI_ARMV7_COMMON_H__ |
| 18 | |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 19 | /* |
Tom Rini | 96886f2 | 2014-03-28 15:03:29 -0400 | [diff] [blame] | 20 | * We setup defaults based on constraints from the Linux kernel, which should |
| 21 | * also be safe elsewhere. We have the default load at 32MB into DDR (for |
| 22 | * the kernel), FDT above 128MB (the maximum location for the end of the |
| 23 | * kernel), and the ramdisk 512KB above that (allowing for hopefully never |
| 24 | * seen large trees). We say all of this must be within the first 256MB |
| 25 | * as that will normally be within the kernel lowmem and thus visible via |
| 26 | * bootm_size and we only run on platforms with 256MB or more of memory. |
Sam Protsenko | 1651ee1 | 2020-01-24 17:53:49 +0200 | [diff] [blame] | 27 | * |
| 28 | * As a temporary storage for DTBO blobs (which should be applied into DTB |
| 29 | * blob), we use the location 15.5 MB above the ramdisk. If someone wants to |
| 30 | * use ramdisk bigger than 15.5 MB, then DTBO can be loaded and applied to DTB |
| 31 | * blob before loading the ramdisk, as DTBO location is only used as a temporary |
| 32 | * storage, and can be re-used after 'fdt apply' command is done. |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 33 | */ |
Tom Rini | 96886f2 | 2014-03-28 15:03:29 -0400 | [diff] [blame] | 34 | #define DEFAULT_LINUX_BOOT_ENV \ |
| 35 | "loadaddr=0x82000000\0" \ |
| 36 | "kernel_addr_r=0x82000000\0" \ |
| 37 | "fdtaddr=0x88000000\0" \ |
Sam Protsenko | 1651ee1 | 2020-01-24 17:53:49 +0200 | [diff] [blame] | 38 | "dtboaddr=0x89000000\0" \ |
Tom Rini | 96886f2 | 2014-03-28 15:03:29 -0400 | [diff] [blame] | 39 | "fdt_addr_r=0x88000000\0" \ |
Amjad Ouled-Ameur | 4d79772 | 2021-10-29 16:08:17 +0200 | [diff] [blame] | 40 | "fdtoverlay_addr_r=0x89000000\0" \ |
Tom Rini | 96886f2 | 2014-03-28 15:03:29 -0400 | [diff] [blame] | 41 | "rdaddr=0x88080000\0" \ |
| 42 | "ramdisk_addr_r=0x88080000\0" \ |
Sjoerd Simons | 3a3b3d1 | 2015-08-28 15:01:55 +0200 | [diff] [blame] | 43 | "scriptaddr=0x80000000\0" \ |
| 44 | "pxefile_addr_r=0x80100000\0" \ |
Lokesh Vutla | f01f8b3 | 2016-11-29 11:57:59 +0530 | [diff] [blame] | 45 | "bootm_size=0x10000000\0" \ |
| 46 | "boot_fdt=try\0" |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 47 | |
Lokesh Vutla | c2913ac | 2016-11-29 11:58:00 +0530 | [diff] [blame] | 48 | #define DEFAULT_FIT_TI_ARGS \ |
| 49 | "boot_fit=0\0" \ |
Andrew F. Davis | 5589be6 | 2019-08-12 15:59:54 -0400 | [diff] [blame] | 50 | "addr_fit=0x90000000\0" \ |
Andrew F. Davis | 77c875c | 2019-08-12 15:59:55 -0400 | [diff] [blame] | 51 | "name_fit=fitImage\0" \ |
| 52 | "update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}\0" \ |
Andrew F. Davis | c21e819 | 2019-08-26 17:51:00 -0400 | [diff] [blame] | 53 | "get_overlaystring=" \ |
Suman Anna | ad30ac3 | 2020-04-24 13:39:52 -0500 | [diff] [blame] | 54 | "for overlay in $name_overlays;" \ |
Andrew F. Davis | c21e819 | 2019-08-26 17:51:00 -0400 | [diff] [blame] | 55 | "do;" \ |
| 56 | "setenv overlaystring ${overlaystring}'#'${overlay};" \ |
| 57 | "done;\0" \ |
Andrew Davis | 6dd3e71 | 2023-04-25 11:20:45 -0500 | [diff] [blame] | 58 | "get_fit_config=setexpr name_fit_config gsub / _ conf-${fdtfile}\0" \ |
| 59 | "run_fit=run get_fit_config; bootm ${addr_fit}#${name_fit_config}${overlaystring}\0" \ |
Lokesh Vutla | c2913ac | 2016-11-29 11:58:00 +0530 | [diff] [blame] | 60 | |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 61 | /* |
Enric Balletbò i Serra | 07322c5 | 2013-12-06 21:30:21 +0100 | [diff] [blame] | 62 | * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined, |
| 63 | * we say (for simplicity) that we have 1 bank, always, even when |
| 64 | * we have more. We always start at 0x80000000, and we place the |
| 65 | * initial stack pointer in our SRAM. Otherwise, we can define |
| 66 | * CONFIG_NR_DRAM_BANKS before including this file. |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 67 | */ |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 68 | #define CFG_SYS_SDRAM_BASE 0x80000000 |
Nishanth Menon | b447151 | 2015-07-22 18:05:45 -0500 | [diff] [blame] | 69 | |
Jean-Jacques Hiblot | 52a5151 | 2018-12-07 14:50:49 +0100 | [diff] [blame] | 70 | /* If DM_I2C, enable non-DM I2C support */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 71 | |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 72 | /* |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 73 | * The following are general good-enough settings for U-Boot. We set a |
| 74 | * large malloc pool as we generally have a lot of DDR, and we opt for |
| 75 | * function over binary size in the main portion of U-Boot as this is |
| 76 | * generally easily constrained later if needed. We enable the config |
| 77 | * options that give us information in the environment about what board |
| 78 | * we are on so we do not need to rely on the command prompt. We set a |
| 79 | * console baudrate of 115200 and use the default baud rate table. |
| 80 | */ |
Tom Rini | c5e9636 | 2013-08-20 08:53:49 -0400 | [diff] [blame] | 81 | |
| 82 | /* As stated above, the following choices are optional. */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 83 | |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 84 | /* Console I/O Buffer Size */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 85 | /* |
| 86 | * When we have SPI, NOR or NAND flash we expect to be making use of |
| 87 | * mtdparts, both for ease of use in U-Boot and for passing information |
| 88 | * on to the Linux kernel. |
| 89 | */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 90 | |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 91 | /* |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 92 | * Our platforms make use of SPL to initalize the hardware (primarily |
Andrew F. Davis | e2f61e7 | 2016-08-30 14:06:28 -0500 | [diff] [blame] | 93 | * memory) enough for full U-Boot to be loaded. We make use of the general |
| 94 | * SPL framework found under common/spl/. Given our generally common memory |
| 95 | * map, we set a number of related defaults and sizes here. |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 96 | */ |
Sourav Poddar | 5248bba | 2014-05-19 16:53:37 -0400 | [diff] [blame] | 97 | #if !defined(CONFIG_NOR_BOOT) && \ |
| 98 | !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX)) |
Andrew F. Davis | e2f61e7 | 2016-08-30 14:06:28 -0500 | [diff] [blame] | 99 | |
| 100 | /* |
| 101 | * We also support Falcon Mode so that the Linux kernel can be booted |
| 102 | * directly from SPL. This is not currently available on HS devices. |
| 103 | */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 104 | |
| 105 | /* |
Tom Rini | be73799 | 2014-07-18 11:51:32 -0400 | [diff] [blame] | 106 | * Place the image at the start of the ROM defined image space (per |
| 107 | * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined |
Tom Rini | cfff4aa | 2016-08-26 13:30:43 -0400 | [diff] [blame] | 108 | * downloaded image area minus 1KiB for scratch space. We initalize DRAM as |
| 109 | * soon as we can so that we can place stack, malloc and BSS there. We load |
| 110 | * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict |
| 111 | * with older SPLs). We have our BSS be placed 2MiB after this, to allow for |
| 112 | * the default Linux kernel address of 0x80008000 to work with most sized |
| 113 | * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end |
| 114 | * of the BSS area. We suggest that the stack be placed at 32MiB after the |
| 115 | * start of DRAM to allow room for all of the above (handled in Kconfig). |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 116 | */ |
Tom Rini | cfff4aa | 2016-08-26 13:30:43 -0400 | [diff] [blame] | 117 | |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 118 | #ifdef CONFIG_SPL_OS_BOOT |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 119 | /* FAT */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 120 | |
| 121 | /* RAW SD card / eMMC */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 122 | #endif |
| 123 | |
Tom Rini | f48e5ee | 2013-08-20 08:53:44 -0400 | [diff] [blame] | 124 | /* General parts of the framework, required. */ |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 125 | |
Miquel Raynal | d093536 | 2019-10-03 19:50:03 +0200 | [diff] [blame] | 126 | #ifdef CONFIG_MTD_RAW_NAND |
Tom Rini | b421349 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 127 | #define CFG_SYS_NAND_U_BOOT_START CONFIG_TEXT_BASE |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 128 | #endif |
| 129 | #endif /* !CONFIG_NOR_BOOT */ |
| 130 | |
Cooper Jr., Franklin | 07610ab | 2015-04-21 07:51:04 -0500 | [diff] [blame] | 131 | /* Generic Environment Variables */ |
| 132 | |
| 133 | #ifdef CONFIG_CMD_NET |
| 134 | #define NETARGS \ |
| 135 | "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \ |
| 136 | "::off\0" \ |
| 137 | "nfsopts=nolock\0" \ |
| 138 | "rootpath=/export/rootfs\0" \ |
| 139 | "netloadimage=tftp ${loadaddr} ${bootfile}\0" \ |
| 140 | "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \ |
| 141 | "netargs=setenv bootargs console=${console} " \ |
| 142 | "${optargs} " \ |
| 143 | "root=/dev/nfs " \ |
| 144 | "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \ |
| 145 | "ip=dhcp\0" \ |
| 146 | "netboot=echo Booting from network ...; " \ |
| 147 | "setenv autoload no; " \ |
| 148 | "dhcp; " \ |
| 149 | "run netloadimage; " \ |
| 150 | "run netloadfdt; " \ |
| 151 | "run netargs; " \ |
| 152 | "bootz ${loadaddr} - ${fdtaddr}\0" |
Cooper Jr., Franklin | dcee9cf | 2015-06-10 08:54:02 -0500 | [diff] [blame] | 153 | #else |
| 154 | #define NETARGS "" |
Cooper Jr., Franklin | 07610ab | 2015-04-21 07:51:04 -0500 | [diff] [blame] | 155 | #endif |
| 156 | |
Tom Rini | a2f4c91 | 2013-08-09 11:22:17 -0400 | [diff] [blame] | 157 | #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */ |