| Wills Wang | 8d8d2ed | 2016-03-16 16:59:59 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015-2016 Wills Wang <wills.wang@live.com> |
| 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| 7 | #include <common.h> |
| 8 | #include <asm/io.h> |
| 9 | #include <asm/addrspace.h> |
| 10 | #include <asm/types.h> |
| 11 | #include <mach/ar71xx_regs.h> |
| 12 | #include <mach/ddr.h> |
| 13 | #include <debug_uart.h> |
| 14 | |
| 15 | DECLARE_GLOBAL_DATA_PTR; |
| 16 | |
| 17 | #ifdef CONFIG_DEBUG_UART_BOARD_INIT |
| 18 | void board_debug_uart_init(void) |
| 19 | { |
| 20 | void __iomem *regs; |
| 21 | u32 val; |
| 22 | |
| 23 | regs = map_physmem(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE, |
| 24 | MAP_NOCACHE); |
| 25 | |
| 26 | /* |
| 27 | * GPIO9 as input, GPIO10 as output |
| 28 | */ |
| 29 | val = readl(regs + AR71XX_GPIO_REG_OE); |
| 30 | val &= ~AR933X_GPIO(9); |
| 31 | val |= AR933X_GPIO(10); |
| 32 | writel(val, regs + AR71XX_GPIO_REG_OE); |
| 33 | |
| 34 | /* |
| 35 | * Enable UART, GPIO9 as UART_SI, GPIO10 as UART_SO |
| 36 | */ |
| 37 | val = readl(regs + AR71XX_GPIO_REG_FUNC); |
| 38 | val |= AR933X_GPIO_FUNC_UART_EN | AR933X_GPIO_FUNC_RES_TRUE; |
| 39 | writel(val, regs + AR71XX_GPIO_REG_FUNC); |
| 40 | } |
| 41 | #endif |
| 42 | |
| 43 | int board_early_init_f(void) |
| 44 | { |
| 45 | #ifdef CONFIG_DEBUG_UART |
| 46 | debug_uart_init(); |
| 47 | #endif |
| 48 | ddr_init(); |
| 49 | return 0; |
| 50 | } |