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wdenk68005192005-01-09 21:28:15 +00001/*
2 * (C) Copyright 2002
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <asm-arm/mach-types.h>
30
Wolfgang Denk6405a152006-03-31 18:32:53 +020031DECLARE_GLOBAL_DATA_PTR;
wdenk68005192005-01-09 21:28:15 +000032
33/*
34 * Miscelaneous platform dependent initialisations
35 */
36
37int board_init (void)
38{
wdenk68005192005-01-09 21:28:15 +000039 /* memory and cpu-speed are setup before relocation */
40 /* so we do _nothing_ here */
41
42 /* arch number of Lubbock-Board */
43 gd->bd->bi_arch_number = MACH_TYPE_PLEB2;
44
45 /* adress of boot parameters */
46 gd->bd->bi_boot_params = 0xa0000100;
47
48 return 0;
49}
50
51int board_late_init(void)
52{
53 setenv("stdout", "serial");
54 setenv("stderr", "serial");
55 return 0;
56}
57
58
59int dram_init (void)
60{
wdenk68005192005-01-09 21:28:15 +000061 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
62 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
63 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
64 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
65 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
66 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
67 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
68 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
69
70 return 0;
71}