Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 561865edfeb763bfe4d6436859498fc5e23db3a2 / . / arch / mips / dts / brcm,bcm3380.dtsi
blob: 7cccec5da5a6c285b5b8468369fd68cd89728695 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
Álvaro Fernández Rojasec8d4c92017-05-16 18:42:42 +0200[diff] [blame]2/*
3 * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com>
Álvaro Fernández Rojasec8d4c92017-05-16 18:42:42 +0200[diff] [blame]4 */
5
6#include <dt-bindings/clock/bcm3380-clock.h>
7#include <dt-bindings/gpio/gpio.h>
8#include <dt-bindings/reset/bcm3380-reset.h>
9#include "skeleton.dtsi"
10
11/ {
12 compatible = "brcm,bcm3380";
13
Álvaro Fernández Rojas3f082d02018-01-23 17:15:02 +0100[diff] [blame]14 aliases {
15 spi0 = &spi;
16 };
17
Álvaro Fernández Rojasec8d4c92017-05-16 18:42:42 +0200[diff] [blame]18 cpus {
19 reg = <0x14e00000 0x4>;
20 #address-cells = <1>;
21 #size-cells = <0>;
22 u-boot,dm-pre-reloc;
23
24 cpu@0 {
25 compatible = "brcm,bcm3380-cpu", "mips,mips4Kc";
26 device_type = "cpu";
27 reg = <0>;
28 u-boot,dm-pre-reloc;
29 };
30
31 cpu@1 {
32 compatible = "brcm,bcm3380-cpu", "mips,mips4Kc";
33 device_type = "cpu";
34 reg = <1>;
35 u-boot,dm-pre-reloc;
36 };
37 };
38
39 clocks {
40 compatible = "simple-bus";
41 #address-cells = <1>;
42 #size-cells = <1>;
43 u-boot,dm-pre-reloc;
44
45 periph_osc: periph-osc {
46 compatible = "fixed-clock";
47 #clock-cells = <0>;
Álvaro Fernández Rojasafef5de2017-05-23 21:24:49 +0200[diff] [blame]48 clock-frequency = <48000000>;
Álvaro Fernández Rojasec8d4c92017-05-16 18:42:42 +0200[diff] [blame]49 u-boot,dm-pre-reloc;
50 };
51
52 periph_clk0: periph-clk@14e00004 {
53 compatible = "brcm,bcm6345-clk";
54 reg = <0x14e00004 0x4>;
55 #clock-cells = <1>;
56 };
57
58 periph_clk1: periph-clk@14e00008 {
59 compatible = "brcm,bcm6345-clk";
60 reg = <0x14e00008 0x4>;
61 #clock-cells = <1>;
62 };
63 };
64
65 ubus {
66 compatible = "simple-bus";
67 #address-cells = <1>;
68 #size-cells = <1>;
69 u-boot,dm-pre-reloc;
70
71 memory-controller@12000000 {
72 compatible = "brcm,bcm6328-mc";
73 reg = <0x12000000 0x1000>;
74 u-boot,dm-pre-reloc;
75 };
76
77 periph_rst0: reset-controller@14e0008c {
78 compatible = "brcm,bcm6345-reset";
79 reg = <0x14e0008c 0x4>;
80 #reset-cells = <1>;
81 };
82
83 periph_rst1: reset-controller@14e00090 {
84 compatible = "brcm,bcm6345-reset";
85 reg = <0x14e00090 0x4>;
86 #reset-cells = <1>;
87 };
88
89 pll_cntl: syscon@14e00094 {
90 compatible = "syscon";
91 reg = <0x14e00094 0x4>;
92 };
93
94 syscon-reboot {
95 compatible = "syscon-reboot";
96 regmap = <&pll_cntl>;
97 offset = <0x0>;
98 mask = <0x1>;
99 };
100
101 wdt: watchdog@14e000dc {
102 compatible = "brcm,bcm6345-wdt";
103 reg = <0x14e000dc 0xc>;
104
105 clocks = <&periph_osc>;
106 };
107
108 wdt-reboot {
109 compatible = "wdt-reboot";
110 wdt = <&wdt>;
111 };
112
113 gpio0: gpio-controller@14e00100 {
114 compatible = "brcm,bcm6345-gpio";
115 reg = <0x14e00100 0x4>, <0x14e00108 0x4>;
116 gpio-controller;
117 #gpio-cells = <2>;
118
119 status = "disabled";
120 };
121
122 gpio1: gpio-controller@14e00104 {
123 compatible = "brcm,bcm6345-gpio";
124 reg = <0x14e00104 0x4>, <0x14e0010c 0x4>;
125 gpio-controller;
126 #gpio-cells = <2>;
127 ngpios = <3>;
128
129 status = "disabled";
130 };
131
132 uart0: serial@14e00200 {
133 compatible = "brcm,bcm6345-uart";
134 reg = <0x14e00200 0x18>;
135 clocks = <&periph_osc>;
136
137 status = "disabled";
138 };
139
140 uart1: serial@14e00220 {
141 compatible = "brcm,bcm6345-uart";
142 reg = <0x14e00220 0x18>;
143 clocks = <&periph_osc>;
144
145 status = "disabled";
146 };
147
Álvaro Fernández Rojas3f082d02018-01-23 17:15:02 +0100[diff] [blame]148 spi: spi@14e02000 {
149 compatible = "brcm,bcm6358-spi";
150 reg = <0x14e02000 0x70c>;
151 #address-cells = <1>;
152 #size-cells = <0>;
153 clocks = <&periph_clk0 BCM3380_CLK0_SPI>;
154 resets = <&periph_rst0 BCM3380_RST0_SPI>;
155 spi-max-frequency = <25000000>;
156 num-cs = <6>;
157
158 status = "disabled";
159 };
160
Álvaro Fernández Rojasec8d4c92017-05-16 18:42:42 +0200[diff] [blame]161 leds: led-controller@14e00f00 {
162 compatible = "brcm,bcm6328-leds";
163 reg = <0x14e00f00 0x1c>;
164 #address-cells = <1>;
165 #size-cells = <0>;
166
167 status = "disabled";
168 };
169 };
170};