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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Pali Rohár248ef0a2012-10-29 07:54:01 +00002/*
3 * (C) Copyright 2011-2012
Pali Rohár10a953d2020-04-01 00:35:08 +02004 * Pali Rohár <pali@kernel.org>
Pali Rohár248ef0a2012-10-29 07:54:01 +00005 *
6 * (C) Copyright 2010
7 * Alistair Buxton <a.j.buxton@gmail.com>
8 *
9 * Derived from Beagle Board code:
10 * (C) Copyright 2006-2008
11 * Texas Instruments.
12 * Richard Woodruff <r-woodruff2@ti.com>
13 * Syed Mohammed Khasim <x0khasim@ti.com>
14 *
15 * Configuration settings for the Nokia RX-51 aka N900.
Pali Rohár248ef0a2012-10-29 07:54:01 +000016 */
17
18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21/*
22 * High Level Configuration Options
23 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000024
Pali Rohár248ef0a2012-10-29 07:54:01 +000025#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050026#include <asm/arch/omap.h>
Pali Rohár248ef0a2012-10-29 07:54:01 +000027#include <asm/arch/mem.h>
28#include <linux/stringify.h>
29
Pali Rohár248ef0a2012-10-29 07:54:01 +000030/* Clock Defines */
31#define V_OSCK 26000000 /* Clock output from T2 */
32#define V_SCLK (V_OSCK >> 1)
33
Pali Rohár248ef0a2012-10-29 07:54:01 +000034#define CONFIG_UBI_SIZE (512 << 10)
Pali Rohár248ef0a2012-10-29 07:54:01 +000035
36/*
37 * Hardware drivers
38 */
39
40/*
41 * NS16550 Configuration
42 */
43#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
44
Pali Rohár248ef0a2012-10-29 07:54:01 +000045#define CONFIG_SYS_NS16550_SERIAL
46#define CONFIG_SYS_NS16550_REG_SIZE (-4)
47#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
48
49/*
50 * select serial console configuration
51 */
Pali Rohár248ef0a2012-10-29 07:54:01 +000052#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
Pali Rohár248ef0a2012-10-29 07:54:01 +000053
Pali Rohár248ef0a2012-10-29 07:54:01 +000054#define CONFIG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 }
Pali Rohár248ef0a2012-10-29 07:54:01 +000055
Pali Rohár248ef0a2012-10-29 07:54:01 +000056/* USB device configuration */
57#define CONFIG_USB_DEVICE
Pali Rohárbba0bba2021-02-20 11:50:15 +010058#define CONFIG_USB_TTY
Pali Rohár248ef0a2012-10-29 07:54:01 +000059#define CONFIG_USBD_VENDORID 0x0421
Pali Rohárbba0bba2021-02-20 11:50:15 +010060#define CONFIG_USBD_PRODUCTID_CDCACM 0x01c8
61#define CONFIG_USBD_PRODUCTID_GSERIAL 0x01c8
Pali Rohár248ef0a2012-10-29 07:54:01 +000062#define CONFIG_USBD_MANUFACTURER "Nokia"
Pali Rohárbba0bba2021-02-20 11:50:15 +010063#define CONFIG_USBD_PRODUCT_NAME "N900 (U-Boot)"
Pali Rohár248ef0a2012-10-29 07:54:01 +000064
Pali Rohár248ef0a2012-10-29 07:54:01 +000065#define GPIO_SLIDE 71
66
67/*
68 * Board ONENAND Info.
69 */
70
Pali Rohár248ef0a2012-10-29 07:54:01 +000071#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000072
Pali Rohár248ef0a2012-10-29 07:54:01 +000073/*
74 * Framebuffer
75 */
76/* Video console */
Pali Rohár248ef0a2012-10-29 07:54:01 +000077#define VIDEO_FB_16BPP_PIXEL_SWAP
78#define VIDEO_FB_16BPP_WORD_SWAP
Pali Rohár248ef0a2012-10-29 07:54:01 +000079
80/* functions for cfb_console */
81#define VIDEO_KBD_INIT_FCT rx51_kp_init()
82#define VIDEO_TSTC_FCT rx51_kp_tstc
83#define VIDEO_GETC_FCT rx51_kp_getc
84#ifndef __ASSEMBLY__
Simon Glass0d1e1f72014-07-23 06:54:59 -060085struct stdio_dev;
Pali Rohár248ef0a2012-10-29 07:54:01 +000086int rx51_kp_init(void);
Simon Glass0d1e1f72014-07-23 06:54:59 -060087int rx51_kp_tstc(struct stdio_dev *sdev);
88int rx51_kp_getc(struct stdio_dev *sdev);
Pali Rohár248ef0a2012-10-29 07:54:01 +000089#endif
90
Pali Rohár248ef0a2012-10-29 07:54:01 +000091/* Environment information */
Pali Rohár248ef0a2012-10-29 07:54:01 +000092#define CONFIG_EXTRA_ENV_SETTINGS \
Pali Rohár248ef0a2012-10-29 07:54:01 +000093 "usbtty=cdc_acm\0" \
Pali Rohárbba0bba2021-02-20 11:50:15 +010094 "stdin=usbtty,serial,vga\0" \
95 "stdout=usbtty,serial,vga\0" \
96 "stderr=usbtty,serial,vga\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +000097 "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \
98 "switchmmc=mmc dev ${mmcnum}\0" \
99 "kernaddr=0x82008000\0" \
100 "initrdaddr=0x84008000\0" \
101 "scriptaddr=0x86008000\0" \
102 "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \
103 "${loadaddr} ${mmcfile}\0" \
104 "kernload=setenv loadaddr ${kernaddr};" \
105 "setenv mmcfile ${mmckernfile};" \
106 "run fileload\0" \
107 "initrdload=setenv loadaddr ${initrdaddr};" \
108 "setenv mmcfile ${mmcinitrdfile};" \
109 "run fileload\0" \
110 "scriptload=setenv loadaddr ${scriptaddr};" \
111 "setenv mmcfile ${mmcscriptfile};" \
112 "run fileload\0" \
113 "scriptboot=echo Running ${mmcscriptfile} from mmc " \
114 "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \
115 "kernboot=echo Booting ${mmckernfile} from mmc " \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200116 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} || " \
117 "bootz ${kernaddr}\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000118 "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\
Pali Rohár0a8825c2021-06-18 15:27:03 +0200119 "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr} || " \
120 "bootz ${kernaddr} ${initrdaddr}\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000121 "attachboot=echo Booting attached kernel image ...;" \
122 "setenv setup_omap_atag 1;" \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200123 "bootm ${attkernaddr} || bootz ${attkernaddr};" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000124 "setenv setup_omap_atag\0" \
Pali Rohár5e0f5132021-06-18 15:27:04 +0200125 "trymmcscriptboot=run switchmmc && run scriptload && run scriptboot\0" \
126 "trymmckernboot=run switchmmc && run kernload && run kernboot\0" \
127 "trymmckerninitrdboot=run switchmmc && run initrdload && " \
128 "run kernload && run kerninitrdboot\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000129 "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \
Pali Rohár0a8825c2021-06-18 15:27:03 +0200130 "setenv mmckernfile uImage; run trymmckernboot;" \
131 "setenv mmckernfile zImage; run trymmckernboot\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000132 "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \
133 "setenv mmcpart 2; run trymmcpartboot;" \
134 "setenv mmcpart 3; run trymmcpartboot;" \
135 "setenv mmcpart 4; run trymmcpartboot\0" \
136 "trymmcboot=if run switchmmc; then " \
137 "setenv mmctype fat;" \
138 "run trymmcallpartboot;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000139 "setenv mmctype ext4;" \
140 "run trymmcallpartboot;" \
141 "fi\0" \
142 "emmcboot=setenv mmcnum 1; run trymmcboot\0" \
143 "sdboot=setenv mmcnum 0; run trymmcboot\0" \
Pali Rohár5e0f5132021-06-18 15:27:04 +0200144 "trymmcbootmenu=setenv mmctype fat && run trymmcscriptboot || " \
145 "setenv mmctype ext4 && run trymmcscriptboot\0" \
146 "preboot=setenv mmcpart 1; setenv mmcscriptfile bootmenu.scr;" \
147 "setenv mmcnum 0 && run trymmcbootmenu || " \
148 "setenv mmcnum 1 && run trymmcbootmenu;" \
Pali Rohár6f52aee2020-04-01 00:35:11 +0200149 "if run slide; then true; else " \
150 "setenv bootmenu_delay 0;" \
151 "setenv bootdelay 0;" \
152 "fi\0" \
Pali Rohár13eb3e42013-03-07 05:15:19 +0000153 "menucmd=bootmenu\0" \
154 "bootmenu_0=Attached kernel=run attachboot\0" \
155 "bootmenu_1=Internal eMMC=run emmcboot\0" \
156 "bootmenu_2=External SD card=run sdboot\0" \
157 "bootmenu_3=U-Boot boot order=boot\0" \
158 "bootmenu_delay=30\0" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000159 ""
160
Pali Rohár13eb3e42013-03-07 05:15:19 +0000161#define CONFIG_POSTBOOTMENU \
162 "echo;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000163 "echo Extra commands:;" \
Pali Rohár248ef0a2012-10-29 07:54:01 +0000164 "echo run sdboot - Boot from SD card slot.;" \
165 "echo run emmcboot - Boot internal eMMC memory.;" \
166 "echo run attachboot - Boot attached kernel image.;" \
167 "echo"
168
Pali Rohár248ef0a2012-10-29 07:54:01 +0000169/*
170 * OMAP3 has 12 GP timers, they can be driven by the system clock
171 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
172 * This rate is divided by a local divisor.
173 */
174#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
175#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000176
177/*
Pali Rohár248ef0a2012-10-29 07:54:01 +0000178 * Physical Memory Map
179 */
Pali Rohár248ef0a2012-10-29 07:54:01 +0000180#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
181
182/*
183 * FLASH and environment organization
184 */
185
Pali Rohár248ef0a2012-10-29 07:54:01 +0000186#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
187#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
188#define CONFIG_SYS_INIT_RAM_SIZE 0x800
189#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
190 CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
191
192/*
193 * Attached kernel image
194 */
195
196#define SDRAM_SIZE 0x10000000 /* 256 MB */
197#define SDRAM_END (CONFIG_SYS_SDRAM_BASE + SDRAM_SIZE)
198
199#define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */
200#define KERNEL_OFFSET 0x40000 /* 256 kB */
201#define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET)
202#define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE)
203
204/* Reserve protected RAM for attached kernel */
205#define CONFIG_PRAM ((KERNEL_MAXSIZE >> 10)+1)
206
207#endif /* __CONFIG_H */