blob: 7b3ebd44905b63a87c8c3877773a659475a1a357 [file] [log] [blame]
wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2000
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <mpc8xx.h>
26#include <asm/8xx_immap.h>
27#include "ioport.h"
28
29#if 0
30#define IOPORT_DEBUG
31#endif
32
33#ifdef IOPORT_DEBUG
34#define PRINTF(fmt,args...) printf (fmt ,##args)
35#else
36#define PRINTF(fmt,args...)
37#endif
38
39/*
40 * The ioport configuration table.
41 */
42const mpc8xx_iop_conf_t iop_conf_tab[NUM_PORTS][PORT_BITS] = {
43 /*
44 * Port A configuration
wdenk541a76d2003-05-03 15:50:43 +000045 * Pin Signal Type Active Initial state
46 * PA7 fpgaProgramLowOut Out Low High
47 * PA1 fpgaCoreVoltageFailLow In Low N/A
wdenkc6097192002-11-03 00:24:07 +000048 */
49 { /* conf ppar psor pdir podr pdat pint function */
50 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
51 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* No pin */
52 /* PA15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
53 /* PA14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
54 /* PA13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
55 /* PA12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
56 /* PA11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
57 /* PA10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
58 /* PA9 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 1*/
59 /* PA8 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 1*/
60 /* PA7 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaProgramLow */
61 /* PA6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
62 /* PA5 */ { 1, 0, 0, 1, 0, 0, 0 }, /* grn bicolor LED 0*/
63 /* PA4 */ { 1, 0, 0, 1, 0, 0, 0 }, /* red bicolor LED 0*/
64 /* PA3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
65 /* PA2 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk541a76d2003-05-03 15:50:43 +000066#if !defined(CONFIG_SC)
67 /* PA1 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaCoreVoltageFail*/
68#else
wdenkc6097192002-11-03 00:24:07 +000069 /* PA1 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk541a76d2003-05-03 15:50:43 +000070#endif
wdenkc6097192002-11-03 00:24:07 +000071 /* PA0 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
72 },
73
74 /*
wdenk541a76d2003-05-03 15:50:43 +000075 * Port B configuration
wdenkc6097192002-11-03 00:24:07 +000076 * Pin Signal Type Active Initial state
77 * PB14 docBusyLowIn In Low X
78 * PB15 gpio1Sig Out High Low
79 * PB16 fpgaDoneBi In High X
wdenk541a76d2003-05-03 15:50:43 +000080 * PB17 swBitOkLowOut Out Low High
wdenkc6097192002-11-03 00:24:07 +000081 * PB19 speakerVolSig Out/Hi-Z High/Low High (Hi-Z)
82 * PB22 fpgaInitLowBi In Low X
83 * PB23 batteryOkSig In High X
wdenk541a76d2003-05-03 15:50:43 +000084 * PB31 pulseCatcherClr Out High 0
85 */
86 { /* conf ppar psor pdir podr pdat pint function */
87#if !defined(CONFIG_SC)
88 /* PB31 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
89#else
90 /* PB31 */ { 1, 0, 0, 1, 0, 0, 0 }, /* pulseCatcherClr */
91#endif
wdenkc6097192002-11-03 00:24:07 +000092 /* PB30 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
93 /* PB29 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
94 /* PB28 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
95 /* PB27 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
96 /* PB26 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
97 /* PB25 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
98 /* PB24 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk541a76d2003-05-03 15:50:43 +000099#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000100 /* PB23 */ { 1, 0, 0, 0, 0, 0, 0 }, /* batteryOk */
wdenk541a76d2003-05-03 15:50:43 +0000101#else
102 /* PB23 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
103#endif
wdenkc6097192002-11-03 00:24:07 +0000104 /* PB22 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaInitLowBi */
105 /* PB21 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
106 /* PB20 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk541a76d2003-05-03 15:50:43 +0000107#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000108 /* PB19 */ { 1, 0, 0, 1, 1, 1, 0 }, /* speakerVol */
wdenk541a76d2003-05-03 15:50:43 +0000109#else
110 /* PB19 */ { 0, 0, 0, 1, 1, 1, 0 }, /* */
111#endif
wdenkc6097192002-11-03 00:24:07 +0000112 /* PB18 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk541a76d2003-05-03 15:50:43 +0000113 /* PB17 */ { 1, 0, 0, 1, 0, 1, 0 }, /* swBitOkLow */
wdenkc6097192002-11-03 00:24:07 +0000114 /* PB16 */ { 1, 0, 0, 0, 0, 0, 0 }, /* fpgaDone */
115 /* PB15 */ { 1, 0, 0, 1, 0, 0, 0 }, /* gpio1 */
wdenk541a76d2003-05-03 15:50:43 +0000116#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000117 /* PB14 */ { 1, 0, 0, 0, 0, 0, 0 } /* docBusyLow */
wdenk541a76d2003-05-03 15:50:43 +0000118#else
119 /* PB14 */ { 0, 0, 0, 0, 0, 0, 0 } /* */
120#endif
121 },
wdenkc6097192002-11-03 00:24:07 +0000122
123 /*
wdenk541a76d2003-05-03 15:50:43 +0000124 * Port C configuration
wdenkc6097192002-11-03 00:24:07 +0000125 * Pin Signal Type Active Initial state
126 * PC4 i2cBus1EnSig Out High High
127 * PC5 i2cBus2EnSig Out High High
128 * PC6 gpio0Sig Out High Low
129 * PC8 i2cBus3EnSig Out High High
130 * PC10 i2cBus4EnSig Out High High
131 * PC11 fpgaResetLowOut Out Low High
132 * PC12 systemBitOkIn In High X
133 * PC15 selfDreqLow In Low X
134 */
wdenk541a76d2003-05-03 15:50:43 +0000135 { /* conf ppar psor pdir podr pdat pint function */
wdenkc6097192002-11-03 00:24:07 +0000136 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
137 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
138 /* PC15 */ { 1, 0, 0, 0, 0, 0, 0 }, /* selfDreqLowIn */
139 /* PC14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
140 /* PC13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk541a76d2003-05-03 15:50:43 +0000141#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000142 /* PC12 */ { 1, 0, 0, 0, 0, 0, 0 }, /* systemBitOkIn */
wdenk541a76d2003-05-03 15:50:43 +0000143#else
144 /* PC12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
145#endif
wdenkc6097192002-11-03 00:24:07 +0000146 /* PC11 */ { 1, 0, 0, 1, 0, 1, 0 }, /* fpgaResetLowOut */
wdenk541a76d2003-05-03 15:50:43 +0000147#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000148 /* PC10 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus4EnSig */
wdenk541a76d2003-05-03 15:50:43 +0000149#else
150 /* PC10 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
151#endif
wdenkc6097192002-11-03 00:24:07 +0000152 /* PC9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
wdenk541a76d2003-05-03 15:50:43 +0000153#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000154 /* PC8 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus3EnSig */
wdenk541a76d2003-05-03 15:50:43 +0000155#else
156 /* PC8 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
157#endif
wdenkc6097192002-11-03 00:24:07 +0000158 /* PC7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
159 /* PC6 */ { 1, 0, 0, 1, 0, 1, 0 }, /* gpio0 */
wdenk541a76d2003-05-03 15:50:43 +0000160#if !defined(CONFIG_SC)
wdenkc6097192002-11-03 00:24:07 +0000161 /* PC5 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus2EnSig */
162 /* PC4 */ { 1, 0, 0, 1, 0, 1, 0 }, /* i2cBus1EnSig */
wdenk541a76d2003-05-03 15:50:43 +0000163#else
164 /* PC5 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
165 /* PC4 */ { 0, 0, 0, 1, 0, 1, 0 }, /* */
166#endif
wdenkc6097192002-11-03 00:24:07 +0000167 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
168 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
169 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
170 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
wdenk541a76d2003-05-03 15:50:43 +0000171 },
wdenkc6097192002-11-03 00:24:07 +0000172
wdenk541a76d2003-05-03 15:50:43 +0000173 /*
174 * Port D configuration
175 */
176 { /* conf ppar psor pdir podr pdat pint function */
wdenkc6097192002-11-03 00:24:07 +0000177 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
178 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
179 /* PD15 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
180 /* PD14 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
181 /* PD13 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
182 /* PD12 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
183 /* PD11 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
184 /* PD10 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
185 /* PD9 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
186 /* PD8 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
187 /* PD7 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
188 /* PD6 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
189 /* PD5 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
190 /* PD4 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
191 /* PD3 */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
192 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
193 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 }, /* */
194 /* N/A */ { 0, 0, 0, 0, 0, 0, 0 } /* */
wdenk541a76d2003-05-03 15:50:43 +0000195 }
wdenkc6097192002-11-03 00:24:07 +0000196};
197
198/*
199 * Configure the MPC8XX I/O ports per the ioport configuration table
200 * (taken from ./cpu/mpc8260/cpu_init.c)
201 */
202void
203config_mpc8xx_ioports(volatile immap_t *immr)
204{
205 int portnum;
206
207 for (portnum = 0; portnum < NUM_PORTS; portnum++) {
208 uint pmsk = 0, ppar = 0, psor = 0, pdir = 0;
209 uint podr = 0, pdat = 0, pint = 0;
210 uint msk = 1;
211 mpc8xx_iop_conf_t *iopc = (mpc8xx_iop_conf_t *)&iop_conf_tab[portnum][0];
212 mpc8xx_iop_conf_t *eiopc = iopc + PORT_BITS;
213
214 /*
215 * For all ports except port B, ignore the two don't care entries
216 * in the configuration tables.
217 */
218 if (portnum != 1) {
219 iopc = (mpc8xx_iop_conf_t *)&iop_conf_tab[portnum][2];
220 }
221
222 /*
223 * NOTE: index 0 refers to pin 17, index 17 refers to pin 0
224 */
225 while (iopc < eiopc) {
226 if (iopc->conf) {
227 pmsk |= msk;
228 if (iopc->ppar) ppar |= msk;
229 if (iopc->psor) psor |= msk;
230 if (iopc->pdir) pdir |= msk;
231 if (iopc->podr) podr |= msk;
232 if (iopc->pdat) pdat |= msk;
233 if (iopc->pint) pint |= msk;
234 }
235 msk <<= 1;
236 iopc++;
237 }
238
239 PRINTF("%s:%d:\n portnum=%d ", __FUNCTION__, __LINE__, portnum);
240#ifdef IOPORT_DEBUG
241 switch(portnum) {
242 case 0: printf("(A)\n"); break;
243 case 1: printf("(B)\n"); break;
244 case 2: printf("(C)\n"); break;
245 case 3: printf("(D)\n"); break;
246 default: printf("(?)\n"); break;
247 }
248#endif
249 PRINTF(" ppar=0x%.8x pdir=0x%.8x podr=0x%.8x\n"
250 " pdat=0x%.8x psor=0x%.8x pint=0x%.8x pmsk=0x%.8x\n",
251 ppar, pdir, podr, pdat, psor, pint, pmsk);
252
253 /*
254 * Have to handle the ioports on a port-by-port basis since there
255 * are three different flavors.
256 */
257 if (pmsk != 0) {
258 uint tpmsk = ~pmsk;
259
260 if (0 == portnum) { /* port A */
261 immr->im_ioport.iop_papar &= tpmsk;
262 immr->im_ioport.iop_padat =
263 (immr->im_ioport.iop_padat & tpmsk) | pdat;
264 immr->im_ioport.iop_padir =
265 (immr->im_ioport.iop_padir & tpmsk) | pdir;
266 immr->im_ioport.iop_paodr =
267 (immr->im_ioport.iop_paodr & tpmsk) | podr;
268 immr->im_ioport.iop_papar |= ppar;
269 }
270 else if (1 == portnum) { /* port B */
271 immr->im_cpm.cp_pbpar &= tpmsk;
272 immr->im_cpm.cp_pbdat = (immr->im_cpm.cp_pbdat & tpmsk) | pdat;
273 immr->im_cpm.cp_pbdir = (immr->im_cpm.cp_pbdir & tpmsk) | pdir;
274 immr->im_cpm.cp_pbodr = (immr->im_cpm.cp_pbodr & tpmsk) | podr;
275 immr->im_cpm.cp_pbpar |= ppar;
276 }
277 else if (2 == portnum) { /* port C */
278 immr->im_ioport.iop_pcpar &= tpmsk;
279 immr->im_ioport.iop_pcdat =
280 (immr->im_ioport.iop_pcdat & tpmsk) | pdat;
281 immr->im_ioport.iop_pcdir =
282 (immr->im_ioport.iop_pcdir & tpmsk) | pdir;
283 immr->im_ioport.iop_pcint =
284 (immr->im_ioport.iop_pcint & tpmsk) | pint;
285 immr->im_ioport.iop_pcso =
286 (immr->im_ioport.iop_pcso & tpmsk) | psor;
287 immr->im_ioport.iop_pcpar |= ppar;
288 }
289 else if (3 == portnum) { /* port D */
290 immr->im_ioport.iop_pdpar &= tpmsk;
291 immr->im_ioport.iop_pddat =
292 (immr->im_ioport.iop_pddat & tpmsk) | pdat;
293 immr->im_ioport.iop_pddir =
294 (immr->im_ioport.iop_pddir & tpmsk) | pdir;
295 immr->im_ioport.iop_pdpar |= ppar;
296 }
297 }
298 }
299
300 PRINTF("%s:%d: Port A:\n papar=0x%.4x padir=0x%.4x"
301 " paodr=0x%.4x\n padat=0x%.4x\n", __FUNCTION__, __LINE__,
302 immr->im_ioport.iop_papar, immr->im_ioport.iop_padir,
303 immr->im_ioport.iop_paodr, immr->im_ioport.iop_padat);
304 PRINTF("%s:%d: Port B:\n pbpar=0x%.8x pbdir=0x%.8x"
305 " pbodr=0x%.8x\n pbdat=0x%.8x\n", __FUNCTION__, __LINE__,
306 immr->im_cpm.cp_pbpar, immr->im_cpm.cp_pbdir,
307 immr->im_cpm.cp_pbodr, immr->im_cpm.cp_pbdat);
308 PRINTF("%s:%d: Port C:\n pcpar=0x%.4x pcdir=0x%.4x"
309 " pcdat=0x%.4x\n pcso=0x%.4x pcint=0x%.4x\n ",
310 __FUNCTION__, __LINE__, immr->im_ioport.iop_pcpar,
311 immr->im_ioport.iop_pcdir, immr->im_ioport.iop_pcdat,
312 immr->im_ioport.iop_pcso, immr->im_ioport.iop_pcint);
313 PRINTF("%s:%d: Port D:\n pdpar=0x%.4x pddir=0x%.4x"
314 " pddat=0x%.4x\n", __FUNCTION__, __LINE__,
315 immr->im_ioport.iop_pdpar, immr->im_ioport.iop_pddir,
316 immr->im_ioport.iop_pddat);
317}
318
319/* vim: set ts=4 sw=4 tw=78: */