blob: 6aaf82eae232688ede4a2d143e3adb19b73ecf95 [file] [log] [blame]
Stelian Pop7d42a222008-01-31 21:15:53 +00001/*
2 * (C) Copyright 2007
Stelian Popf9e848b2008-05-08 22:52:09 +02003 * Stelian Pop <stelian.pop@leadtechdesign.com>
Stelian Pop7d42a222008-01-31 21:15:53 +00004 * Lead Tech Design <www.leadtechdesign.com>
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +02005 * Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Stelian Pop7d42a222008-01-31 21:15:53 +00006 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25#ifndef __ASM_ARM_ARCH_CLK_H__
26#define __ASM_ARM_ARCH_CLK_H__
27
28#include <asm/arch/hardware.h>
29
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020030unsigned long get_cpu_clk_rate(void);
31unsigned long get_main_clk_rate(void);
32unsigned long get_mck_clk_rate(void);
33unsigned long get_plla_clk_rate(void);
34unsigned long get_pllb_clk_rate(void);
35unsigned int get_pllb_init(void);
36
Stelian Pop7d42a222008-01-31 21:15:53 +000037static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
38{
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020039 return get_mck_clk_rate();
Stelian Pop7d42a222008-01-31 21:15:53 +000040}
41
42static inline unsigned long get_usart_clk_rate(unsigned int dev_id)
43{
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020044 return get_mck_clk_rate();
Stelian Pop7d42a222008-01-31 21:15:53 +000045}
46
Stelian Popf6f86652008-05-09 21:57:18 +020047static inline unsigned long get_lcdc_clk_rate(unsigned int dev_id)
48{
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020049 return get_mck_clk_rate();
Stelian Popf6f86652008-05-09 21:57:18 +020050}
51
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020052static inline unsigned long get_twi_clk_rate(unsigned int dev_id)
53{
54 return get_mck_clk_rate();
55}
Stelian Popf6f86652008-05-09 21:57:18 +020056
Jean-Christophe PLAGNIOL-VILLARD23164f12009-04-16 21:30:44 +020057int at91_clock_init(unsigned long main_clock);
Stelian Pop7d42a222008-01-31 21:15:53 +000058#endif /* __ASM_ARM_ARCH_CLK_H__ */