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git01.mediatek.com / filogic / uboot / 534857644238c5f6c90c7ba0b3a80a3b8ed6d57b / . / arch / arm / dts / r8a7790.dtsi
blob: 96784879d1a1e4ca77d91a9f8cbc4a6dc6c9a083 [file] [log] [blame]
Marek Vasut53485762018-01-07 20:17:23 +0100[diff] [blame^]1/*
2 * Device Tree Source for the r8a7790 SoC
3 *
4 * Copyright (C) 2015 Renesas Electronics Corporation
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
6 * Copyright (C) 2014 Cogent Embedded Inc.
7 *
8 * SPDX-License-Identifier: GPL-2.0
9 */
10
11#include <dt-bindings/clock/r8a7790-cpg-mssr.h>
12#include <dt-bindings/interrupt-controller/arm-gic.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include <dt-bindings/power/r8a7790-sysc.h>
15
16/ {
17 compatible = "renesas,r8a7790";
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
21
22 aliases {
23 i2c0 = &i2c0;
24 i2c1 = &i2c1;
25 i2c2 = &i2c2;
26 i2c3 = &i2c3;
27 i2c4 = &iic0;
28 i2c5 = &iic1;
29 i2c6 = &iic2;
30 i2c7 = &iic3;
31 spi0 = &qspi;
32 spi1 = &msiof0;
33 spi2 = &msiof1;
34 spi3 = &msiof2;
35 spi4 = &msiof3;
36 vin0 = &vin0;
37 vin1 = &vin1;
38 vin2 = &vin2;
39 vin3 = &vin3;
40 };
41
42 cpus {
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "renesas,apmu";
46
47 cpu0: cpu@0 {
48 device_type = "cpu";
49 compatible = "arm,cortex-a15";
50 reg = <0>;
51 clock-frequency = <1300000000>;
52 voltage-tolerance = <1>; /* 1% */
53 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
54 clock-latency = <300000>; /* 300 us */
55 power-domains = <&sysc R8A7790_PD_CA15_CPU0>;
56 next-level-cache = <&L2_CA15>;
57 capacity-dmips-mhz = <1024>;
58
59 /* kHz - uV - OPPs unknown yet */
60 operating-points = <1400000 1000000>,
61 <1225000 1000000>,
62 <1050000 1000000>,
63 < 875000 1000000>,
64 < 700000 1000000>,
65 < 350000 1000000>;
66 };
67
68 cpu1: cpu@1 {
69 device_type = "cpu";
70 compatible = "arm,cortex-a15";
71 reg = <1>;
72 clock-frequency = <1300000000>;
73 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
74 power-domains = <&sysc R8A7790_PD_CA15_CPU1>;
75 next-level-cache = <&L2_CA15>;
76 capacity-dmips-mhz = <1024>;
77 };
78
79 cpu2: cpu@2 {
80 device_type = "cpu";
81 compatible = "arm,cortex-a15";
82 reg = <2>;
83 clock-frequency = <1300000000>;
84 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
85 power-domains = <&sysc R8A7790_PD_CA15_CPU2>;
86 next-level-cache = <&L2_CA15>;
87 capacity-dmips-mhz = <1024>;
88 };
89
90 cpu3: cpu@3 {
91 device_type = "cpu";
92 compatible = "arm,cortex-a15";
93 reg = <3>;
94 clock-frequency = <1300000000>;
95 clocks = <&cpg CPG_CORE R8A7790_CLK_Z>;
96 power-domains = <&sysc R8A7790_PD_CA15_CPU3>;
97 next-level-cache = <&L2_CA15>;
98 capacity-dmips-mhz = <1024>;
99 };
100
101 cpu4: cpu@100 {
102 device_type = "cpu";
103 compatible = "arm,cortex-a7";
104 reg = <0x100>;
105 clock-frequency = <780000000>;
106 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
107 power-domains = <&sysc R8A7790_PD_CA7_CPU0>;
108 next-level-cache = <&L2_CA7>;
109 capacity-dmips-mhz = <539>;
110 };
111
112 cpu5: cpu@101 {
113 device_type = "cpu";
114 compatible = "arm,cortex-a7";
115 reg = <0x101>;
116 clock-frequency = <780000000>;
117 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
118 power-domains = <&sysc R8A7790_PD_CA7_CPU1>;
119 next-level-cache = <&L2_CA7>;
120 capacity-dmips-mhz = <539>;
121 };
122
123 cpu6: cpu@102 {
124 device_type = "cpu";
125 compatible = "arm,cortex-a7";
126 reg = <0x102>;
127 clock-frequency = <780000000>;
128 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
129 power-domains = <&sysc R8A7790_PD_CA7_CPU2>;
130 next-level-cache = <&L2_CA7>;
131 capacity-dmips-mhz = <539>;
132 };
133
134 cpu7: cpu@103 {
135 device_type = "cpu";
136 compatible = "arm,cortex-a7";
137 reg = <0x103>;
138 clock-frequency = <780000000>;
139 clocks = <&cpg CPG_CORE R8A7790_CLK_Z2>;
140 power-domains = <&sysc R8A7790_PD_CA7_CPU3>;
141 next-level-cache = <&L2_CA7>;
142 capacity-dmips-mhz = <539>;
143 };
144
145 L2_CA15: cache-controller-0 {
146 compatible = "cache";
147 power-domains = <&sysc R8A7790_PD_CA15_SCU>;
148 cache-unified;
149 cache-level = <2>;
150 };
151
152 L2_CA7: cache-controller-1 {
153 compatible = "cache";
154 power-domains = <&sysc R8A7790_PD_CA7_SCU>;
155 cache-unified;
156 cache-level = <2>;
157 };
158 };
159
160 thermal-zones {
161 cpu_thermal: cpu-thermal {
162 polling-delay-passive = <0>;
163 polling-delay = <0>;
164
165 thermal-sensors = <&thermal>;
166
167 trips {
168 cpu-crit {
169 temperature = <115000>;
170 hysteresis = <0>;
171 type = "critical";
172 };
173 };
174 cooling-maps {
175 };
176 };
177 };
178
179 apmu@e6151000 {
180 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
181 reg = <0 0xe6151000 0 0x188>;
182 cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
183 };
184
185 apmu@e6152000 {
186 compatible = "renesas,r8a7790-apmu", "renesas,apmu";
187 reg = <0 0xe6152000 0 0x188>;
188 cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
189 };
190
191 gic: interrupt-controller@f1001000 {
192 compatible = "arm,gic-400";
193 #interrupt-cells = <3>;
194 #address-cells = <0>;
195 interrupt-controller;
196 reg = <0 0xf1001000 0 0x1000>,
197 <0 0xf1002000 0 0x2000>,
198 <0 0xf1004000 0 0x2000>,
199 <0 0xf1006000 0 0x2000>;
200 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
201 clocks = <&cpg CPG_MOD 408>;
202 clock-names = "clk";
203 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
204 resets = <&cpg 408>;
205 };
206
207 gpio0: gpio@e6050000 {
208 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
209 reg = <0 0xe6050000 0 0x50>;
210 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
211 #gpio-cells = <2>;
212 gpio-controller;
213 gpio-ranges = <&pfc 0 0 32>;
214 #interrupt-cells = <2>;
215 interrupt-controller;
216 clocks = <&cpg CPG_MOD 912>;
217 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
218 resets = <&cpg 912>;
219 };
220
221 gpio1: gpio@e6051000 {
222 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
223 reg = <0 0xe6051000 0 0x50>;
224 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
225 #gpio-cells = <2>;
226 gpio-controller;
227 gpio-ranges = <&pfc 0 32 30>;
228 #interrupt-cells = <2>;
229 interrupt-controller;
230 clocks = <&cpg CPG_MOD 911>;
231 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
232 resets = <&cpg 911>;
233 };
234
235 gpio2: gpio@e6052000 {
236 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
237 reg = <0 0xe6052000 0 0x50>;
238 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
239 #gpio-cells = <2>;
240 gpio-controller;
241 gpio-ranges = <&pfc 0 64 30>;
242 #interrupt-cells = <2>;
243 interrupt-controller;
244 clocks = <&cpg CPG_MOD 910>;
245 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
246 resets = <&cpg 910>;
247 };
248
249 gpio3: gpio@e6053000 {
250 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
251 reg = <0 0xe6053000 0 0x50>;
252 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
253 #gpio-cells = <2>;
254 gpio-controller;
255 gpio-ranges = <&pfc 0 96 32>;
256 #interrupt-cells = <2>;
257 interrupt-controller;
258 clocks = <&cpg CPG_MOD 909>;
259 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
260 resets = <&cpg 909>;
261 };
262
263 gpio4: gpio@e6054000 {
264 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
265 reg = <0 0xe6054000 0 0x50>;
266 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
267 #gpio-cells = <2>;
268 gpio-controller;
269 gpio-ranges = <&pfc 0 128 32>;
270 #interrupt-cells = <2>;
271 interrupt-controller;
272 clocks = <&cpg CPG_MOD 908>;
273 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
274 resets = <&cpg 908>;
275 };
276
277 gpio5: gpio@e6055000 {
278 compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
279 reg = <0 0xe6055000 0 0x50>;
280 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
281 #gpio-cells = <2>;
282 gpio-controller;
283 gpio-ranges = <&pfc 0 160 32>;
284 #interrupt-cells = <2>;
285 interrupt-controller;
286 clocks = <&cpg CPG_MOD 907>;
287 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
288 resets = <&cpg 907>;
289 };
290
291 thermal: thermal@e61f0000 {
292 compatible = "renesas,thermal-r8a7790",
293 "renesas,rcar-gen2-thermal",
294 "renesas,rcar-thermal";
295 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>;
296 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
297 clocks = <&cpg CPG_MOD 522>;
298 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
299 resets = <&cpg 522>;
300 #thermal-sensor-cells = <0>;
301 };
302
303 timer {
304 compatible = "arm,armv7-timer";
305 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
306 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
307 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
308 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
309 };
310
311 cmt0: timer@ffca0000 {
312 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
313 reg = <0 0xffca0000 0 0x1004>;
314 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
315 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
316 clocks = <&cpg CPG_MOD 124>;
317 clock-names = "fck";
318 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
319 resets = <&cpg 124>;
320
321 renesas,channels-mask = <0x60>;
322
323 status = "disabled";
324 };
325
326 cmt1: timer@e6130000 {
327 compatible = "renesas,cmt-48-r8a7790", "renesas,cmt-48-gen2";
328 reg = <0 0xe6130000 0 0x1004>;
329 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
330 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
331 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
332 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
333 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
334 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
335 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
336 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
337 clocks = <&cpg CPG_MOD 329>;
338 clock-names = "fck";
339 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
340 resets = <&cpg 329>;
341
342 renesas,channels-mask = <0xff>;
343
344 status = "disabled";
345 };
346
347 irqc0: interrupt-controller@e61c0000 {
348 compatible = "renesas,irqc-r8a7790", "renesas,irqc";
349 #interrupt-cells = <2>;
350 interrupt-controller;
351 reg = <0 0xe61c0000 0 0x200>;
352 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
353 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
354 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
355 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
356 clocks = <&cpg CPG_MOD 407>;
357 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
358 resets = <&cpg 407>;
359 };
360
361 dmac0: dma-controller@e6700000 {
362 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
363 reg = <0 0xe6700000 0 0x20000>;
364 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
365 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
366 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
367 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
368 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
369 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
370 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
371 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
372 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
373 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
374 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
375 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
376 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
377 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
378 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
379 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
380 interrupt-names = "error",
381 "ch0", "ch1", "ch2", "ch3",
382 "ch4", "ch5", "ch6", "ch7",
383 "ch8", "ch9", "ch10", "ch11",
384 "ch12", "ch13", "ch14";
385 clocks = <&cpg CPG_MOD 219>;
386 clock-names = "fck";
387 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
388 resets = <&cpg 219>;
389 #dma-cells = <1>;
390 dma-channels = <15>;
391 };
392
393 dmac1: dma-controller@e6720000 {
394 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
395 reg = <0 0xe6720000 0 0x20000>;
396 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
397 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
398 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
399 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
400 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
401 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
402 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
403 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
404 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
405 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
406 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
407 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
408 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
409 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
410 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
411 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
412 interrupt-names = "error",
413 "ch0", "ch1", "ch2", "ch3",
414 "ch4", "ch5", "ch6", "ch7",
415 "ch8", "ch9", "ch10", "ch11",
416 "ch12", "ch13", "ch14";
417 clocks = <&cpg CPG_MOD 218>;
418 clock-names = "fck";
419 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
420 resets = <&cpg 218>;
421 #dma-cells = <1>;
422 dma-channels = <15>;
423 };
424
425 audma0: dma-controller@ec700000 {
426 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
427 reg = <0 0xec700000 0 0x10000>;
428 interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
429 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
430 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
431 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
432 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
433 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
434 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
435 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
436 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
437 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
438 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
439 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
440 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
441 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>;
442 interrupt-names = "error",
443 "ch0", "ch1", "ch2", "ch3",
444 "ch4", "ch5", "ch6", "ch7",
445 "ch8", "ch9", "ch10", "ch11",
446 "ch12";
447 clocks = <&cpg CPG_MOD 502>;
448 clock-names = "fck";
449 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
450 resets = <&cpg 502>;
451 #dma-cells = <1>;
452 dma-channels = <13>;
453 };
454
455 audma1: dma-controller@ec720000 {
456 compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
457 reg = <0 0xec720000 0 0x10000>;
458 interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
459 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
460 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
461 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH
462 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
463 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
464 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
465 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
466 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
467 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
468 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
469 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
470 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
471 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
472 interrupt-names = "error",
473 "ch0", "ch1", "ch2", "ch3",
474 "ch4", "ch5", "ch6", "ch7",
475 "ch8", "ch9", "ch10", "ch11",
476 "ch12";
477 clocks = <&cpg CPG_MOD 501>;
478 clock-names = "fck";
479 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
480 resets = <&cpg 501>;
481 #dma-cells = <1>;
482 dma-channels = <13>;
483 };
484
485 usb_dmac0: dma-controller@e65a0000 {
486 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
487 reg = <0 0xe65a0000 0 0x100>;
488 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
489 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
490 interrupt-names = "ch0", "ch1";
491 clocks = <&cpg CPG_MOD 330>;
492 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
493 resets = <&cpg 330>;
494 #dma-cells = <1>;
495 dma-channels = <2>;
496 };
497
498 usb_dmac1: dma-controller@e65b0000 {
499 compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
500 reg = <0 0xe65b0000 0 0x100>;
501 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
502 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
503 interrupt-names = "ch0", "ch1";
504 clocks = <&cpg CPG_MOD 331>;
505 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
506 resets = <&cpg 331>;
507 #dma-cells = <1>;
508 dma-channels = <2>;
509 };
510
511 i2c0: i2c@e6508000 {
512 #address-cells = <1>;
513 #size-cells = <0>;
514 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
515 reg = <0 0xe6508000 0 0x40>;
516 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
517 clocks = <&cpg CPG_MOD 931>;
518 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
519 resets = <&cpg 931>;
520 i2c-scl-internal-delay-ns = <110>;
521 status = "disabled";
522 };
523
524 i2c1: i2c@e6518000 {
525 #address-cells = <1>;
526 #size-cells = <0>;
527 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
528 reg = <0 0xe6518000 0 0x40>;
529 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
530 clocks = <&cpg CPG_MOD 930>;
531 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
532 resets = <&cpg 930>;
533 i2c-scl-internal-delay-ns = <6>;
534 status = "disabled";
535 };
536
537 i2c2: i2c@e6530000 {
538 #address-cells = <1>;
539 #size-cells = <0>;
540 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
541 reg = <0 0xe6530000 0 0x40>;
542 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
543 clocks = <&cpg CPG_MOD 929>;
544 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
545 resets = <&cpg 929>;
546 i2c-scl-internal-delay-ns = <6>;
547 status = "disabled";
548 };
549
550 i2c3: i2c@e6540000 {
551 #address-cells = <1>;
552 #size-cells = <0>;
553 compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
554 reg = <0 0xe6540000 0 0x40>;
555 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
556 clocks = <&cpg CPG_MOD 928>;
557 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
558 resets = <&cpg 928>;
559 i2c-scl-internal-delay-ns = <110>;
560 status = "disabled";
561 };
562
563 iic0: i2c@e6500000 {
564 #address-cells = <1>;
565 #size-cells = <0>;
566 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
567 "renesas,rmobile-iic";
568 reg = <0 0xe6500000 0 0x425>;
569 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
570 clocks = <&cpg CPG_MOD 318>;
571 dmas = <&dmac0 0x61>, <&dmac0 0x62>,
572 <&dmac1 0x61>, <&dmac1 0x62>;
573 dma-names = "tx", "rx", "tx", "rx";
574 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
575 resets = <&cpg 318>;
576 status = "disabled";
577 };
578
579 iic1: i2c@e6510000 {
580 #address-cells = <1>;
581 #size-cells = <0>;
582 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
583 "renesas,rmobile-iic";
584 reg = <0 0xe6510000 0 0x425>;
585 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
586 clocks = <&cpg CPG_MOD 323>;
587 dmas = <&dmac0 0x65>, <&dmac0 0x66>,
588 <&dmac1 0x65>, <&dmac1 0x66>;
589 dma-names = "tx", "rx", "tx", "rx";
590 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
591 resets = <&cpg 323>;
592 status = "disabled";
593 };
594
595 iic2: i2c@e6520000 {
596 #address-cells = <1>;
597 #size-cells = <0>;
598 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
599 "renesas,rmobile-iic";
600 reg = <0 0xe6520000 0 0x425>;
601 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
602 clocks = <&cpg CPG_MOD 300>;
603 dmas = <&dmac0 0x69>, <&dmac0 0x6a>,
604 <&dmac1 0x69>, <&dmac1 0x6a>;
605 dma-names = "tx", "rx", "tx", "rx";
606 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
607 resets = <&cpg 300>;
608 status = "disabled";
609 };
610
611 iic3: i2c@e60b0000 {
612 #address-cells = <1>;
613 #size-cells = <0>;
614 compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
615 "renesas,rmobile-iic";
616 reg = <0 0xe60b0000 0 0x425>;
617 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
618 clocks = <&cpg CPG_MOD 926>;
619 dmas = <&dmac0 0x77>, <&dmac0 0x78>,
620 <&dmac1 0x77>, <&dmac1 0x78>;
621 dma-names = "tx", "rx", "tx", "rx";
622 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
623 resets = <&cpg 926>;
624 status = "disabled";
625 };
626
627 mmcif0: mmc@ee200000 {
628 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
629 reg = <0 0xee200000 0 0x80>;
630 interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
631 clocks = <&cpg CPG_MOD 315>;
632 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
633 <&dmac1 0xd1>, <&dmac1 0xd2>;
634 dma-names = "tx", "rx", "tx", "rx";
635 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
636 resets = <&cpg 315>;
637 reg-io-width = <4>;
638 status = "disabled";
639 max-frequency = <97500000>;
640 };
641
642 mmcif1: mmc@ee220000 {
643 compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
644 reg = <0 0xee220000 0 0x80>;
645 interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
646 clocks = <&cpg CPG_MOD 305>;
647 dmas = <&dmac0 0xe1>, <&dmac0 0xe2>,
648 <&dmac1 0xe1>, <&dmac1 0xe2>;
649 dma-names = "tx", "rx", "tx", "rx";
650 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
651 resets = <&cpg 305>;
652 reg-io-width = <4>;
653 status = "disabled";
654 max-frequency = <97500000>;
655 };
656
657 pfc: pin-controller@e6060000 {
658 compatible = "renesas,pfc-r8a7790";
659 reg = <0 0xe6060000 0 0x250>;
660 };
661
662 sdhi0: sd@ee100000 {
663 compatible = "renesas,sdhi-r8a7790";
664 reg = <0 0xee100000 0 0x328>;
665 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
666 clocks = <&cpg CPG_MOD 314>;
667 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
668 <&dmac1 0xcd>, <&dmac1 0xce>;
669 dma-names = "tx", "rx", "tx", "rx";
670 max-frequency = <195000000>;
671 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
672 resets = <&cpg 314>;
673 status = "disabled";
674 };
675
676 sdhi1: sd@ee120000 {
677 compatible = "renesas,sdhi-r8a7790";
678 reg = <0 0xee120000 0 0x328>;
679 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
680 clocks = <&cpg CPG_MOD 313>;
681 dmas = <&dmac0 0xc9>, <&dmac0 0xca>,
682 <&dmac1 0xc9>, <&dmac1 0xca>;
683 dma-names = "tx", "rx", "tx", "rx";
684 max-frequency = <195000000>;
685 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
686 resets = <&cpg 313>;
687 status = "disabled";
688 };
689
690 sdhi2: sd@ee140000 {
691 compatible = "renesas,sdhi-r8a7790";
692 reg = <0 0xee140000 0 0x100>;
693 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
694 clocks = <&cpg CPG_MOD 312>;
695 dmas = <&dmac0 0xc1>, <&dmac0 0xc2>,
696 <&dmac1 0xc1>, <&dmac1 0xc2>;
697 dma-names = "tx", "rx", "tx", "rx";
698 max-frequency = <97500000>;
699 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
700 resets = <&cpg 312>;
701 status = "disabled";
702 };
703
704 sdhi3: sd@ee160000 {
705 compatible = "renesas,sdhi-r8a7790";
706 reg = <0 0xee160000 0 0x100>;
707 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
708 clocks = <&cpg CPG_MOD 311>;
709 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
710 <&dmac1 0xd3>, <&dmac1 0xd4>;
711 dma-names = "tx", "rx", "tx", "rx";
712 max-frequency = <97500000>;
713 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
714 resets = <&cpg 311>;
715 status = "disabled";
716 };
717
718 scifa0: serial@e6c40000 {
719 compatible = "renesas,scifa-r8a7790",
720 "renesas,rcar-gen2-scifa", "renesas,scifa";
721 reg = <0 0xe6c40000 0 64>;
722 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
723 clocks = <&cpg CPG_MOD 204>;
724 clock-names = "fck";
725 dmas = <&dmac0 0x21>, <&dmac0 0x22>,
726 <&dmac1 0x21>, <&dmac1 0x22>;
727 dma-names = "tx", "rx", "tx", "rx";
728 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
729 resets = <&cpg 204>;
730 status = "disabled";
731 };
732
733 scifa1: serial@e6c50000 {
734 compatible = "renesas,scifa-r8a7790",
735 "renesas,rcar-gen2-scifa", "renesas,scifa";
736 reg = <0 0xe6c50000 0 64>;
737 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
738 clocks = <&cpg CPG_MOD 203>;
739 clock-names = "fck";
740 dmas = <&dmac0 0x25>, <&dmac0 0x26>,
741 <&dmac1 0x25>, <&dmac1 0x26>;
742 dma-names = "tx", "rx", "tx", "rx";
743 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
744 resets = <&cpg 203>;
745 status = "disabled";
746 };
747
748 scifa2: serial@e6c60000 {
749 compatible = "renesas,scifa-r8a7790",
750 "renesas,rcar-gen2-scifa", "renesas,scifa";
751 reg = <0 0xe6c60000 0 64>;
752 interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
753 clocks = <&cpg CPG_MOD 202>;
754 clock-names = "fck";
755 dmas = <&dmac0 0x27>, <&dmac0 0x28>,
756 <&dmac1 0x27>, <&dmac1 0x28>;
757 dma-names = "tx", "rx", "tx", "rx";
758 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
759 resets = <&cpg 202>;
760 status = "disabled";
761 };
762
763 scifb0: serial@e6c20000 {
764 compatible = "renesas,scifb-r8a7790",
765 "renesas,rcar-gen2-scifb", "renesas,scifb";
766 reg = <0 0xe6c20000 0 0x100>;
767 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
768 clocks = <&cpg CPG_MOD 206>;
769 clock-names = "fck";
770 dmas = <&dmac0 0x3d>, <&dmac0 0x3e>,
771 <&dmac1 0x3d>, <&dmac1 0x3e>;
772 dma-names = "tx", "rx", "tx", "rx";
773 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
774 resets = <&cpg 206>;
775 status = "disabled";
776 };
777
778 scifb1: serial@e6c30000 {
779 compatible = "renesas,scifb-r8a7790",
780 "renesas,rcar-gen2-scifb", "renesas,scifb";
781 reg = <0 0xe6c30000 0 0x100>;
782 interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
783 clocks = <&cpg CPG_MOD 207>;
784 clock-names = "fck";
785 dmas = <&dmac0 0x19>, <&dmac0 0x1a>,
786 <&dmac1 0x19>, <&dmac1 0x1a>;
787 dma-names = "tx", "rx", "tx", "rx";
788 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
789 resets = <&cpg 207>;
790 status = "disabled";
791 };
792
793 scifb2: serial@e6ce0000 {
794 compatible = "renesas,scifb-r8a7790",
795 "renesas,rcar-gen2-scifb", "renesas,scifb";
796 reg = <0 0xe6ce0000 0 0x100>;
797 interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
798 clocks = <&cpg CPG_MOD 216>;
799 clock-names = "fck";
800 dmas = <&dmac0 0x1d>, <&dmac0 0x1e>,
801 <&dmac1 0x1d>, <&dmac1 0x1e>;
802 dma-names = "tx", "rx", "tx", "rx";
803 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
804 resets = <&cpg 216>;
805 status = "disabled";
806 };
807
808 scif0: serial@e6e60000 {
809 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
810 "renesas,scif";
811 reg = <0 0xe6e60000 0 64>;
812 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
814 <&scif_clk>;
815 clock-names = "fck", "brg_int", "scif_clk";
816 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
817 <&dmac1 0x29>, <&dmac1 0x2a>;
818 dma-names = "tx", "rx", "tx", "rx";
819 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
820 resets = <&cpg 721>;
821 status = "disabled";
822 };
823
824 scif1: serial@e6e68000 {
825 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
826 "renesas,scif";
827 reg = <0 0xe6e68000 0 64>;
828 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
829 clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
830 <&scif_clk>;
831 clock-names = "fck", "brg_int", "scif_clk";
832 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
833 <&dmac1 0x2d>, <&dmac1 0x2e>;
834 dma-names = "tx", "rx", "tx", "rx";
835 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
836 resets = <&cpg 720>;
837 status = "disabled";
838 };
839
840 scif2: serial@e6e56000 {
841 compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
842 "renesas,scif";
843 reg = <0 0xe6e56000 0 64>;
844 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
845 clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
846 <&scif_clk>;
847 clock-names = "fck", "brg_int", "scif_clk";
848 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
849 <&dmac1 0x2b>, <&dmac1 0x2c>;
850 dma-names = "tx", "rx", "tx", "rx";
851 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
852 resets = <&cpg 310>;
853 status = "disabled";
854 };
855
856 hscif0: serial@e62c0000 {
857 compatible = "renesas,hscif-r8a7790",
858 "renesas,rcar-gen2-hscif", "renesas,hscif";
859 reg = <0 0xe62c0000 0 96>;
860 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
861 clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
862 <&scif_clk>;
863 clock-names = "fck", "brg_int", "scif_clk";
864 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
865 <&dmac1 0x39>, <&dmac1 0x3a>;
866 dma-names = "tx", "rx", "tx", "rx";
867 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
868 resets = <&cpg 717>;
869 status = "disabled";
870 };
871
872 hscif1: serial@e62c8000 {
873 compatible = "renesas,hscif-r8a7790",
874 "renesas,rcar-gen2-hscif", "renesas,hscif";
875 reg = <0 0xe62c8000 0 96>;
876 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
877 clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
878 <&scif_clk>;
879 clock-names = "fck", "brg_int", "scif_clk";
880 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
881 <&dmac1 0x4d>, <&dmac1 0x4e>;
882 dma-names = "tx", "rx", "tx", "rx";
883 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
884 resets = <&cpg 716>;
885 status = "disabled";
886 };
887
888 icram0: sram@e63a0000 {
889 compatible = "mmio-sram";
890 reg = <0 0xe63a0000 0 0x12000>;
891 };
892
893 icram1: sram@e63c0000 {
894 compatible = "mmio-sram";
895 reg = <0 0xe63c0000 0 0x1000>;
896 #address-cells = <1>;
897 #size-cells = <1>;
898 ranges = <0 0 0xe63c0000 0x1000>;
899
900 smp-sram@0 {
901 compatible = "renesas,smp-sram";
902 reg = <0 0x10>;
903 };
904 };
905
906 ether: ethernet@ee700000 {
907 compatible = "renesas,ether-r8a7790";
908 reg = <0 0xee700000 0 0x400>;
909 interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
910 clocks = <&cpg CPG_MOD 813>;
911 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
912 resets = <&cpg 813>;
913 phy-mode = "rmii";
914 #address-cells = <1>;
915 #size-cells = <0>;
916 status = "disabled";
917 };
918
919 avb: ethernet@e6800000 {
920 compatible = "renesas,etheravb-r8a7790",
921 "renesas,etheravb-rcar-gen2";
922 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
923 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
924 clocks = <&cpg CPG_MOD 812>;
925 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
926 resets = <&cpg 812>;
927 #address-cells = <1>;
928 #size-cells = <0>;
929 status = "disabled";
930 };
931
932 sata0: sata@ee300000 {
933 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
934 reg = <0 0xee300000 0 0x2000>;
935 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
936 clocks = <&cpg CPG_MOD 815>;
937 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
938 resets = <&cpg 815>;
939 status = "disabled";
940 };
941
942 sata1: sata@ee500000 {
943 compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
944 reg = <0 0xee500000 0 0x2000>;
945 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
946 clocks = <&cpg CPG_MOD 814>;
947 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
948 resets = <&cpg 814>;
949 status = "disabled";
950 };
951
952 hsusb: usb@e6590000 {
953 compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
954 reg = <0 0xe6590000 0 0x100>;
955 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
956 clocks = <&cpg CPG_MOD 704>;
957 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>,
958 <&usb_dmac1 0>, <&usb_dmac1 1>;
959 dma-names = "ch0", "ch1", "ch2", "ch3";
960 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
961 resets = <&cpg 704>;
962 renesas,buswait = <4>;
963 phys = <&usb0 1>;
964 phy-names = "usb";
965 status = "disabled";
966 };
967
968 usbphy: usb-phy@e6590100 {
969 compatible = "renesas,usb-phy-r8a7790",
970 "renesas,rcar-gen2-usb-phy";
971 reg = <0 0xe6590100 0 0x100>;
972 #address-cells = <1>;
973 #size-cells = <0>;
974 clocks = <&cpg CPG_MOD 704>;
975 clock-names = "usbhs";
976 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
977 resets = <&cpg 704>;
978 status = "disabled";
979
980 usb0: usb-channel@0 {
981 reg = <0>;
982 #phy-cells = <1>;
983 };
984 usb2: usb-channel@2 {
985 reg = <2>;
986 #phy-cells = <1>;
987 };
988 };
989
990 vin0: video@e6ef0000 {
991 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
992 reg = <0 0xe6ef0000 0 0x1000>;
993 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
994 clocks = <&cpg CPG_MOD 811>;
995 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
996 resets = <&cpg 811>;
997 status = "disabled";
998 };
999
1000 vin1: video@e6ef1000 {
1001 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1002 reg = <0 0xe6ef1000 0 0x1000>;
1003 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
1004 clocks = <&cpg CPG_MOD 810>;
1005 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1006 resets = <&cpg 810>;
1007 status = "disabled";
1008 };
1009
1010 vin2: video@e6ef2000 {
1011 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1012 reg = <0 0xe6ef2000 0 0x1000>;
1013 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
1014 clocks = <&cpg CPG_MOD 809>;
1015 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1016 resets = <&cpg 809>;
1017 status = "disabled";
1018 };
1019
1020 vin3: video@e6ef3000 {
1021 compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
1022 reg = <0 0xe6ef3000 0 0x1000>;
1023 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
1024 clocks = <&cpg CPG_MOD 808>;
1025 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1026 resets = <&cpg 808>;
1027 status = "disabled";
1028 };
1029
1030 vsp@fe920000 {
1031 compatible = "renesas,vsp1";
1032 reg = <0 0xfe920000 0 0x8000>;
1033 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
1034 clocks = <&cpg CPG_MOD 130>;
1035 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1036 resets = <&cpg 130>;
1037 };
1038
1039 vsp@fe928000 {
1040 compatible = "renesas,vsp1";
1041 reg = <0 0xfe928000 0 0x8000>;
1042 interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>;
1043 clocks = <&cpg CPG_MOD 131>;
1044 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1045 resets = <&cpg 131>;
1046 };
1047
1048 vsp@fe930000 {
1049 compatible = "renesas,vsp1";
1050 reg = <0 0xfe930000 0 0x8000>;
1051 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>;
1052 clocks = <&cpg CPG_MOD 128>;
1053 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1054 resets = <&cpg 128>;
1055 };
1056
1057 vsp@fe938000 {
1058 compatible = "renesas,vsp1";
1059 reg = <0 0xfe938000 0 0x8000>;
1060 interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
1061 clocks = <&cpg CPG_MOD 127>;
1062 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1063 resets = <&cpg 127>;
1064 };
1065
1066 du: display@feb00000 {
1067 compatible = "renesas,du-r8a7790";
1068 reg = <0 0xfeb00000 0 0x70000>,
1069 <0 0xfeb90000 0 0x1c>,
1070 <0 0xfeb94000 0 0x1c>;
1071 reg-names = "du", "lvds.0", "lvds.1";
1072 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
1073 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
1074 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
1075 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
1076 <&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
1077 <&cpg CPG_MOD 725>;
1078 clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
1079 status = "disabled";
1080
1081 ports {
1082 #address-cells = <1>;
1083 #size-cells = <0>;
1084
1085 port@0 {
1086 reg = <0>;
1087 du_out_rgb: endpoint {
1088 };
1089 };
1090 port@1 {
1091 reg = <1>;
1092 du_out_lvds0: endpoint {
1093 };
1094 };
1095 port@2 {
1096 reg = <2>;
1097 du_out_lvds1: endpoint {
1098 };
1099 };
1100 };
1101 };
1102
1103 can0: can@e6e80000 {
1104 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1105 reg = <0 0xe6e80000 0 0x1000>;
1106 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
1107 clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1108 <&can_clk>;
1109 clock-names = "clkp1", "clkp2", "can_clk";
1110 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1111 resets = <&cpg 916>;
1112 status = "disabled";
1113 };
1114
1115 can1: can@e6e88000 {
1116 compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
1117 reg = <0 0xe6e88000 0 0x1000>;
1118 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
1119 clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
1120 <&can_clk>;
1121 clock-names = "clkp1", "clkp2", "can_clk";
1122 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1123 resets = <&cpg 915>;
1124 status = "disabled";
1125 };
1126
1127 jpu: jpeg-codec@fe980000 {
1128 compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
1129 reg = <0 0xfe980000 0 0x10300>;
1130 interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
1131 clocks = <&cpg CPG_MOD 106>;
1132 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1133 resets = <&cpg 106>;
1134 };
1135
1136 /* External root clock */
1137 extal_clk: extal {
1138 compatible = "fixed-clock";
1139 #clock-cells = <0>;
1140 /* This value must be overridden by the board. */
1141 clock-frequency = <0>;
1142 };
1143
1144 /* External PCIe clock - can be overridden by the board */
1145 pcie_bus_clk: pcie_bus {
1146 compatible = "fixed-clock";
1147 #clock-cells = <0>;
1148 clock-frequency = <0>;
1149 };
1150
1151 /*
1152 * The external audio clocks are configured as 0 Hz fixed frequency
1153 * clocks by default.
1154 * Boards that provide audio clocks should override them.
1155 */
1156 audio_clk_a: audio_clk_a {
1157 compatible = "fixed-clock";
1158 #clock-cells = <0>;
1159 clock-frequency = <0>;
1160 };
1161 audio_clk_b: audio_clk_b {
1162 compatible = "fixed-clock";
1163 #clock-cells = <0>;
1164 clock-frequency = <0>;
1165 };
1166 audio_clk_c: audio_clk_c {
1167 compatible = "fixed-clock";
1168 #clock-cells = <0>;
1169 clock-frequency = <0>;
1170 };
1171
1172 /* External SCIF clock */
1173 scif_clk: scif {
1174 compatible = "fixed-clock";
1175 #clock-cells = <0>;
1176 /* This value must be overridden by the board. */
1177 clock-frequency = <0>;
1178 };
1179
1180 /* External USB clock - can be overridden by the board */
1181 usb_extal_clk: usb_extal {
1182 compatible = "fixed-clock";
1183 #clock-cells = <0>;
1184 clock-frequency = <48000000>;
1185 };
1186
1187 /* External CAN clock */
1188 can_clk: can {
1189 compatible = "fixed-clock";
1190 #clock-cells = <0>;
1191 /* This value must be overridden by the board. */
1192 clock-frequency = <0>;
1193 };
1194
1195 cpg: clock-controller@e6150000 {
1196 compatible = "renesas,r8a7790-cpg-mssr";
1197 reg = <0 0xe6150000 0 0x1000>;
1198 clocks = <&extal_clk>, <&usb_extal_clk>;
1199 clock-names = "extal", "usb_extal";
1200 #clock-cells = <2>;
1201 #power-domain-cells = <0>;
1202 #reset-cells = <1>;
1203 };
1204
1205 prr: chipid@ff000044 {
1206 compatible = "renesas,prr";
1207 reg = <0 0xff000044 0 4>;
1208 };
1209
1210 rst: reset-controller@e6160000 {
1211 compatible = "renesas,r8a7790-rst";
1212 reg = <0 0xe6160000 0 0x0100>;
1213 };
1214
1215 sysc: system-controller@e6180000 {
1216 compatible = "renesas,r8a7790-sysc";
1217 reg = <0 0xe6180000 0 0x0200>;
1218 #power-domain-cells = <1>;
1219 };
1220
1221 qspi: spi@e6b10000 {
1222 compatible = "renesas,qspi-r8a7790", "renesas,qspi";
1223 reg = <0 0xe6b10000 0 0x2c>;
1224 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
1225 clocks = <&cpg CPG_MOD 917>;
1226 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
1227 <&dmac1 0x17>, <&dmac1 0x18>;
1228 dma-names = "tx", "rx", "tx", "rx";
1229 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1230 resets = <&cpg 917>;
1231 num-cs = <1>;
1232 #address-cells = <1>;
1233 #size-cells = <0>;
1234 status = "disabled";
1235 };
1236
1237 msiof0: spi@e6e20000 {
1238 compatible = "renesas,msiof-r8a7790",
1239 "renesas,rcar-gen2-msiof";
1240 reg = <0 0xe6e20000 0 0x0064>;
1241 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
1242 clocks = <&cpg CPG_MOD 0>;
1243 dmas = <&dmac0 0x51>, <&dmac0 0x52>,
1244 <&dmac1 0x51>, <&dmac1 0x52>;
1245 dma-names = "tx", "rx", "tx", "rx";
1246 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1247 resets = <&cpg 0>;
1248 #address-cells = <1>;
1249 #size-cells = <0>;
1250 status = "disabled";
1251 };
1252
1253 msiof1: spi@e6e10000 {
1254 compatible = "renesas,msiof-r8a7790",
1255 "renesas,rcar-gen2-msiof";
1256 reg = <0 0xe6e10000 0 0x0064>;
1257 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>;
1258 clocks = <&cpg CPG_MOD 208>;
1259 dmas = <&dmac0 0x55>, <&dmac0 0x56>,
1260 <&dmac1 0x55>, <&dmac1 0x56>;
1261 dma-names = "tx", "rx", "tx", "rx";
1262 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1263 resets = <&cpg 208>;
1264 #address-cells = <1>;
1265 #size-cells = <0>;
1266 status = "disabled";
1267 };
1268
1269 msiof2: spi@e6e00000 {
1270 compatible = "renesas,msiof-r8a7790",
1271 "renesas,rcar-gen2-msiof";
1272 reg = <0 0xe6e00000 0 0x0064>;
1273 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
1274 clocks = <&cpg CPG_MOD 205>;
1275 dmas = <&dmac0 0x41>, <&dmac0 0x42>,
1276 <&dmac1 0x41>, <&dmac1 0x42>;
1277 dma-names = "tx", "rx", "tx", "rx";
1278 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1279 resets = <&cpg 205>;
1280 #address-cells = <1>;
1281 #size-cells = <0>;
1282 status = "disabled";
1283 };
1284
1285 msiof3: spi@e6c90000 {
1286 compatible = "renesas,msiof-r8a7790",
1287 "renesas,rcar-gen2-msiof";
1288 reg = <0 0xe6c90000 0 0x0064>;
1289 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;
1290 clocks = <&cpg CPG_MOD 215>;
1291 dmas = <&dmac0 0x45>, <&dmac0 0x46>,
1292 <&dmac1 0x45>, <&dmac1 0x46>;
1293 dma-names = "tx", "rx", "tx", "rx";
1294 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1295 resets = <&cpg 215>;
1296 #address-cells = <1>;
1297 #size-cells = <0>;
1298 status = "disabled";
1299 };
1300
1301 xhci: usb@ee000000 {
1302 compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
1303 reg = <0 0xee000000 0 0xc00>;
1304 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1305 clocks = <&cpg CPG_MOD 328>;
1306 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1307 resets = <&cpg 328>;
1308 phys = <&usb2 1>;
1309 phy-names = "usb";
1310 status = "disabled";
1311 };
1312
1313 pci0: pci@ee090000 {
1314 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1315 device_type = "pci";
1316 reg = <0 0xee090000 0 0xc00>,
1317 <0 0xee080000 0 0x1100>;
1318 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1319 clocks = <&cpg CPG_MOD 703>;
1320 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1321 resets = <&cpg 703>;
1322 status = "disabled";
1323
1324 bus-range = <0 0>;
1325 #address-cells = <3>;
1326 #size-cells = <2>;
1327 #interrupt-cells = <1>;
1328 ranges = <0x02000000 0 0xee080000 0 0xee080000 0 0x00010000>;
1329 interrupt-map-mask = <0xff00 0 0 0x7>;
1330 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1331 0x0800 0 0 1 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH
1332 0x1000 0 0 2 &gic GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1333
1334 usb@1,0 {
1335 reg = <0x800 0 0 0 0>;
1336 phys = <&usb0 0>;
1337 phy-names = "usb";
1338 };
1339
1340 usb@2,0 {
1341 reg = <0x1000 0 0 0 0>;
1342 phys = <&usb0 0>;
1343 phy-names = "usb";
1344 };
1345 };
1346
1347 pci1: pci@ee0b0000 {
1348 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1349 device_type = "pci";
1350 reg = <0 0xee0b0000 0 0xc00>,
1351 <0 0xee0a0000 0 0x1100>;
1352 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1353 clocks = <&cpg CPG_MOD 703>;
1354 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1355 resets = <&cpg 703>;
1356 status = "disabled";
1357
1358 bus-range = <1 1>;
1359 #address-cells = <3>;
1360 #size-cells = <2>;
1361 #interrupt-cells = <1>;
1362 ranges = <0x02000000 0 0xee0a0000 0 0xee0a0000 0 0x00010000>;
1363 interrupt-map-mask = <0xff00 0 0 0x7>;
1364 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1365 0x0800 0 0 1 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
1366 0x1000 0 0 2 &gic GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1367 };
1368
1369 pci2: pci@ee0d0000 {
1370 compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
1371 device_type = "pci";
1372 clocks = <&cpg CPG_MOD 703>;
1373 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1374 resets = <&cpg 703>;
1375 reg = <0 0xee0d0000 0 0xc00>,
1376 <0 0xee0c0000 0 0x1100>;
1377 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1378 status = "disabled";
1379
1380 bus-range = <2 2>;
1381 #address-cells = <3>;
1382 #size-cells = <2>;
1383 #interrupt-cells = <1>;
1384 ranges = <0x02000000 0 0xee0c0000 0 0xee0c0000 0 0x00010000>;
1385 interrupt-map-mask = <0xff00 0 0 0x7>;
1386 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1387 0x0800 0 0 1 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
1388 0x1000 0 0 2 &gic GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1389
1390 usb@1,0 {
1391 reg = <0x20800 0 0 0 0>;
1392 phys = <&usb2 0>;
1393 phy-names = "usb";
1394 };
1395
1396 usb@2,0 {
1397 reg = <0x21000 0 0 0 0>;
1398 phys = <&usb2 0>;
1399 phy-names = "usb";
1400 };
1401 };
1402
1403 pciec: pcie@fe000000 {
1404 compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
1405 reg = <0 0xfe000000 0 0x80000>;
1406 #address-cells = <3>;
1407 #size-cells = <2>;
1408 bus-range = <0x00 0xff>;
1409 device_type = "pci";
1410 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1411 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1412 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1413 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1414 /* Map all possible DDR as inbound ranges */
1415 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000
1416 0x43000000 1 0x80000000 1 0x80000000 0 0x80000000>;
1417 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1418 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1419 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1420 #interrupt-cells = <1>;
1421 interrupt-map-mask = <0 0 0 0>;
1422 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1423 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1424 clock-names = "pcie", "pcie_bus";
1425 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1426 resets = <&cpg 319>;
1427 status = "disabled";
1428 };
1429
1430 rcar_sound: sound@ec500000 {
1431 /*
1432 * #sound-dai-cells is required
1433 *
1434 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
1435 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
1436 */
1437 compatible = "renesas,rcar_sound-r8a7790", "renesas,rcar_sound-gen2";
1438 reg = <0 0xec500000 0 0x1000>, /* SCU */
1439 <0 0xec5a0000 0 0x100>, /* ADG */
1440 <0 0xec540000 0 0x1000>, /* SSIU */
1441 <0 0xec541000 0 0x280>, /* SSI */
1442 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/
1443 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
1444
1445 clocks = <&cpg CPG_MOD 1005>,
1446 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1447 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1448 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1449 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1450 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1451 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1452 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1453 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1454 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1455 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1456 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1457 <&cpg CPG_MOD 1021>, <&cpg CPG_MOD 1020>,
1458 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1459 <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
1460 <&cpg CPG_CORE R8A7790_CLK_M2>;
1461 clock-names = "ssi-all",
1462 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1463 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
1464 "src.9", "src.8", "src.7", "src.6", "src.5",
1465 "src.4", "src.3", "src.2", "src.1", "src.0",
1466 "ctu.0", "ctu.1",
1467 "mix.0", "mix.1",
1468 "dvc.0", "dvc.1",
1469 "clk_a", "clk_b", "clk_c", "clk_i";
1470 power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
1471 resets = <&cpg 1005>,
1472 <&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
1473 <&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
1474 <&cpg 1014>, <&cpg 1015>;
1475 reset-names = "ssi-all",
1476 "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
1477 "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
1478
1479 status = "disabled";
1480
1481 rcar_sound,dvc {
1482 dvc0: dvc-0 {
1483 dmas = <&audma1 0xbc>;
1484 dma-names = "tx";
1485 };
1486 dvc1: dvc-1 {
1487 dmas = <&audma1 0xbe>;
1488 dma-names = "tx";
1489 };
1490 };
1491
1492 rcar_sound,mix {
1493 mix0: mix-0 { };
1494 mix1: mix-1 { };
1495 };
1496
1497 rcar_sound,ctu {
1498 ctu00: ctu-0 { };
1499 ctu01: ctu-1 { };
1500 ctu02: ctu-2 { };
1501 ctu03: ctu-3 { };
1502 ctu10: ctu-4 { };
1503 ctu11: ctu-5 { };
1504 ctu12: ctu-6 { };
1505 ctu13: ctu-7 { };
1506 };
1507
1508 rcar_sound,src {
1509 src0: src-0 {
1510 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
1511 dmas = <&audma0 0x85>, <&audma1 0x9a>;
1512 dma-names = "rx", "tx";
1513 };
1514 src1: src-1 {
1515 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
1516 dmas = <&audma0 0x87>, <&audma1 0x9c>;
1517 dma-names = "rx", "tx";
1518 };
1519 src2: src-2 {
1520 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
1521 dmas = <&audma0 0x89>, <&audma1 0x9e>;
1522 dma-names = "rx", "tx";
1523 };
1524 src3: src-3 {
1525 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
1526 dmas = <&audma0 0x8b>, <&audma1 0xa0>;
1527 dma-names = "rx", "tx";
1528 };
1529 src4: src-4 {
1530 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
1531 dmas = <&audma0 0x8d>, <&audma1 0xb0>;
1532 dma-names = "rx", "tx";
1533 };
1534 src5: src-5 {
1535 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
1536 dmas = <&audma0 0x8f>, <&audma1 0xb2>;
1537 dma-names = "rx", "tx";
1538 };
1539 src6: src-6 {
1540 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
1541 dmas = <&audma0 0x91>, <&audma1 0xb4>;
1542 dma-names = "rx", "tx";
1543 };
1544 src7: src-7 {
1545 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
1546 dmas = <&audma0 0x93>, <&audma1 0xb6>;
1547 dma-names = "rx", "tx";
1548 };
1549 src8: src-8 {
1550 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
1551 dmas = <&audma0 0x95>, <&audma1 0xb8>;
1552 dma-names = "rx", "tx";
1553 };
1554 src9: src-9 {
1555 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
1556 dmas = <&audma0 0x97>, <&audma1 0xba>;
1557 dma-names = "rx", "tx";
1558 };
1559 };
1560
1561 rcar_sound,ssi {
1562 ssi0: ssi-0 {
1563 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
1564 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
1565 dma-names = "rx", "tx", "rxu", "txu";
1566 };
1567 ssi1: ssi-1 {
1568 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
1569 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
1570 dma-names = "rx", "tx", "rxu", "txu";
1571 };
1572 ssi2: ssi-2 {
1573 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
1574 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
1575 dma-names = "rx", "tx", "rxu", "txu";
1576 };
1577 ssi3: ssi-3 {
1578 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
1579 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
1580 dma-names = "rx", "tx", "rxu", "txu";
1581 };
1582 ssi4: ssi-4 {
1583 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
1584 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
1585 dma-names = "rx", "tx", "rxu", "txu";
1586 };
1587 ssi5: ssi-5 {
1588 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
1589 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
1590 dma-names = "rx", "tx", "rxu", "txu";
1591 };
1592 ssi6: ssi-6 {
1593 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
1594 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
1595 dma-names = "rx", "tx", "rxu", "txu";
1596 };
1597 ssi7: ssi-7 {
1598 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
1599 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
1600 dma-names = "rx", "tx", "rxu", "txu";
1601 };
1602 ssi8: ssi-8 {
1603 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
1604 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
1605 dma-names = "rx", "tx", "rxu", "txu";
1606 };
1607 ssi9: ssi-9 {
1608 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
1609 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
1610 dma-names = "rx", "tx", "rxu", "txu";
1611 };
1612 };
1613 };
1614
1615 ipmmu_sy0: mmu@e6280000 {
1616 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1617 reg = <0 0xe6280000 0 0x1000>;
1618 interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
1619 <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
1620 #iommu-cells = <1>;
1621 status = "disabled";
1622 };
1623
1624 ipmmu_sy1: mmu@e6290000 {
1625 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1626 reg = <0 0xe6290000 0 0x1000>;
1627 interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
1628 #iommu-cells = <1>;
1629 status = "disabled";
1630 };
1631
1632 ipmmu_ds: mmu@e6740000 {
1633 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1634 reg = <0 0xe6740000 0 0x1000>;
1635 interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
1636 <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
1637 #iommu-cells = <1>;
1638 status = "disabled";
1639 };
1640
1641 ipmmu_mp: mmu@ec680000 {
1642 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1643 reg = <0 0xec680000 0 0x1000>;
1644 interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
1645 #iommu-cells = <1>;
1646 status = "disabled";
1647 };
1648
1649 ipmmu_mx: mmu@fe951000 {
1650 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1651 reg = <0 0xfe951000 0 0x1000>;
1652 interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
1653 <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
1654 #iommu-cells = <1>;
1655 status = "disabled";
1656 };
1657
1658 ipmmu_rt: mmu@ffc80000 {
1659 compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
1660 reg = <0 0xffc80000 0 0x1000>;
1661 interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
1662 #iommu-cells = <1>;
1663 status = "disabled";
1664 };
1665};