| Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/hwmon/amd,sbrmi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: > |
| 8 | Sideband Remote Management Interface (SB-RMI) compliant |
| 9 | AMD SoC power device. |
| 10 | |
| 11 | maintainers: |
| 12 | - Akshay Gupta <Akshay.Gupta@amd.com> |
| 13 | |
| 14 | description: | |
| 15 | SB Remote Management Interface (SB-RMI) is an SMBus compatible |
| 16 | interface that reports AMD SoC's Power (normalized Power) using, |
| 17 | Mailbox Service Request and resembles a typical 8-pin remote power |
| 18 | sensor's I2C interface to BMC. The power attributes in hwmon |
| 19 | reports power in microwatts. |
| 20 | |
| 21 | properties: |
| 22 | compatible: |
| 23 | enum: |
| 24 | - amd,sbrmi |
| 25 | |
| 26 | reg: |
| 27 | maxItems: 1 |
| 28 | description: | |
| 29 | I2C bus address of the device as specified in Section SBI SMBus Address |
| 30 | of the SoC register reference. The SB-RMI address is normally 78h for |
| 31 | socket 0 and 70h for socket 1, but it could vary based on hardware |
| 32 | address select pins. |
| 33 | \[open source SoC register reference\] |
| 34 | https://www.amd.com/en/support/tech-docs?keyword=55898 |
| 35 | |
| 36 | required: |
| 37 | - compatible |
| 38 | - reg |
| 39 | |
| 40 | additionalProperties: false |
| 41 | |
| 42 | examples: |
| 43 | - | |
| 44 | i2c { |
| 45 | #address-cells = <1>; |
| 46 | #size-cells = <0>; |
| 47 | |
| 48 | sbrmi@3c { |
| 49 | compatible = "amd,sbrmi"; |
| 50 | reg = <0x3c>; |
| 51 | }; |
| 52 | }; |
| 53 | ... |