blob: f49e7341fe0b2a20d9b3fd9588aca7ff40c0e617 [file] [log] [blame]
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03004#include <dt-bindings/input/input.h>
5#include "tegra30.dtsi"
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03006
7/ {
8 model = "ASUS VivoTab RT TF600T";
9 compatible = "asus,tf600t", "nvidia,tegra30";
10
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +030011 chosen {
12 stdout-path = &uarta;
13 };
14
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +030015 aliases {
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +030016 i2c0 = &pwr_i2c;
17
18 mmc0 = &sdmmc4; /* eMMC */
19 mmc1 = &sdmmc1; /* uSD slot */
20
21 rtc0 = &pmic;
22 rtc1 = "/rtc@7000e000";
23
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +030024 spi0 = &spi4;
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +030025
26 usb0 = &usb1;
27 usb1 = &usb3; /* Dock USB */
28 };
29
30 memory {
31 device_type = "memory";
32 reg = <0x80000000 0x80000000>;
33 };
34
35 host1x@50000000 {
36 dc@54200000 {
37 clocks = <&tegra_car TEGRA30_CLK_DISP1>,
38 <&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
39
40 rgb {
41 status = "okay";
42
43 nvidia,panel = <&dsia>;
44 };
45 };
46
47 dsia: dsi@54300000 {
48 status = "okay";
49
50 avdd-dsi-csi-supply = <&avdd_dsi_csi>;
51
52 panel = <&panel>;
53 };
54 };
55
Svyatoslav Ryhelf3947d42023-11-27 19:20:21 +020056 pinmux@70000868 {
57 pinctrl-names = "default";
58 pinctrl-0 = <&state_default>;
59
60 state_default: pinmux {
61 /* SDMMC1 pinmux */
62 sdmmc1_clk {
63 nvidia,pins = "sdmmc1_clk_pz0";
64 nvidia,function = "sdmmc1";
65 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
66 nvidia,tristate = <TEGRA_PIN_DISABLE>;
67 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
68 };
69 sdmmc1_cmd {
70 nvidia,pins = "sdmmc1_dat3_py4",
71 "sdmmc1_dat2_py5",
72 "sdmmc1_dat1_py6",
73 "sdmmc1_dat0_py7",
74 "sdmmc1_cmd_pz1";
75 nvidia,function = "sdmmc1";
76 nvidia,pull = <TEGRA_PIN_PULL_UP>;
77 nvidia,tristate = <TEGRA_PIN_DISABLE>;
78 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
79 };
80 sdmmc1_cd {
81 nvidia,pins = "gmi_iordy_pi5";
82 nvidia,function = "rsvd1";
83 nvidia,pull = <TEGRA_PIN_PULL_UP>;
84 nvidia,tristate = <TEGRA_PIN_DISABLE>;
85 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
86 };
87 sdmmc1_wp {
88 nvidia,pins = "vi_d11_pt3";
89 nvidia,function = "rsvd2";
90 nvidia,pull = <TEGRA_PIN_PULL_UP>;
91 nvidia,tristate = <TEGRA_PIN_DISABLE>;
92 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
93 };
94
95 /* SDMMC2 pinmux */
96 vi_d1_pd5 {
97 nvidia,pins = "vi_d1_pd5",
98 "vi_d2_pl0",
99 "vi_d3_pl1",
100 "vi_d5_pl3",
101 "vi_d7_pl5";
102 nvidia,function = "sdmmc2";
103 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104 nvidia,tristate = <TEGRA_PIN_DISABLE>;
105 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106 };
107 vi_d8_pl6 {
108 nvidia,pins = "vi_d8_pl6",
109 "vi_d9_pl7";
110 nvidia,function = "sdmmc2";
111 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
112 nvidia,tristate = <TEGRA_PIN_DISABLE>;
113 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
114 nvidia,lock = <0>;
115 nvidia,ioreset = <0>;
116 };
117
118 /* SDMMC3 pinmux */
119 sdmmc3_clk {
120 nvidia,pins = "sdmmc3_clk_pa6";
121 nvidia,function = "sdmmc3";
122 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
123 nvidia,tristate = <TEGRA_PIN_DISABLE>;
124 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
125 };
126 sdmmc3_cmd {
127 nvidia,pins = "sdmmc3_cmd_pa7",
128 "sdmmc3_dat0_pb7",
129 "sdmmc3_dat1_pb6",
130 "sdmmc3_dat2_pb5",
131 "sdmmc3_dat3_pb4",
132 "sdmmc3_dat4_pd1",
133 "sdmmc3_dat5_pd0",
134 "sdmmc3_dat6_pd3",
135 "sdmmc3_dat7_pd4";
136 nvidia,function = "sdmmc3";
137 nvidia,pull = <TEGRA_PIN_PULL_UP>;
138 nvidia,tristate = <TEGRA_PIN_DISABLE>;
139 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
140 };
141
142 /* SDMMC4 pinmux */
143 sdmmc4_clk {
144 nvidia,pins = "sdmmc4_clk_pcc4";
145 nvidia,function = "sdmmc4";
146 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
147 nvidia,tristate = <TEGRA_PIN_DISABLE>;
148 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
149 };
150 sdmmc4_cmd {
151 nvidia,pins = "sdmmc4_cmd_pt7",
152 "sdmmc4_dat0_paa0",
153 "sdmmc4_dat1_paa1",
154 "sdmmc4_dat2_paa2",
155 "sdmmc4_dat3_paa3",
156 "sdmmc4_dat4_paa4",
157 "sdmmc4_dat5_paa5",
158 "sdmmc4_dat6_paa6",
159 "sdmmc4_dat7_paa7";
160 nvidia,function = "sdmmc4";
161 nvidia,pull = <TEGRA_PIN_PULL_UP>;
162 nvidia,tristate = <TEGRA_PIN_DISABLE>;
163 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
164 };
165 sdmmc4_rst_n {
166 nvidia,pins = "sdmmc4_rst_n_pcc3";
167 nvidia,function = "rsvd2";
168 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
169 nvidia,tristate = <TEGRA_PIN_DISABLE>;
170 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
171 };
172 cam_mclk {
173 nvidia,pins = "cam_mclk_pcc0";
174 nvidia,function = "vi_alt3";
175 nvidia,pull = <TEGRA_PIN_PULL_UP>;
176 nvidia,tristate = <TEGRA_PIN_DISABLE>;
177 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
178 };
179
180 /* I2C pinmux */
181 gen1_i2c {
182 nvidia,pins = "gen1_i2c_scl_pc4",
183 "gen1_i2c_sda_pc5";
184 nvidia,function = "i2c1";
185 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
186 nvidia,tristate = <TEGRA_PIN_DISABLE>;
187 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
188 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
189 nvidia,lock = <0>;
190 };
191 gen2_i2c {
192 nvidia,pins = "gen2_i2c_scl_pt5",
193 "gen2_i2c_sda_pt6";
194 nvidia,function = "i2c2";
195 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
196 nvidia,tristate = <TEGRA_PIN_DISABLE>;
197 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
198 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
199 nvidia,lock = <0>;
200 };
201 cam_i2c {
202 nvidia,pins = "cam_i2c_scl_pbb1",
203 "cam_i2c_sda_pbb2";
204 nvidia,function = "i2c3";
205 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206 nvidia,tristate = <TEGRA_PIN_DISABLE>;
207 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
208 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
209 nvidia,lock = <0>;
210 };
211 ddc_i2c {
212 nvidia,pins = "ddc_scl_pv4",
213 "ddc_sda_pv5";
214 nvidia,function = "i2c4";
215 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216 nvidia,tristate = <TEGRA_PIN_DISABLE>;
217 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218 nvidia,lock = <0>;
219 };
220 pwr_i2c {
221 nvidia,pins = "pwr_i2c_scl_pz6",
222 "pwr_i2c_sda_pz7";
223 nvidia,function = "i2cpwr";
224 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
225 nvidia,tristate = <TEGRA_PIN_DISABLE>;
226 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
227 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
228 nvidia,lock = <0>;
229 };
230 hotplug_i2c {
231 nvidia,pins = "pu4";
232 nvidia,function = "rsvd4";
233 nvidia,pull = <TEGRA_PIN_PULL_UP>;
234 nvidia,tristate = <TEGRA_PIN_DISABLE>;
235 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
236 };
237
238 /* HDMI pinmux */
239 hdmi_cec {
240 nvidia,pins = "hdmi_cec_pee3";
241 nvidia,function = "cec";
242 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
243 nvidia,tristate = <TEGRA_PIN_DISABLE>;
244 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
245 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
246 nvidia,lock = <0>;
247 };
248 hdmi_hpd {
249 nvidia,pins = "hdmi_int_pn7";
250 nvidia,function = "hdmi";
251 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
252 nvidia,tristate = <TEGRA_PIN_ENABLE>;
253 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
254 };
255
256 /* UART-A */
257 ulpi_data0_po1 {
258 nvidia,pins = "ulpi_data0_po1";
259 nvidia,function = "uarta";
260 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
261 nvidia,tristate = <TEGRA_PIN_DISABLE>;
262 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
263 };
264 ulpi_data1_po2 {
265 nvidia,pins = "ulpi_data1_po2";
266 nvidia,function = "uarta";
267 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
268 nvidia,tristate = <TEGRA_PIN_ENABLE>;
269 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
270 };
271 ulpi_data5_po6 {
272 nvidia,pins = "ulpi_data5_po6";
273 nvidia,function = "uarta";
274 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
275 nvidia,tristate = <TEGRA_PIN_ENABLE>;
276 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
277 };
278 ulpi_data7_po0 {
279 nvidia,pins = "ulpi_data7_po0",
280 "ulpi_data2_po3",
281 "ulpi_data3_po4",
282 "ulpi_data4_po5",
283 "ulpi_data6_po7";
284 nvidia,function = "uarta";
285 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
286 nvidia,tristate = <TEGRA_PIN_DISABLE>;
287 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
288 };
289
290 /* UART-B */
291 uartb_txd_rts {
292 nvidia,pins = "uart2_txd_pc2",
293 "uart2_rts_n_pj6";
294 nvidia,function = "uartb";
295 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
296 nvidia,tristate = <TEGRA_PIN_DISABLE>;
297 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
298 };
299 uartb_rxd_cts {
300 nvidia,pins = "uart2_rxd_pc3",
301 "uart2_cts_n_pj5";
302 nvidia,function = "uartb";
303 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
304 nvidia,tristate = <TEGRA_PIN_DISABLE>;
305 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
306 };
307
308 /* UART-C */
309 uartc_rxd_cts {
310 nvidia,pins = "uart3_cts_n_pa1",
311 "uart3_rxd_pw7";
312 nvidia,function = "uartc";
313 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
314 nvidia,tristate = <TEGRA_PIN_DISABLE>;
315 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
316 };
317 uartc_txd_rts {
318 nvidia,pins = "uart3_rts_n_pc0",
319 "uart3_txd_pw6";
320 nvidia,function = "uartc";
321 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
322 nvidia,tristate = <TEGRA_PIN_DISABLE>;
323 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
324 };
325
326 /* UART-D */
327 ulpi_nxt_py2 {
328 nvidia,pins = "ulpi_nxt_py2";
329 nvidia,function = "uartd";
330 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
331 nvidia,tristate = <TEGRA_PIN_ENABLE>;
332 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
333 };
334 ulpi_clk_py0 {
335 nvidia,pins = "ulpi_clk_py0",
336 "ulpi_dir_py1",
337 "ulpi_stp_py3";
338 nvidia,function = "uartd";
339 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
340 nvidia,tristate = <TEGRA_PIN_ENABLE>;
341 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
342 };
343
344 /* I2S pinmux */
345 dap_i2s0 {
346 nvidia,pins = "dap1_fs_pn0",
347 "dap1_din_pn1",
348 "dap1_dout_pn2",
349 "dap1_sclk_pn3";
350 nvidia,function = "i2s0";
351 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
352 nvidia,tristate = <TEGRA_PIN_ENABLE>;
353 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
354 };
355 dap_i2s1 {
356 nvidia,pins = "dap2_fs_pa2",
357 "dap2_sclk_pa3",
358 "dap2_din_pa4",
359 "dap2_dout_pa5";
360 nvidia,function = "i2s1";
361 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
362 nvidia,tristate = <TEGRA_PIN_DISABLE>;
363 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
364 };
365 dap3_fs {
366 nvidia,pins = "dap3_fs_pp0";
367 nvidia,function = "i2s2";
368 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
369 nvidia,tristate = <TEGRA_PIN_ENABLE>;
370 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
371 };
372 dap3_din {
373 nvidia,pins = "dap3_din_pp1";
374 nvidia,function = "i2s2";
375 nvidia,pull = <TEGRA_PIN_PULL_UP>;
376 nvidia,tristate = <TEGRA_PIN_DISABLE>;
377 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
378 };
379 dap3_dout {
380 nvidia,pins = "dap3_dout_pp2",
381 "dap3_sclk_pp3";
382 nvidia,function = "i2s2";
383 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
384 nvidia,tristate = <TEGRA_PIN_DISABLE>;
385 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
386 };
387 dap_i2s3 {
388 nvidia,pins = "dap4_fs_pp4",
389 "dap4_din_pp5",
390 "dap4_dout_pp6",
391 "dap4_sclk_pp7";
392 nvidia,function = "i2s3";
393 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
394 nvidia,tristate = <TEGRA_PIN_DISABLE>;
395 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
396 };
397 i2s4 {
398 nvidia,pins = "pbb7";
399 nvidia,function = "i2s4";
400 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
401 nvidia,tristate = <TEGRA_PIN_DISABLE>;
402 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
403 };
404
405 /* Sensors pinmux */
406 nct_irq {
407 nvidia,pins = "pcc2";
408 nvidia,function = "i2s4";
409 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
410 nvidia,tristate = <TEGRA_PIN_DISABLE>;
411 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
412 };
413 hall {
414 nvidia,pins = "pbb6";
415 nvidia,function = "vgp6";
416 nvidia,pull = <TEGRA_PIN_PULL_UP>;
417 nvidia,tristate = <TEGRA_PIN_DISABLE>;
418 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
419 };
420
421 /* Asus EC pinmux */
422 ec_irqs {
423 nvidia,pins = "kb_row10_ps2",
424 "kb_row15_ps7";
425 nvidia,function = "kbc";
426 nvidia,pull = <TEGRA_PIN_PULL_UP>;
427 nvidia,tristate = <TEGRA_PIN_DISABLE>;
428 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
429 };
430 ec_reqs {
431 nvidia,pins = "kb_col1_pq1";
432 nvidia,function = "kbc";
433 nvidia,pull = <TEGRA_PIN_PULL_UP>;
434 nvidia,tristate = <TEGRA_PIN_DISABLE>;
435 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
436 };
437
438 /* Memory type bootstrap */
439 mem_boostraps {
440 nvidia,pins = "gmi_ad4_pg4",
441 "gmi_ad5_pg5";
442 nvidia,function = "nand";
443 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
444 nvidia,tristate = <TEGRA_PIN_DISABLE>;
445 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
446 };
447
448 /* PCI-e pinmux */
449 pex_l2_rst_n {
450 nvidia,pins = "pex_l2_rst_n_pcc6",
451 "pex_l0_rst_n_pdd1",
452 "pex_l1_rst_n_pdd5";
453 nvidia,function = "pcie";
454 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
455 nvidia,tristate = <TEGRA_PIN_DISABLE>;
456 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
457 };
458 pex_l2_clkreq_n {
459 nvidia,pins = "pex_l2_clkreq_n_pcc7",
460 "pex_l0_prsnt_n_pdd0",
461 "pex_l0_clkreq_n_pdd2",
462 "pex_wake_n_pdd3",
463 "pex_l1_prsnt_n_pdd4",
464 "pex_l1_clkreq_n_pdd6",
465 "pex_l2_prsnt_n_pdd7";
466 nvidia,function = "pcie";
467 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
468 nvidia,tristate = <TEGRA_PIN_DISABLE>;
469 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
470 };
471
472 /* Display A pinmux */
473 lcd_pwr0_pb2 {
474 nvidia,pins = "lcd_pwr0_pb2",
475 "lcd_pclk_pb3",
476 "lcd_pwr1_pc1",
477 "lcd_d0_pe0",
478 "lcd_d1_pe1",
479 "lcd_d2_pe2",
480 "lcd_d3_pe3",
481 "lcd_d4_pe4",
482 "lcd_d5_pe5",
483 "lcd_d6_pe6",
484 "lcd_d7_pe7",
485 "lcd_d8_pf0",
486 "lcd_d9_pf1",
487 "lcd_d10_pf2",
488 "lcd_d11_pf3",
489 "lcd_d12_pf4",
490 "lcd_d13_pf5",
491 "lcd_d14_pf6",
492 "lcd_d15_pf7",
493 "lcd_de_pj1",
494 "lcd_hsync_pj3",
495 "lcd_vsync_pj4",
496 "lcd_d16_pm0",
497 "lcd_d17_pm1",
498 "lcd_d18_pm2",
499 "lcd_d19_pm3",
500 "lcd_d20_pm4",
501 "lcd_d21_pm5",
502 "lcd_d22_pm6",
503 "lcd_d23_pm7",
504 "lcd_cs1_n_pw0",
505 "lcd_m1_pw1",
506 "lcd_dc0_pn6",
507 "lcd_sck_pz4",
508 "lcd_sdin_pz2";
509 nvidia,function = "displaya";
510 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
511 nvidia,tristate = <TEGRA_PIN_DISABLE>;
512 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
513 };
514 lcd_cs0_n_pn4 {
515 nvidia,pins = "lcd_sdout_pn5",
516 "lcd_wr_n_pz3",
517 "lcd_pwr2_pc6",
518 "lcd_dc1_pd2";
519 nvidia,function = "displaya";
520 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
521 nvidia,tristate = <TEGRA_PIN_ENABLE>;
522 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
523 };
524
525 blink {
526 nvidia,pins = "clk_32k_out_pa0";
527 nvidia,function = "blink";
528 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
529 nvidia,tristate = <TEGRA_PIN_DISABLE>;
530 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
531 };
532
533 /* KBC keys */
534 kb_col0 {
535 nvidia,pins = "kb_col0_pq0",
536 "kb_row1_pr1",
537 "kb_row3_pr3",
538 "kb_row6_pr6",
539 "kb_row8_ps0",
540 "kb_row9_ps1",
541 "kb_row11_ps3",
542 "kb_row14_ps6",
543 "kb_col6_pq6";
544 nvidia,function = "kbc";
545 nvidia,pull = <TEGRA_PIN_PULL_UP>;
546 nvidia,tristate = <TEGRA_PIN_DISABLE>;
547 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
548 };
549 kb_col5 {
550 nvidia,pins = "kb_col5_pq5",
551 "kb_col7_pq7",
552 "kb_row2_pr2",
553 "kb_row4_pr4",
554 "kb_row5_pr5",
555 "kb_row13_ps5";
556 nvidia,function = "kbc";
557 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
558 nvidia,tristate = <TEGRA_PIN_ENABLE>;
559 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
560 };
561
562 gmi_cs0_n_pj0 {
563 nvidia,pins = "gmi_wp_n_pc7",
564 "gmi_wait_pi7",
565 "gmi_cs0_n_pj0",
566 "gmi_cs1_n_pj2",
567 "gmi_cs2_n_pk3",
568 "gmi_cs3_n_pk4";
569 nvidia,function = "rsvd1";
570 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
571 nvidia,tristate = <TEGRA_PIN_ENABLE>;
572 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
573 };
574 vi_pclk_pt0 {
575 nvidia,pins = "vi_pclk_pt0";
576 nvidia,function = "rsvd1";
577 nvidia,pull = <TEGRA_PIN_PULL_UP>;
578 nvidia,tristate = <TEGRA_PIN_ENABLE>;
579 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
580 nvidia,lock = <0>;
581 nvidia,ioreset = <0>;
582 };
583
584 /* GPIO keys pinmux */
585 power_key {
586 nvidia,pins = "pv0";
587 nvidia,function = "rsvd1";
588 nvidia,pull = <TEGRA_PIN_PULL_UP>;
589 nvidia,tristate = <TEGRA_PIN_ENABLE>;
590 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
591 };
592 vol_keys {
593 nvidia,pins = "kb_col3_pq3",
594 "kb_col4_pq4";
595 nvidia,function = "rsvd4";
596 nvidia,pull = <TEGRA_PIN_PULL_UP>;
597 nvidia,tristate = <TEGRA_PIN_ENABLE>;
598 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
599 };
600
601 /* Bluetooth */
602 bt_shutdown {
603 nvidia,pins = "pu0";
604 nvidia,function = "rsvd4";
605 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
606 nvidia,tristate = <TEGRA_PIN_DISABLE>;
607 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
608 };
609 bt_dev_wake {
610 nvidia,pins = "pu1";
611 nvidia,function = "rsvd1";
612 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
613 nvidia,tristate = <TEGRA_PIN_DISABLE>;
614 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
615 };
616 bt_host_wake {
617 nvidia,pins = "pu6";
618 nvidia,function = "rsvd4";
619 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
620 nvidia,tristate = <TEGRA_PIN_DISABLE>;
621 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
622 };
623
624 pu2 {
625 nvidia,pins = "pu2";
626 nvidia,function = "rsvd1";
627 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
628 nvidia,tristate = <TEGRA_PIN_DISABLE>;
629 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
630 };
631 pu3 {
632 nvidia,pins = "pu3";
633 nvidia,function = "rsvd4";
634 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
635 nvidia,tristate = <TEGRA_PIN_DISABLE>;
636 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
637 };
638 pcc1 {
639 nvidia,pins = "pcc1";
640 nvidia,function = "rsvd2";
641 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
642 nvidia,tristate = <TEGRA_PIN_ENABLE>;
643 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
644 };
645 pv2 {
646 nvidia,pins = "pv2";
647 nvidia,function = "rsvd2";
648 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
649 nvidia,tristate = <TEGRA_PIN_DISABLE>;
650 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
651 };
652 pv3 {
653 nvidia,pins = "pv3";
654 nvidia,function = "rsvd2";
655 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
656 nvidia,tristate = <TEGRA_PIN_ENABLE>;
657 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
658 };
659 vi_vsync_pd6 {
660 nvidia,pins = "vi_vsync_pd6",
661 "vi_hsync_pd7";
662 nvidia,function = "rsvd2";
663 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
664 nvidia,tristate = <TEGRA_PIN_DISABLE>;
665 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
666 nvidia,lock = <0>;
667 nvidia,ioreset = <0>;
668 };
669 vi_d10_pt2 {
670 nvidia,pins = "vi_d10_pt2",
671 "vi_d0_pt4", "pbb0";
672 nvidia,function = "rsvd2";
673 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
674 nvidia,tristate = <TEGRA_PIN_DISABLE>;
675 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
676 };
677
678 kb_row0_pr0 {
679 nvidia,pins = "kb_row0_pr0";
680 nvidia,function = "rsvd4";
681 nvidia,pull = <TEGRA_PIN_PULL_UP>;
682 nvidia,tristate = <TEGRA_PIN_DISABLE>;
683 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
684 };
685
686 gmi_ad0_pg0 {
687 nvidia,pins = "gmi_ad0_pg0",
688 "gmi_ad1_pg1",
689 "gmi_ad2_pg2",
690 "gmi_ad3_pg3",
691 "gmi_ad6_pg6",
692 "gmi_ad7_pg7",
693 "gmi_wr_n_pi0",
694 "gmi_oe_n_pi1",
695 "gmi_dqs_pi2",
696 "gmi_adv_n_pk0",
697 "gmi_clk_pk1";
698 nvidia,function = "nand";
699 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
700 nvidia,tristate = <TEGRA_PIN_ENABLE>;
701 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
702 };
703 gmi_ad13_ph5 {
704 nvidia,pins = "gmi_ad13_ph5";
705 nvidia,function = "nand";
706 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
707 nvidia,tristate = <TEGRA_PIN_DISABLE>;
708 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
709 };
710 gmi_ad10_ph2 {
711 nvidia,pins = "gmi_ad10_ph2",
712 "gmi_ad11_ph3",
713 "gmi_ad14_ph6";
714 nvidia,function = "nand";
715 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
716 nvidia,tristate = <TEGRA_PIN_DISABLE>;
717 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
718 };
719 gmi_ad12_ph4 {
720 nvidia,pins = "gmi_ad12_ph4",
721 "gmi_rst_n_pi4",
722 "gmi_cs7_n_pi6";
723 nvidia,function = "nand";
724 nvidia,pull = <TEGRA_PIN_PULL_UP>;
725 nvidia,tristate = <TEGRA_PIN_DISABLE>;
726 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
727 };
728
729 /* Vibrator control */
730 vibrator {
731 nvidia,pins = "gmi_ad11_ph3";
732 nvidia,function = "nand";
733 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
734 nvidia,tristate = <TEGRA_PIN_DISABLE>;
735 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
736 };
737
738 /* PWM pinmux */
739 pwm_0 {
740 nvidia,pins = "gmi_ad8_ph0";
741 nvidia,function = "pwm0";
742 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
743 nvidia,tristate = <TEGRA_PIN_DISABLE>;
744 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
745 };
746 pwm_1 {
747 nvidia,pins = "gmi_ad9_ph1";
748 nvidia,function = "pwm1";
749 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
750 nvidia,tristate = <TEGRA_PIN_DISABLE>;
751 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
752 };
753 pwm_2 {
754 nvidia,pins = "pu5";
755 nvidia,function = "pwm2";
756 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
757 nvidia,tristate = <TEGRA_PIN_DISABLE>;
758 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
759 };
760
761 gmi_cs_n {
762 nvidia,pins = "gmi_cs4_n_pk2",
763 "gmi_cs6_n_pi3";
764 nvidia,function = "gmi";
765 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
766 nvidia,tristate = <TEGRA_PIN_ENABLE>;
767 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
768 };
769
770 /* Spdif pinmux */
771 spdif_out {
772 nvidia,pins = "spdif_out_pk5";
773 nvidia,function = "spdif";
774 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
775 nvidia,tristate = <TEGRA_PIN_ENABLE>;
776 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
777 };
778 spdif_in {
779 nvidia,pins = "spdif_in_pk6";
780 nvidia,function = "spdif";
781 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
782 nvidia,tristate = <TEGRA_PIN_ENABLE>;
783 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
784 };
785
786 vi_d4_pl2 {
787 nvidia,pins = "vi_d4_pl2";
788 nvidia,function = "vi";
789 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
790 nvidia,tristate = <TEGRA_PIN_DISABLE>;
791 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
792 };
793 vi_d6_pl4 {
794 nvidia,pins = "vi_d6_pl4";
795 nvidia,function = "vi";
796 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
797 nvidia,tristate = <TEGRA_PIN_DISABLE>;
798 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
799 nvidia,lock = <0>;
800 nvidia,ioreset = <0>;
801 };
802 vi_mclk_pt1 {
803 nvidia,pins = "vi_mclk_pt1";
804 nvidia,function = "vi";
805 nvidia,pull = <TEGRA_PIN_PULL_UP>;
806 nvidia,tristate = <TEGRA_PIN_DISABLE>;
807 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
808 };
809
810 jtag {
811 nvidia,pins = "jtag_rtck_pu7";
812 nvidia,function = "rtck";
813 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
814 nvidia,tristate = <TEGRA_PIN_DISABLE>;
815 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
816 };
817
818 crt_sync {
819 nvidia,pins = "crt_hsync_pv6",
820 "crt_vsync_pv7";
821 nvidia,function = "crt";
822 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
823 nvidia,tristate = <TEGRA_PIN_ENABLE>;
824 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
825 };
826
827 clk1_out {
828 nvidia,pins = "clk1_out_pw4";
829 nvidia,function = "extperiph1";
830 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
831 nvidia,tristate = <TEGRA_PIN_DISABLE>;
832 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
833 };
834 clk2_out {
835 nvidia,pins = "clk2_out_pw5";
836 nvidia,function = "extperiph2";
837 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
838 nvidia,tristate = <TEGRA_PIN_DISABLE>;
839 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
840 };
841 clk3_out {
842 nvidia,pins = "clk3_out_pee0";
843 nvidia,function = "extperiph3";
844 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
845 nvidia,tristate = <TEGRA_PIN_ENABLE>;
846 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
847 };
848
849 sys_clk_req {
850 nvidia,pins = "sys_clk_req_pz5";
851 nvidia,function = "sysclk";
852 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
853 nvidia,tristate = <TEGRA_PIN_DISABLE>;
854 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
855 };
856
857 pbb3 {
858 nvidia,pins = "pbb3";
859 nvidia,function = "vgp3";
860 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
861 nvidia,tristate = <TEGRA_PIN_DISABLE>;
862 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
863 };
864 pbb4 {
865 nvidia,pins = "pbb4";
866 nvidia,function = "vgp4";
867 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
868 nvidia,tristate = <TEGRA_PIN_DISABLE>;
869 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
870 };
871 pbb5 {
872 nvidia,pins = "pbb5";
873 nvidia,function = "vgp5";
874 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
875 nvidia,tristate = <TEGRA_PIN_DISABLE>;
876 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
877 };
878
879 clk2_req_pcc5 {
880 nvidia,pins = "clk2_req_pcc5",
881 "clk1_req_pee2";
882 nvidia,function = "dap";
883 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
884 nvidia,tristate = <TEGRA_PIN_DISABLE>;
885 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
886 };
887
888 clk3_req_pee1 {
889 nvidia,pins = "clk3_req_pee1";
890 nvidia,function = "dev3";
891 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
892 nvidia,tristate = <TEGRA_PIN_ENABLE>;
893 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
894 };
895
896 owr {
897 nvidia,pins = "owr";
898 nvidia,function = "owr";
899 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
900 nvidia,tristate = <TEGRA_PIN_DISABLE>;
901 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
902 };
903
904 /* GPIO power/drive control */
905 drive_dap1 {
906 nvidia,pins = "drive_dap1",
907 "drive_dap2",
908 "drive_dbg",
909 "drive_at5",
910 "drive_gme",
911 "drive_ddc",
912 "drive_ao1",
913 "drive_uart3";
914 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
915 nvidia,schmitt = <TEGRA_PIN_ENABLE>;
916 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
917 nvidia,pull-down-strength = <31>;
918 nvidia,pull-up-strength = <31>;
919 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
920 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
921 };
922 drive_sdio1 {
923 nvidia,pins = "drive_sdio1",
924 "drive_sdio3";
925 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
926 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
927 nvidia,pull-down-strength = <46>;
928 nvidia,pull-up-strength = <42>;
929 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FAST>;
930 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FAST>;
931 };
932 drive_sdmmc4 {
933 nvidia,pins = "drive_gma",
934 "drive_gmb",
935 "drive_gmc",
936 "drive_gmd";
937 nvidia,pull-down-strength = <9>;
938 nvidia,pull-up-strength = <9>;
939 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
940 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
941 };
942 };
943 };
944
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +0300945 uarta: serial@70006000 {
946 status = "okay";
947 };
948
949 pwm: pwm@7000a000 {
950 status = "okay";
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +0300951 };
952
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +0300953 pwr_i2c: i2c@7000d000 {
954 status = "okay";
955 clock-frequency = <400000>;
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +0300956
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +0300957 /* Texas Instruments TPS659110 PMIC */
958 pmic: tps65911@2d {
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +0300959 compatible = "ti,tps65911";
960 reg = <0x2d>;
961
962 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
963 #interrupt-cells = <2>;
964 interrupt-controller;
965
966 ti,system-power-controller;
967
968 #gpio-cells = <2>;
969 gpio-controller;
970
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +0300971 regulators {
972 vdd_1v2_bl: vdd1 {
973 regulator-name = "vdd_1v2_backlight";
974 regulator-min-microvolt = <1200000>;
975 regulator-max-microvolt = <1200000>;
Svyatoslav Ryhelbf732172023-08-26 18:39:29 +0300976 regulator-boot-on;
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +0300977 };
978
979 vcore_lcd: vdd2 {
980 regulator-name = "vcore_lcd";
981 regulator-min-microvolt = <1500000>;
982 regulator-max-microvolt = <1500000>;
Svyatoslav Ryhelbf732172023-08-26 18:39:29 +0300983 regulator-boot-on;
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +0300984 };
985
986 vdd_1v8_vio: vddio {
987 regulator-name = "vdd_1v8_gen";
988 regulator-min-microvolt = <1800000>;
989 regulator-max-microvolt = <1800000>;
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +0300990 regulator-always-on;
991 regulator-boot-on;
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +0300992 };
993
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +0300994 /* eMMC VDD */
995 vcore_emmc: ldo1 {
996 regulator-name = "vdd_emmc_core";
997 regulator-min-microvolt = <3300000>;
998 regulator-max-microvolt = <3300000>;
Svyatoslav Ryhelbf732172023-08-26 18:39:29 +0300999 regulator-boot-on;
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001000 };
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001001
1002 /* uSD slot VDDIO */
1003 vddio_usd: ldo5 {
1004 regulator-name = "vddio_sdmmc";
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001005 regulator-min-microvolt = <3300000>;
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001006 regulator-max-microvolt = <3300000>;
1007 regulator-always-on;
1008 };
1009
1010 avdd_dsi_csi: ldo6 {
1011 regulator-name = "avdd_dsi_csi";
1012 regulator-min-microvolt = <1200000>;
1013 regulator-max-microvolt = <1200000>;
Svyatoslav Ryhelbf732172023-08-26 18:39:29 +03001014 regulator-boot-on;
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001015 };
1016 };
1017 };
1018 };
1019
1020 spi4: spi@7000da00 {
1021 status = "okay";
1022 spi-max-frequency = <25000000>;
1023
1024 spi-flash@1 {
1025 compatible = "winbond,w25q32", "jedec,spi-nor";
1026 reg = <1>;
1027 spi-max-frequency = <20000000>;
1028 };
1029 };
1030
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001031 sdmmc1: sdhci@78000000 {
1032 status = "okay";
1033 bus-width = <4>;
1034
1035 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1036 power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
1037
1038 vmmc-supply = <&vdd_usd>;
1039 vqmmc-supply = <&vddio_usd>;
1040 };
1041
1042 sdmmc4: sdhci@78000600 {
1043 status = "okay";
1044 bus-width = <8>;
1045 non-removable;
1046
1047 vmmc-supply = <&vcore_emmc>;
1048 vqmmc-supply = <&vdd_1v8_vio>;
1049 };
1050
1051 /* USB via ASUS connector */
1052 usb1: usb@7d000000 {
1053 status = "okay";
1054 dr_mode = "otg";
1055 };
1056
Svyatoslav Ryhel6c438612023-08-25 20:23:14 +03001057 usb-phy@7d000000 {
1058 status = "okay";
1059 nvidia,hssync-start-delay = <0>;
1060 nvidia,xcvr-lsfslew = <2>;
1061 nvidia,xcvr-lsrslew = <2>;
1062 };
1063
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001064 /* Dock's USB port */
1065 usb3: usb@7d008000 {
1066 status = "okay";
1067 };
1068
Svyatoslav Ryhel6c438612023-08-25 20:23:14 +03001069 usb-phy@7d008000 {
1070 status = "okay";
1071 };
1072
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001073 backlight: backlight {
1074 compatible = "pwm-backlight";
1075
1076 enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001077 power-supply = <&vdd_1v2_bl>;
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001078 pwms = <&pwm 0 71428>;
1079
1080 brightness-levels = <1 35 70 105 140 175 210 255>;
1081 default-brightness-level = <5>;
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001082 };
1083
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001084 /* PMIC has a built-in 32KHz oscillator which is used by PMC */
1085 clk32k_in: clock-32k {
1086 compatible = "fixed-clock";
1087 #clock-cells = <0>;
1088 clock-frequency = <32768>;
1089 clock-output-names = "pmic-oscillator";
1090 };
1091
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001092 gpio-keys {
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001093 compatible = "gpio-keys";
1094
1095 key-power {
1096 label = "Power";
1097 gpios = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
1098 linux,code = <KEY_ENTER>;
1099 };
1100
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001101 key-volume-up {
1102 label = "Volume Up";
1103 gpios = <&gpio TEGRA_GPIO(Q, 3) GPIO_ACTIVE_LOW>;
1104 linux,code = <KEY_UP>;
1105 };
1106
1107 key-volume-down {
1108 label = "Volume Down";
1109 gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_LOW>;
1110 linux,code = <KEY_DOWN>;
1111 };
1112 };
1113
Svyatoslav Ryhelb5e3b352023-10-03 09:36:33 +03001114 panel: panel {
1115 compatible = "hydis,hv101hd1";
1116
1117 vdd-supply = <&vcore_lcd>;
1118 enable-gpios = <&gpio TEGRA_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
1119
1120 backlight = <&backlight>;
1121 };
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001122
1123 vdd_usd: regulator-usd {
1124 compatible = "regulator-fixed";
1125 regulator-name = "vdd_usd";
1126 regulator-min-microvolt = <3300000>;
1127 regulator-max-microvolt = <3300000>;
1128 };
Svyatoslav Ryhel7a25c382023-06-30 10:29:03 +03001129};