Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2021 Pali Rohár <pali@kernel.org> |
| 4 | * Copyright (C) 2024 Marek Behún <kabel@kernel.org> |
| 5 | */ |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 6 | |
| 7 | #include <common.h> |
| 8 | #include <dm.h> |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 9 | #include <dm/lists.h> |
| 10 | #include <regmap.h> |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 11 | #include <reset-uclass.h> |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 12 | #include <syscon.h> |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 13 | #include <asm/io.h> |
| 14 | |
| 15 | #define MVEBU_SOC_CONTROL_1_REG 0x4 |
| 16 | |
| 17 | #define MVEBU_PCIE_ID 0 |
| 18 | |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 19 | static int mvebu_reset_of_xlate(struct reset_ctl *rst, |
| 20 | struct ofnode_phandle_args *args) |
| 21 | { |
| 22 | if (args->args_count < 2) |
| 23 | return -EINVAL; |
| 24 | |
| 25 | rst->id = args->args[0]; |
| 26 | rst->data = args->args[1]; |
| 27 | |
| 28 | /* Currently only PCIe is implemented */ |
| 29 | if (rst->id != MVEBU_PCIE_ID) |
| 30 | return -EINVAL; |
| 31 | |
| 32 | /* Four PCIe enable bits are shared across more PCIe links */ |
| 33 | if (!(rst->data >= 0 && rst->data <= 3)) |
| 34 | return -EINVAL; |
| 35 | |
| 36 | return 0; |
| 37 | } |
| 38 | |
| 39 | static int mvebu_reset_request(struct reset_ctl *rst) |
| 40 | { |
| 41 | return 0; |
| 42 | } |
| 43 | |
| 44 | static int mvebu_reset_free(struct reset_ctl *rst) |
| 45 | { |
| 46 | return 0; |
| 47 | } |
| 48 | |
| 49 | static int mvebu_reset_assert(struct reset_ctl *rst) |
| 50 | { |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 51 | struct regmap *regmap = syscon_get_regmap(rst->dev->parent); |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 52 | |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 53 | return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG, |
| 54 | BIT(rst->data), 0); |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 55 | } |
| 56 | |
| 57 | static int mvebu_reset_deassert(struct reset_ctl *rst) |
| 58 | { |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 59 | struct regmap *regmap = syscon_get_regmap(rst->dev->parent); |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 60 | |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 61 | return regmap_update_bits(regmap, MVEBU_SOC_CONTROL_1_REG, |
| 62 | BIT(rst->data), BIT(rst->data)); |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 63 | } |
| 64 | |
| 65 | static int mvebu_reset_status(struct reset_ctl *rst) |
| 66 | { |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 67 | struct regmap *regmap = syscon_get_regmap(rst->dev->parent); |
| 68 | uint val; |
| 69 | int ret; |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 70 | |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 71 | ret = regmap_read(regmap, MVEBU_SOC_CONTROL_1_REG, &val); |
| 72 | if (ret < 0) |
| 73 | return ret; |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 74 | |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 75 | return !(val & BIT(rst->data)); |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 76 | } |
| 77 | |
Pali Rohár | 32301ee | 2022-09-09 14:41:28 +0200 | [diff] [blame] | 78 | static const struct reset_ops mvebu_reset_ops = { |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 79 | .of_xlate = mvebu_reset_of_xlate, |
| 80 | .request = mvebu_reset_request, |
| 81 | .rfree = mvebu_reset_free, |
| 82 | .rst_assert = mvebu_reset_assert, |
| 83 | .rst_deassert = mvebu_reset_deassert, |
| 84 | .rst_status = mvebu_reset_status, |
| 85 | }; |
| 86 | |
| 87 | U_BOOT_DRIVER(mvebu_reset) = { |
| 88 | .name = "mvebu-reset", |
| 89 | .id = UCLASS_RESET, |
Pali Rohár | 4669df3 | 2021-12-21 12:20:18 +0100 | [diff] [blame] | 90 | .ops = &mvebu_reset_ops, |
| 91 | }; |
Marek Behún | 1c657bc | 2024-04-04 09:50:58 +0200 | [diff] [blame] | 92 | |
| 93 | static int mvebu_syscon_bind(struct udevice *dev) |
| 94 | { |
| 95 | /* bind also mvebu-reset, with the same ofnode */ |
| 96 | return device_bind_driver_to_node(dev, "mvebu-reset", "mvebu-reset", |
| 97 | dev_ofnode(dev), NULL); |
| 98 | } |
| 99 | |
| 100 | static const struct udevice_id mvebu_syscon_of_match[] = { |
| 101 | { .compatible = "marvell,armada-370-xp-system-controller" }, |
| 102 | { .compatible = "marvell,armada-375-system-controller" }, |
| 103 | { .compatible = "marvell,armada-380-system-controller" }, |
| 104 | { .compatible = "marvell,armada-390-system-controller" }, |
| 105 | { }, |
| 106 | }; |
| 107 | |
| 108 | U_BOOT_DRIVER(mvebu_syscon) = { |
| 109 | .name = "mvebu-system-controller", |
| 110 | .id = UCLASS_SYSCON, |
| 111 | .of_match = mvebu_syscon_of_match, |
| 112 | .bind = mvebu_syscon_bind, |
| 113 | }; |