| Simon Glass | ac4df6f | 2019-09-25 08:11:30 -0600 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
| Simon Glass | 5c2aabf | 2019-09-25 08:56:32 -0600 | [diff] [blame] | 7 | #include <acpi_s3.h> |
| Simon Glass | 1fa70f8 | 2019-11-14 12:57:34 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
| Simon Glass | ac4df6f | 2019-09-25 08:11:30 -0600 | [diff] [blame] | 9 | #include <dm.h> |
| 10 | #include <errno.h> |
| 11 | #include <rtc.h> |
| Simon Glass | ac4df6f | 2019-09-25 08:11:30 -0600 | [diff] [blame] | 12 | #include <asm/cmos_layout.h> |
| 13 | #include <asm/early_cmos.h> |
| 14 | #include <asm/io.h> |
| 15 | #include <asm/mrccache.h> |
| 16 | #include <asm/post.h> |
| 17 | #include <asm/processor.h> |
| 18 | #include <asm/fsp/fsp_support.h> |
| 19 | |
| 20 | DECLARE_GLOBAL_DATA_PTR; |
| 21 | |
| 22 | int checkcpu(void) |
| 23 | { |
| 24 | return 0; |
| 25 | } |
| 26 | |
| 27 | int print_cpuinfo(void) |
| 28 | { |
| 29 | post_code(POST_CPU_INFO); |
| 30 | return default_print_cpuinfo(); |
| 31 | } |
| 32 | |
| 33 | int fsp_init_phase_pci(void) |
| 34 | { |
| 35 | u32 status; |
| 36 | |
| 37 | /* call into FspNotify */ |
| 38 | debug("Calling into FSP (notify phase INIT_PHASE_PCI): "); |
| 39 | status = fsp_notify(NULL, INIT_PHASE_PCI); |
| 40 | if (status) |
| 41 | debug("fail, error code %x\n", status); |
| 42 | else |
| 43 | debug("OK\n"); |
| 44 | |
| 45 | return status ? -EPERM : 0; |
| 46 | } |
| 47 | |
| 48 | void board_final_cleanup(void) |
| 49 | { |
| 50 | u32 status; |
| 51 | |
| 52 | /* call into FspNotify */ |
| 53 | debug("Calling into FSP (notify phase INIT_PHASE_BOOT): "); |
| 54 | status = fsp_notify(NULL, INIT_PHASE_BOOT); |
| 55 | if (status) |
| 56 | debug("fail, error code %x\n", status); |
| 57 | else |
| 58 | debug("OK\n"); |
| 59 | } |
| 60 | |
| Simon Glass | ac4df6f | 2019-09-25 08:11:30 -0600 | [diff] [blame] | 61 | #ifdef CONFIG_HAVE_ACPI_RESUME |
| 62 | int fsp_save_s3_stack(void) |
| 63 | { |
| 64 | struct udevice *dev; |
| 65 | int ret; |
| 66 | |
| 67 | if (gd->arch.prev_sleep_state == ACPI_S3) |
| 68 | return 0; |
| 69 | |
| 70 | ret = uclass_get_device(UCLASS_RTC, 0, &dev); |
| 71 | if (ret) { |
| 72 | debug("Cannot find RTC: err=%d\n", ret); |
| 73 | return -ENODEV; |
| 74 | } |
| 75 | |
| 76 | /* Save the stack address to CMOS */ |
| 77 | ret = rtc_write32(dev, CMOS_FSP_STACK_ADDR, gd->start_addr_sp); |
| 78 | if (ret) { |
| 79 | debug("Save stack address to CMOS: err=%d\n", ret); |
| 80 | return -EIO; |
| 81 | } |
| 82 | |
| 83 | return 0; |
| 84 | } |
| 85 | #endif |