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git01.mediatek.com / filogic / uboot / 4feafb27313d4c86295a76afb37a18e0be7bf1b0 / . / arch / arm / dts / r8a77990-ebisu-u-boot.dts
blob: b030d5c649d28c98971011665874070a25025ba2 [file] [log] [blame]
Tom Rini24672242018-06-01 21:10:18 -0400[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Marek Vasut2a46a0b2018-04-26 13:31:39 +0200[diff] [blame]2/*
3 * Device Tree Source extras for U-Boot for the Ebisu board
4 *
5 * Copyright (C) 2018 Marek Vasut <marek.vasut@gmail.com>
Marek Vasut2a46a0b2018-04-26 13:31:39 +0200[diff] [blame]6 */
7
8#include "r8a77990-ebisu.dts"
9#include "r8a77990-u-boot.dtsi"
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]10
11/ {
12 reg_1p8v: regulator0 {
13 compatible = "regulator-fixed";
14 regulator-name = "fixed-1.8V";
15 regulator-min-microvolt = <1800000>;
16 regulator-max-microvolt = <1800000>;
17 regulator-boot-on;
18 regulator-always-on;
19 };
20
21 reg_3p3v: regulator1 {
22 compatible = "regulator-fixed";
23 regulator-name = "fixed-3.3V";
24 regulator-min-microvolt = <3300000>;
25 regulator-max-microvolt = <3300000>;
26 regulator-boot-on;
27 regulator-always-on;
28 };
29
30 vcc_sdhi0: regulator-vcc-sdhi0 {
31 compatible = "regulator-fixed";
32
33 regulator-name = "SDHI0 Vcc";
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36
37 gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
38 enable-active-high;
39 };
40
41 vccq_sdhi0: regulator-vccq-sdhi0 {
42 compatible = "regulator-gpio";
43
44 regulator-name = "SDHI0 VccQ";
45 regulator-min-microvolt = <1800000>;
46 regulator-max-microvolt = <3300000>;
47
48 gpios = <&gpio5 18 GPIO_ACTIVE_HIGH>;
49 gpios-states = <1>;
50 states = <3300000 1
51 1800000 0>;
52 };
53
54 vcc_sdhi1: regulator-vcc-sdhi1 {
55 compatible = "regulator-fixed";
56
57 regulator-name = "SDHI1 Vcc";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60
61 gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
62 enable-active-high;
63 };
64
65 vccq_sdhi1: regulator-vccq-sdhi1 {
66 compatible = "regulator-gpio";
67
68 regulator-name = "SDHI1 VccQ";
69 regulator-min-microvolt = <1800000>;
70 regulator-max-microvolt = <3300000>;
71
72 gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
73 gpios-states = <1>;
74 states = <3300000 1
75 1800000 0>;
76 };
77};
78
79&pfc {
Marek Vasut5b16ba92018-12-03 22:14:09 +0100[diff] [blame]80 pinctrl-0 = <&scif_clk_pins>;
81 pinctrl-names = "default";
82
83 scif2_pins: scif2 {
84 groups = "scif2_data_a";
85 function = "scif2";
86 };
87
88 scif_clk_pins: scif_clk {
89 groups = "scif_clk_a";
90 function = "scif_clk";
91 };
92
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]93 sdhi0_pins: sd0 {
94 groups = "sdhi0_data4", "sdhi0_ctrl";
95 function = "sdhi0";
96 power-source = <3300>;
97 };
98
99 sdhi0_pins_uhs: sd0_uhs {
100 groups = "sdhi0_data4", "sdhi0_ctrl";
101 function = "sdhi0";
102 power-source = <1800>;
103 };
104
105 sdhi1_pins: sd1 {
106 groups = "sdhi1_data4", "sdhi1_ctrl";
107 function = "sdhi1";
108 power-source = <3300>;
109 };
110
111 sdhi1_pins_uhs: sd1_uhs {
112 groups = "sdhi1_data4", "sdhi1_ctrl";
113 function = "sdhi1";
114 power-source = <1800>;
115 };
116
117 sdhi3_pins: sd2 {
118 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
119 function = "sdhi3";
120 power-source = <1800>;
121 };
122
123 sdhi3_pins_uhs: sd2_uhs {
124 groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
125 function = "sdhi3";
126 power-source = <1800>;
127 };
128};
129
Marek Vasut5b16ba92018-12-03 22:14:09 +0100[diff] [blame]130&scif2 {
131 pinctrl-0 = <&scif2_pins>;
132 pinctrl-names = "default";
133 status = "okay";
134};
135
Marek Vasutee5b69f2018-12-03 22:12:47 +0100[diff] [blame]136&sdhi0 {
137 /* full size SD */
138 pinctrl-0 = <&sdhi0_pins>;
139 pinctrl-1 = <&sdhi0_pins_uhs>;
140 pinctrl-names = "default", "state_uhs";
141
142 vmmc-supply = <&vcc_sdhi0>;
143 vqmmc-supply = <&vccq_sdhi0>;
144 cd-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>;
145 wp-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>;
146 bus-width = <4>;
147 sd-uhs-sdr12;
148 sd-uhs-sdr25;
149 sd-uhs-sdr50;
150 sd-uhs-sdr104;
151 status = "okay";
152 max-frequency = <208000000>;
153};
154
155&sdhi1 {
156 /* microSD */
157 pinctrl-0 = <&sdhi1_pins>;
158 pinctrl-1 = <&sdhi1_pins_uhs>;
159 pinctrl-names = "default", "state_uhs";
160
161 vmmc-supply = <&vcc_sdhi1>;
162 vqmmc-supply = <&vccq_sdhi1>;
163 cd-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>;
164 bus-width = <4>;
165 sd-uhs-sdr12;
166 sd-uhs-sdr25;
167 sd-uhs-sdr50;
168 sd-uhs-sdr104;
169 status = "okay";
170 max-frequency = <208000000>;
171};
172
173&sdhi3 {
174 /* used for on-board 8bit eMMC */
175 pinctrl-0 = <&sdhi3_pins>;
176 pinctrl-1 = <&sdhi3_pins_uhs>;
177 pinctrl-names = "default", "state_uhs";
178
179 vmmc-supply = <&reg_3p3v>;
180 vqmmc-supply = <&reg_1p8v>;
181 bus-width = <8>;
182 mmc-hs200-1_8v;
183 mmc-hs400-1_8v;
184 non-removable;
185 status = "okay";
186};