| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 2 | /* |
| 3 | * include/configs/alt.h |
| 4 | * This file is alt board configuration. |
| 5 | * |
| 6 | * Copyright (C) 2014 Renesas Electronics Corporation |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __ALT_H |
| 10 | #define __ALT_H |
| 11 | |
| Nobuhiro Iwamatsu | b6169ac | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 12 | #include "rcar-gen2-common.h" |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 13 | |
| Marek Vasut | 37381a2 | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 14 | #define STACK_AREA_SIZE 0x00100000 |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 15 | #define LOW_LEVEL_MERAM_STACK \ |
| Tom Rini | 4ddbade | 2022-05-25 12:16:03 -0400 | [diff] [blame^] | 16 | (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4) |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 17 | |
| 18 | /* MEMORY */ |
| Nobuhiro Iwamatsu | b6169ac | 2014-11-10 14:34:07 +0900 | [diff] [blame] | 19 | #define RCAR_GEN2_SDRAM_BASE 0x40000000 |
| 20 | #define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024) |
| 21 | #define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024) |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 22 | |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 23 | /* FLASH */ |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 24 | #define CONFIG_SPI_FLASH_QUAD |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 25 | |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 26 | /* SH Ether */ |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 27 | #define CONFIG_SH_ETHER_USE_PORT 0 |
| 28 | #define CONFIG_SH_ETHER_PHY_ADDR 0x1 |
| 29 | #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII |
| 30 | #define CONFIG_SH_ETHER_CACHE_WRITEBACK |
| 31 | #define CONFIG_SH_ETHER_CACHE_INVALIDATE |
| Marek Vasut | 37381a2 | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 32 | #define CONFIG_SH_ETHER_ALIGNE_SIZE 64 |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 33 | |
| 34 | /* Board Clock */ |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 35 | |
| Marek Vasut | 37381a2 | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 36 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| Marek Vasut | 7b6b65a | 2019-03-30 08:04:29 +0100 | [diff] [blame] | 37 | "bootm_size=0x10000000\0" \ |
| 38 | "usb_pgood_delay=2000\0" |
| Nobuhiro Iwamatsu | 8208d9b | 2014-10-31 16:30:26 +0900 | [diff] [blame] | 39 | |
| Marek Vasut | 37381a2 | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 40 | /* SPL support */ |
| Marek Vasut | 37381a2 | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 41 | #define CONFIG_SPL_STACK 0xe6340000 |
| Nobuhiro Iwamatsu | 483729c | 2014-11-19 14:26:33 +0900 | [diff] [blame] | 42 | |
| Nobuhiro Iwamatsu | ddbf303 | 2014-06-26 10:23:30 +0900 | [diff] [blame] | 43 | #endif /* __ALT_H */ |