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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
maxims@google.comdaea6d42017-04-17 12:00:21 -07002/*
3 * Copyright 2017 Google, Inc
maxims@google.comdaea6d42017-04-17 12:00:21 -07004 */
5
maxims@google.comdaea6d42017-04-17 12:00:21 -07006#include <dm.h>
Tom Rinidec7ea02024-05-20 13:35:03 -06007#include <time.h>
maxims@google.comdaea6d42017-04-17 12:00:21 -07008#include <wdt.h>
Rasmus Villemoes2b673872021-08-19 11:57:05 +02009#include <asm/gpio.h>
maxims@google.comdaea6d42017-04-17 12:00:21 -070010#include <asm/state.h>
11#include <asm/test.h>
12#include <dm/test.h>
Simon Glass75c4d412020-07-19 10:15:37 -060013#include <test/test.h>
maxims@google.comdaea6d42017-04-17 12:00:21 -070014#include <test/ut.h>
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +020015#include <linux/delay.h>
Rasmus Villemoes370261b2024-10-03 23:27:55 +020016#include <u-boot/schedule.h>
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +020017#include <watchdog.h>
maxims@google.comdaea6d42017-04-17 12:00:21 -070018
19/* Test that watchdog driver functions are called */
20static int dm_test_wdt_base(struct unit_test_state *uts)
21{
22 struct sandbox_state *state = state_get_current();
23 struct udevice *dev;
24 const u64 timeout = 42;
25
Rasmus Villemoes2b673872021-08-19 11:57:05 +020026 ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
27 DM_DRIVER_GET(wdt_sandbox), &dev));
Simon Glass2e8faa22017-06-07 10:28:43 -060028 ut_assertnonnull(dev);
maxims@google.comdaea6d42017-04-17 12:00:21 -070029 ut_asserteq(0, state->wdt.counter);
30 ut_asserteq(false, state->wdt.running);
31
32 ut_assertok(wdt_start(dev, timeout, 0));
33 ut_asserteq(timeout, state->wdt.counter);
34 ut_asserteq(true, state->wdt.running);
35
36 uint reset_count = state->wdt.reset_count;
37 ut_assertok(wdt_reset(dev));
38 ut_asserteq(reset_count + 1, state->wdt.reset_count);
39 ut_asserteq(true, state->wdt.running);
40
41 ut_assertok(wdt_stop(dev));
42 ut_asserteq(false, state->wdt.running);
43
44 return 0;
45}
Simon Glass1a92f832024-08-22 07:57:48 -060046DM_TEST(dm_test_wdt_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
Rasmus Villemoes2b673872021-08-19 11:57:05 +020047
Paul Doelle709f0372022-07-04 09:00:25 +000048static int dm_test_wdt_gpio_toggle(struct unit_test_state *uts)
Rasmus Villemoes2b673872021-08-19 11:57:05 +020049{
50 /*
51 * The sandbox wdt gpio is "connected" to gpio bank a, offset
52 * 7. Use the sandbox back door to verify that the gpio-wdt
Paul Doelle709f0372022-07-04 09:00:25 +000053 * driver behaves as expected when using the 'toggle' algorithm.
Rasmus Villemoes2b673872021-08-19 11:57:05 +020054 */
55 struct udevice *wdt, *gpio;
56 const u64 timeout = 42;
Simon Glasse0f8cd22023-08-10 09:53:13 -060057 const int offset = 8;
Rasmus Villemoes2b673872021-08-19 11:57:05 +020058 int val;
59
Paul Doelle709f0372022-07-04 09:00:25 +000060 ut_assertok(uclass_get_device_by_name(UCLASS_WDT,
61 "wdt-gpio-toggle", &wdt));
Rasmus Villemoes2b673872021-08-19 11:57:05 +020062 ut_assertnonnull(wdt);
63
64 ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
65 ut_assertnonnull(gpio);
66 ut_assertok(wdt_start(wdt, timeout, 0));
67
68 val = sandbox_gpio_get_value(gpio, offset);
69 ut_assertok(wdt_reset(wdt));
70 ut_asserteq(!val, sandbox_gpio_get_value(gpio, offset));
71 ut_assertok(wdt_reset(wdt));
72 ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
73
Rasmus Villemoes776442e2024-10-02 21:23:23 +020074 ut_asserteq(-EOPNOTSUPP, wdt_stop(wdt));
Rasmus Villemoes2b673872021-08-19 11:57:05 +020075
76 return 0;
77}
Simon Glass1a92f832024-08-22 07:57:48 -060078DM_TEST(dm_test_wdt_gpio_toggle, UTF_SCAN_FDT);
Paul Doelle709f0372022-07-04 09:00:25 +000079
80static int dm_test_wdt_gpio_level(struct unit_test_state *uts)
81{
82 /*
83 * The sandbox wdt gpio is "connected" to gpio bank a, offset
84 * 7. Use the sandbox back door to verify that the gpio-wdt
85 * driver behaves as expected when using the 'level' algorithm.
86 */
87 struct udevice *wdt, *gpio;
88 const u64 timeout = 42;
89 const int offset = 7;
90 int val;
91
92 ut_assertok(uclass_get_device_by_name(UCLASS_WDT,
93 "wdt-gpio-level", &wdt));
94 ut_assertnonnull(wdt);
95
96 ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
97 ut_assertnonnull(gpio);
98 ut_assertok(wdt_start(wdt, timeout, 0));
99
100 val = sandbox_gpio_get_value(gpio, offset);
101 ut_assertok(wdt_reset(wdt));
102 ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
103 ut_assertok(wdt_reset(wdt));
104 ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
105
Rasmus Villemoes776442e2024-10-02 21:23:23 +0200106 ut_asserteq(-EOPNOTSUPP, wdt_stop(wdt));
Paul Doelle709f0372022-07-04 09:00:25 +0000107
108 return 0;
109}
Simon Glass1a92f832024-08-22 07:57:48 -0600110DM_TEST(dm_test_wdt_gpio_level, UTF_SCAN_FDT);
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +0200111
112static int dm_test_wdt_watchdog_reset(struct unit_test_state *uts)
113{
114 struct sandbox_state *state = state_get_current();
115 struct udevice *gpio_wdt, *sandbox_wdt;
116 struct udevice *gpio;
117 const u64 timeout = 42;
Simon Glasse0f8cd22023-08-10 09:53:13 -0600118 const int offset = 8;
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +0200119 uint reset_count;
120 int val;
121
Paul Doelle709f0372022-07-04 09:00:25 +0000122 ut_assertok(uclass_get_device_by_name(UCLASS_WDT,
123 "wdt-gpio-toggle", &gpio_wdt));
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +0200124 ut_assertnonnull(gpio_wdt);
125 ut_assertok(uclass_get_device_by_driver(UCLASS_WDT,
126 DM_DRIVER_GET(wdt_sandbox), &sandbox_wdt));
127 ut_assertnonnull(sandbox_wdt);
128 ut_assertok(uclass_get_device_by_name(UCLASS_GPIO, "base-gpios", &gpio));
129 ut_assertnonnull(gpio);
130
131 /* Neither device should be "started", so watchdog_reset() should be a no-op. */
132 reset_count = state->wdt.reset_count;
133 val = sandbox_gpio_get_value(gpio, offset);
Rasmus Villemoes370261b2024-10-03 23:27:55 +0200134 schedule();
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +0200135 ut_asserteq(reset_count, state->wdt.reset_count);
136 ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
137
138 /* Start both devices. */
139 ut_assertok(wdt_start(gpio_wdt, timeout, 0));
140 ut_assertok(wdt_start(sandbox_wdt, timeout, 0));
141
142 /* Make sure both devices have just been pinged. */
143 timer_test_add_offset(100);
Rasmus Villemoes370261b2024-10-03 23:27:55 +0200144 schedule();
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +0200145 reset_count = state->wdt.reset_count;
146 val = sandbox_gpio_get_value(gpio, offset);
147
148 /* The gpio watchdog should be pinged, the sandbox one not. */
149 timer_test_add_offset(30);
Rasmus Villemoes370261b2024-10-03 23:27:55 +0200150 schedule();
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +0200151 ut_asserteq(reset_count, state->wdt.reset_count);
152 ut_asserteq(!val, sandbox_gpio_get_value(gpio, offset));
153
154 /* After another ~30ms, both devices should get pinged. */
155 timer_test_add_offset(30);
Rasmus Villemoes370261b2024-10-03 23:27:55 +0200156 schedule();
Rasmus Villemoesf91ff5a2021-08-19 11:57:06 +0200157 ut_asserteq(reset_count + 1, state->wdt.reset_count);
158 ut_asserteq(val, sandbox_gpio_get_value(gpio, offset));
159
160 return 0;
161}
Simon Glass1a92f832024-08-22 07:57:48 -0600162DM_TEST(dm_test_wdt_watchdog_reset, UTF_SCAN_FDT);