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Yuantian Tang473bbc42019-04-10 16:43:35 +08001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
Hou Zhiqiangce6e3912022-04-22 13:50:06 +05303 * Copyright 2019-2021 NXP
Yuantian Tang473bbc42019-04-10 16:43:35 +08004 */
5
6#ifndef __LS1028A_QDS_H
7#define __LS1028A_QDS_H
8
9#include "ls1028a_common.h"
10
Tom Rini8c70baa2021-12-14 13:36:40 -050011#define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
Yuantian Tang473bbc42019-04-10 16:43:35 +080012
Yuantian Tang473bbc42019-04-10 16:43:35 +080013/*
14 * QIXIS Definitions
15 */
Yuantian Tang473bbc42019-04-10 16:43:35 +080016
17#ifdef CONFIG_FSL_QIXIS
18#define QIXIS_BASE 0x7fb00000
19#define QIXIS_BASE_PHYS QIXIS_BASE
Tom Rini6a5dccc2022-11-16 13:10:41 -050020#define CFG_SYS_I2C_FPGA_ADDR 0x66
Yuantian Tang473bbc42019-04-10 16:43:35 +080021#define QIXIS_LBMAP_SWITCH 1
22#define QIXIS_LBMAP_MASK 0x0f
23#define QIXIS_LBMAP_SHIFT 5
24#define QIXIS_LBMAP_DFLTBANK 0x00
25#define QIXIS_LBMAP_ALTBANK 0x00
26#define QIXIS_LBMAP_SD 0x00
27#define QIXIS_LBMAP_EMMC 0x00
28#define QIXIS_LBMAP_QSPI 0x00
29#define QIXIS_RCW_SRC_SD 0x8
30#define QIXIS_RCW_SRC_EMMC 0x9
31#define QIXIS_RCW_SRC_QSPI 0xf
32#define QIXIS_RST_CTL_RESET 0x31
33#define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20
34#define QIXIS_RCFG_CTL_RECONFIG_START 0x21
35#define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
36#define QIXIS_RST_FORCE_MEM 0x01
37
Tom Rini6a5dccc2022-11-16 13:10:41 -050038#define CFG_SYS_FPGA_CSPR_EXT (0x0)
39#define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
Yuantian Tang473bbc42019-04-10 16:43:35 +080040 CSPR_PORT_SIZE_8 | \
41 CSPR_MSEL_GPCM | \
42 CSPR_V)
Tom Rini6a5dccc2022-11-16 13:10:41 -050043#define CFG_SYS_FPGA_AMASK IFC_AMASK(64 * 1024)
44#define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
Yuantian Tang473bbc42019-04-10 16:43:35 +080045 CSOR_NOR_NOR_MODE_AVD_NOR | \
46 CSOR_NOR_TRHZ_80)
47#endif
48
49/* RTC */
Yuantian Tang473bbc42019-04-10 16:43:35 +080050#define I2C_MUX_CH_RTC 0xB
51
52/* Store environment at top of flash */
Yuantian Tang473bbc42019-04-10 16:43:35 +080053
Yuantian Tangd46f65e2020-03-19 16:48:23 +080054/* LPUART */
55#ifdef CONFIG_LPUART
Yuantian Tangd46f65e2020-03-19 16:48:23 +080056#define CFG_LPUART_MUX_MASK 0xf0
57#define CFG_LPUART_EN 0xf0
58#endif
59
Yuantian Tang473bbc42019-04-10 16:43:35 +080060/* SATA */
Yuantian Tang473bbc42019-04-10 16:43:35 +080061
Yuantian Tang473bbc42019-04-10 16:43:35 +080062#ifndef SPL_NO_ENV
Tom Rinic9edebe2022-12-04 10:03:50 -050063#undef CFG_EXTRA_ENV_SETTINGS
64#define CFG_EXTRA_ENV_SETTINGS \
Yuantian Tang473bbc42019-04-10 16:43:35 +080065 "board=ls1028aqds\0" \
66 "hwconfig=fsl_ddr:bank_intlv=auto\0" \
67 "ramdisk_addr=0x800000\0" \
68 "ramdisk_size=0x2000000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080069 "kernel_addr=0x01000000\0" \
70 "scriptaddr=0x80000000\0" \
71 "scripthdraddr=0x80080000\0" \
72 "fdtheader_addr_r=0x80100000\0" \
73 "kernelheader_addr_r=0x80200000\0" \
74 "load_addr=0xa0000000\0" \
75 "kernel_addr_r=0x81000000\0" \
76 "fdt_addr_r=0x90000000\0" \
Yuantian Tang18c20022020-03-20 14:37:06 +080077 "fdt2_addr_r=0x90010000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080078 "ramdisk_addr_r=0xa0000000\0" \
79 "kernel_start=0x1000000\0" \
Priyanka Singh874c52e2020-02-21 05:57:03 +053080 "kernelheader_start=0x600000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080081 "kernel_load=0xa0000000\0" \
82 "kernel_size=0x2800000\0" \
83 "kernelheader_size=0x40000\0" \
84 "kernel_addr_sd=0x8000\0" \
85 "kernel_size_sd=0x14000\0" \
Priyanka Singh874c52e2020-02-21 05:57:03 +053086 "kernelhdr_addr_sd=0x3000\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080087 "kernelhdr_size_sd=0x10\0" \
88 "console=ttyS0,115200\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +080089 BOOTENV \
90 "boot_scripts=ls1028aqds_boot.scr\0" \
91 "boot_script_hdr=hdr_ls1028aqds_bs.out\0" \
92 "scan_dev_for_boot_part=" \
93 "part list ${devtype} ${devnum} devplist; " \
94 "env exists devplist || setenv devplist 1; " \
95 "for distro_bootpart in ${devplist}; do " \
96 "if fstype ${devtype} " \
97 "${devnum}:${distro_bootpart} " \
98 "bootfstype; then " \
99 "run scan_dev_for_boot; " \
100 "fi; " \
101 "done\0" \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800102 "boot_a_script=" \
103 "load ${devtype} ${devnum}:${distro_bootpart} " \
104 "${scriptaddr} ${prefix}${script}; " \
105 "env exists secureboot && load ${devtype} " \
106 "${devnum}:${distro_bootpart} " \
107 "${scripthdraddr} ${prefix}${boot_script_hdr} " \
108 "&& esbc_validate ${scripthdraddr};" \
109 "source ${scriptaddr}\0" \
Yuantian Tang18c20022020-03-20 14:37:06 +0800110 "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
111 "sf probe 0:0 && sf read $load_addr " \
112 "$kernel_start $kernel_size ; env exists secureboot &&" \
113 "sf read $kernelheader_addr_r $kernelheader_start " \
114 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
115 " bootm $load_addr#$board\0" \
116 "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
117 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
118 "&& hdp load $load_addr 0x2000\0" \
119 "sd_bootcmd=echo Trying load from SD ...;" \
120 "mmc dev 0; mmcinfo; mmc read $load_addr " \
121 "$kernel_addr_sd $kernel_size_sd && " \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800122 "env exists secureboot && mmc read $kernelheader_addr_r " \
Yuantian Tang18c20022020-03-20 14:37:06 +0800123 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
124 " && esbc_validate ${kernelheader_addr_r};" \
125 "bootm $load_addr#$board\0" \
126 "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
127 "mmc dev 0;mmcinfo; mmc read $load_addr 0x4a00 0x200 " \
128 "&& hdp load $load_addr 0x2000\0" \
129 "emmc_bootcmd=echo Trying load from EMMC ..;" \
130 "mmc dev 1; mmcinfo; mmc read $load_addr " \
131 "$kernel_addr_sd $kernel_size_sd && " \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800132 "env exists secureboot && mmc read $kernelheader_addr_r " \
Yuantian Tang18c20022020-03-20 14:37:06 +0800133 "$kernelhdr_addr_sd $kernelhdr_size_sd " \
Yuantian Tang473bbc42019-04-10 16:43:35 +0800134 " && esbc_validate ${kernelheader_addr_r};" \
Yuantian Tang18c20022020-03-20 14:37:06 +0800135 "bootm $load_addr#$board\0" \
136 "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
137 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
138 "&& hdp load $load_addr 0x2000\0"
139
Yuantian Tang473bbc42019-04-10 16:43:35 +0800140#endif
141#endif /* __LS1028A_QDS_H */