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Tapani Utriainen05550832013-12-04 09:27:33 +01001/*
2 * Configuration settings for the TechNexion TAO-3530 SOM
3 * equipped on Thunder baseboard.
4 *
5 * Edward Lin <linuxfae@technexion.com>
6 * Tapani Utriainen <linuxfae@technexion.com>
7 *
Stefan Roesefa7a0f92013-12-04 09:27:34 +01008 * Copyright (C) 2013 Stefan Roese <sr@denx.de>
9 *
Tapani Utriainen05550832013-12-04 09:27:33 +010010 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16/*
17 * High Level Configuration Options
18 */
Tapani Utriainen05550832013-12-04 09:27:33 +010019
Tapani Utriainen05550832013-12-04 09:27:33 +010020#define CONFIG_SDRC /* Has an SDRC controller */
21
22#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menonfa96c962015-03-09 17:12:04 -050023#include <asm/arch/omap.h>
Tapani Utriainen05550832013-12-04 09:27:33 +010024
Tapani Utriainen05550832013-12-04 09:27:33 +010025/* Clock Defines */
26#define V_OSCK 26000000 /* Clock output from T2 */
27#define V_SCLK (V_OSCK >> 1)
28
29#define CONFIG_MISC_INIT_R
30
Tapani Utriainen05550832013-12-04 09:27:33 +010031#define CONFIG_CMDLINE_TAG
32#define CONFIG_SETUP_MEMORY_TAGS
33#define CONFIG_INITRD_TAG
34#define CONFIG_REVISION_TAG
35
36/*
37 * Size of malloc() pool
38 */
39#define CONFIG_SYS_MALLOC_LEN (4 << 20)
40#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
41
42/*
43 * Hardware drivers
44 */
45
46/*
47 * NS16550 Configuration
48 */
49#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
50
Tapani Utriainen05550832013-12-04 09:27:33 +010051#define CONFIG_SYS_NS16550_SERIAL
52#define CONFIG_SYS_NS16550_REG_SIZE (-4)
53#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
54
55/*
56 * select serial console configuration
57 */
58#define CONFIG_CONS_INDEX 3
59#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
60
61/* allow to overwrite serial and ethaddr */
62#define CONFIG_ENV_OVERWRITE
Tapani Utriainen05550832013-12-04 09:27:33 +010063
64/* commands to include */
Tapani Utriainen05550832013-12-04 09:27:33 +010065#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
66#define MTDIDS_DEFAULT "nand0=nand"
67#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
68 "1920k(u-boot),128k(u-boot-env),"\
69 "4m(kernel),-(fs)"
70
Tapani Utriainen05550832013-12-04 09:27:33 +010071#define CONFIG_SYS_I2C
72#define CONFIG_SYS_I2C_OMAP34XX
73#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
74#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
75#define CONFIG_I2C_MULTI_BUS
76
77/*
78 * TWL4030
79 */
Tapani Utriainen05550832013-12-04 09:27:33 +010080#define CONFIG_TWL4030_LED
81
82/*
83 * Board NAND Info.
84 */
Tapani Utriainen05550832013-12-04 09:27:33 +010085#define CONFIG_NAND_OMAP_GPMC
86#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
87 /* to access nand */
88#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
89 /* to access nand at */
90 /* CS0 */
Tapani Utriainen05550832013-12-04 09:27:33 +010091
92#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
93 /* devices */
Stefano Babic0cd41182015-07-26 15:18:15 +020094#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
Tapani Utriainen05550832013-12-04 09:27:33 +010095/* Environment information */
Tapani Utriainen05550832013-12-04 09:27:33 +010096
97#define CONFIG_EXTRA_ENV_SETTINGS \
98 "loadaddr=0x82000000\0" \
99 "console=ttyO2,115200n8\0" \
100 "mpurate=600\0" \
101 "dvi_mode=omapfb.mode=dvi:1280x720-24@60\0" \
102 "tv_mode=omapfb.mode=tv:ntsc\0" \
103 "video_mode=omapdss.def_disp=lcd vram=6M omapfb.vram=0:2M,1:2M,2:2M\0" \
104 "lcd_mode=omapfb.mode=lcd:800x480@60 \0" \
105 "extra_options= \0" \
Tapani Utriainen05550832013-12-04 09:27:33 +0100106 "mmcdev=0\0" \
107 "mmcroot=/dev/mmcblk0p2 rw\0" \
108 "mmcrootfstype=ext3 rootwait\0" \
109 "nandroot=ubi0:rootfs ubi.mtd=4\0" \
110 "nandrootfstype=ubifs\0" \
111 "mmcargs=setenv bootargs console=${console} " \
Tapani Utriainen05550832013-12-04 09:27:33 +0100112 "mpurate=${mpurate} " \
113 "${video_mode} " \
114 "root=${mmcroot} " \
115 "rootfstype=${mmcrootfstype} " \
116 "${extra_options}\0" \
117 "nandargs=setenv bootargs console=${console} " \
Tapani Utriainen05550832013-12-04 09:27:33 +0100118 "mpurate=${mpurate} " \
119 "${video_mode} " \
120 "${network_setting} " \
121 "root=${nandroot} " \
122 "rootfstype=${nandrootfstype} "\
123 "${extra_options}\0" \
124 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
125 "bootscript=echo Running bootscript from mmc ...; " \
126 "source ${loadaddr}\0" \
127 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
128 "mmcboot=echo Booting from mmc ...; " \
129 "run mmcargs; " \
130 "bootm ${loadaddr}\0" \
131 "nandboot=echo Booting from nand ...; " \
132 "run nandargs; " \
133 "nand read ${loadaddr} 280000 400000; " \
134 "bootm ${loadaddr}\0" \
135
136#define CONFIG_BOOTCOMMAND \
137 "if mmc rescan ${mmcdev}; then " \
138 "if run loadbootscript; then " \
139 "run bootscript; " \
140 "else " \
141 "if run loaduimage; then " \
142 "run mmcboot; " \
143 "else run nandboot; " \
144 "fi; " \
145 "fi; " \
146 "else run nandboot; fi"
147
148/*
149 * Miscellaneous configurable options
150 */
151#define CONFIG_SYS_LONGHELP /* undef to save memory */
Tapani Utriainen05550832013-12-04 09:27:33 +0100152#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
153
154/* turn on command-line edit/hist/auto */
155#define CONFIG_CMDLINE_EDITING
Tapani Utriainen05550832013-12-04 09:27:33 +0100156#define CONFIG_AUTO_COMPLETE
157
158/* Print Buffer Size */
159#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
160 sizeof(CONFIG_SYS_PROMPT) + 16)
161#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
162/* Boot Argument Buffer Size */
163#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
164
165#define CONFIG_SYS_ALT_MEMTEST 1
166#define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */
167 /* defaults */
168#define CONFIG_SYS_MEMTEST_END (0x83FFFFFF) /* 64MB */
169#define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */
170
171#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
172 /* load address */
173#define CONFIG_SYS_TEXT_BASE 0x80008000
174
175/*
176 * OMAP3 has 12 GP timers, they can be driven by the system clock
177 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
178 * This rate is divided by a local divisor.
179 */
180#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
181#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
182
183/*
Tapani Utriainen05550832013-12-04 09:27:33 +0100184 * Physical Memory Map
185 */
186#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
187#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
188#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
189#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
190
191/*
192 * FLASH and environment organization
193 */
194
195/* **** PISMO SUPPORT *** */
Tapani Utriainen05550832013-12-04 09:27:33 +0100196#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
pekon gupta0a9ec452014-07-18 17:59:41 +0530197#define CONFIG_SYS_FLASH_BASE NAND_BASE
Tapani Utriainen05550832013-12-04 09:27:33 +0100198
199/* Monitor at start of flash */
200#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
201#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
202
Tapani Utriainen05550832013-12-04 09:27:33 +0100203#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
204#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
205
206#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10)
207#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
208#define CONFIG_ENV_ADDR CONFIG_ENV_OFFSET
209
210#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
211#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
212#define CONFIG_SYS_INIT_RAM_SIZE 0x800
213#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
214 CONFIG_SYS_INIT_RAM_SIZE - \
215 GENERATED_GBL_DATA_SIZE)
216
217#define CONFIG_OMAP3_SPI
218
219/*
220 * USB
221 *
222 * Currently only EHCI is enabled, the MUSB OTG controller
223 * is not enabled.
224 */
225
226/* USB EHCI */
Tapani Utriainen05550832013-12-04 09:27:33 +0100227#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 162
228
Tapani Utriainen05550832013-12-04 09:27:33 +0100229#define CONFIG_USB_HOST_ETHER
230#define CONFIG_USB_ETHER_SMSC95XX
231
232#define CONFIG_USB_ETHER
233#define CONFIG_USB_ETHER_RNDIS
Tapani Utriainen05550832013-12-04 09:27:33 +0100234
Stefan Roesefa7a0f92013-12-04 09:27:34 +0100235/* Defines for SPL */
Stefan Roesefa7a0f92013-12-04 09:27:34 +0100236#define CONFIG_SPL_FRAMEWORK
237#define CONFIG_SPL_NAND_SIMPLE
238
Paul Kocialkowski341e8cd2014-11-08 23:14:55 +0100239#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET602a16c2014-10-15 17:53:11 +0200240#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Stefan Roesefa7a0f92013-12-04 09:27:34 +0100241
Stefan Roesefa7a0f92013-12-04 09:27:34 +0100242#define CONFIG_SPL_NAND_BASE
243#define CONFIG_SPL_NAND_DRIVERS
244#define CONFIG_SPL_NAND_ECC
Stefan Roesefa7a0f92013-12-04 09:27:34 +0100245#define CONFIG_SPL_OMAP3_ID_NAND
Tom Rini28eec372016-11-07 21:34:54 -0500246#define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds"
Stefan Roesefa7a0f92013-12-04 09:27:34 +0100247
248/* NAND boot config */
249#define CONFIG_SYS_NAND_5_ADDR_CYCLE
250#define CONFIG_SYS_NAND_PAGE_COUNT 64
251#define CONFIG_SYS_NAND_PAGE_SIZE 2048
252#define CONFIG_SYS_NAND_OOBSIZE 64
253#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
254#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
255/*
256 * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
257 * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
258 */
259#define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \
260 10, 11, 12, 13 }
261#define CONFIG_SYS_NAND_ECCSIZE 512
262#define CONFIG_SYS_NAND_ECCBYTES 3
263#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
264
265#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
266#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
267
268#define CONFIG_SPL_TEXT_BASE 0x40200800
Tom Rinicfff4aa2016-08-26 13:30:43 -0400269#define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \
270 CONFIG_SPL_TEXT_BASE)
Stefan Roesefa7a0f92013-12-04 09:27:34 +0100271
272/*
273 * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
274 * older x-loader implementations. And move the BSS area so that it
275 * doesn't overlap with TEXT_BASE.
276 */
277#define CONFIG_SYS_TEXT_BASE 0x80008000
278#define CONFIG_SPL_BSS_START_ADDR 0x80100000
279#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
280
281#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
282#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
283
Tapani Utriainen05550832013-12-04 09:27:33 +0100284#endif /* __CONFIG_H */