blob: 03cd9f60f943f496ad1a6d34feed614a1f6d1e1a [file] [log] [blame]
Simon Glass437e2b82012-02-23 03:28:41 +00001/*
2 * Copyright (c) 2004-2008 Texas Instruments
3 *
4 * (C) Copyright 2002
5 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glass437e2b82012-02-23 03:28:41 +00008 */
9
Marc Zyngierc0451ec2014-07-12 14:24:02 +010010#include <config.h>
11
Simon Glass437e2b82012-02-23 03:28:41 +000012OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
13OUTPUT_ARCH(arm)
14ENTRY(_start)
15SECTIONS
16{
17 . = 0x00000000;
18
19 . = ALIGN(4);
20 .text :
21 {
Albert ARIBAUDc53687e2013-06-11 14:17:33 +020022 *(.__image_copy_start)
Albert ARIBAUD9852cc62014-04-15 16:13:51 +020023 *(.vectors)
Stephen Warrenadddf452012-10-22 06:19:32 +000024 CPUDIR/start.o (.text*)
25 *(.text*)
Simon Glass437e2b82012-02-23 03:28:41 +000026 }
Marc Zyngierc0451ec2014-07-12 14:24:02 +010027
Jan Kiszkaac31b5a2015-04-21 07:18:24 +020028#ifdef CONFIG_ARMV7_NONSEC
Marc Zyngierc0451ec2014-07-12 14:24:02 +010029
30#ifndef CONFIG_ARMV7_SECURE_BASE
31#define CONFIG_ARMV7_SECURE_BASE
32#endif
33
34 .__secure_start : {
35 . = ALIGN(0x1000);
36 *(.__secure_start)
37 }
38
39 .secure_text CONFIG_ARMV7_SECURE_BASE :
40 AT(ADDR(.__secure_start) + SIZEOF(.__secure_start))
41 {
42 *(._secure.text)
43 }
44
45 . = LOADADDR(.__secure_start) +
46 SIZEOF(.__secure_start) +
47 SIZEOF(.secure_text);
48
49 __secure_end_lma = .;
50 .__secure_end : AT(__secure_end_lma) {
51 *(.__secure_end)
52 LONG(0x1d1071c); /* Must output something to reset LMA */
53 }
54#endif
Simon Glass437e2b82012-02-23 03:28:41 +000055
56 . = ALIGN(4);
57 .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
58
59 . = ALIGN(4);
60 .data : {
Stephen Warrenadddf452012-10-22 06:19:32 +000061 *(.data*)
Simon Glass437e2b82012-02-23 03:28:41 +000062 }
63
64 . = ALIGN(4);
65
66 . = .;
Simon Glass437e2b82012-02-23 03:28:41 +000067
68 . = ALIGN(4);
Marek Vasut607092a2012-10-12 10:27:03 +000069 .u_boot_list : {
Albert ARIBAUDc24895e2013-02-25 00:59:00 +000070 KEEP(*(SORT(.u_boot_list*)));
Marek Vasut607092a2012-10-12 10:27:03 +000071 }
72
73 . = ALIGN(4);
Simon Glass437e2b82012-02-23 03:28:41 +000074
Albert ARIBAUDc53687e2013-06-11 14:17:33 +020075 .image_copy_end :
76 {
77 *(.__image_copy_end)
78 }
Simon Glass437e2b82012-02-23 03:28:41 +000079
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +020080 .rel_dyn_start :
81 {
82 *(.__rel_dyn_start)
83 }
84
Simon Glass437e2b82012-02-23 03:28:41 +000085 .rel.dyn : {
Simon Glass437e2b82012-02-23 03:28:41 +000086 *(.rel*)
Albert ARIBAUDaf3ff162013-06-11 14:17:34 +020087 }
88
89 .rel_dyn_end :
90 {
91 *(.__rel_dyn_end)
Simon Glass437e2b82012-02-23 03:28:41 +000092 }
93
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +010094 .end :
95 {
96 *(.__end)
97 }
98
99 _image_binary_end = .;
Simon Glass437e2b82012-02-23 03:28:41 +0000100
101 /*
102 * Deprecated: this MMU section is used by pxa at present but
103 * should not be used by new boards/CPUs.
104 */
105 . = ALIGN(4096);
106 .mmutable : {
107 *(.mmutable)
108 }
109
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000110/*
111 * Compiler-generated __bss_start and __bss_end, see arch/arm/lib/bss.c
112 * __bss_base and __bss_limit are for linker only (overlay ordering)
113 */
114
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000115 .bss_start __rel_dyn_start (OVERLAY) : {
116 KEEP(*(.__bss_start));
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000117 __bss_base = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000118 }
119
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000120 .bss __bss_base (OVERLAY) : {
Stephen Warrenadddf452012-10-22 06:19:32 +0000121 *(.bss*)
Simon Glass437e2b82012-02-23 03:28:41 +0000122 . = ALIGN(4);
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000123 __bss_limit = .;
Albert ARIBAUD436f6322013-02-25 00:58:59 +0000124 }
Tom Rini19aac972013-03-18 12:31:00 -0400125
Albert ARIBAUDba5662d2013-04-11 05:43:21 +0000126 .bss_end __bss_limit (OVERLAY) : {
127 KEEP(*(.__bss_end));
Simon Glass437e2b82012-02-23 03:28:41 +0000128 }
129
Albert ARIBAUD9d25fa42014-02-22 17:53:42 +0100130 .dynsym _image_binary_end : { *(.dynsym) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100131 .dynbss : { *(.dynbss) }
132 .dynstr : { *(.dynstr*) }
133 .dynamic : { *(.dynamic*) }
134 .plt : { *(.plt*) }
135 .interp : { *(.interp*) }
Andreas Färber438a1672014-01-27 05:48:11 +0100136 .gnu.hash : { *(.gnu.hash) }
Albert ARIBAUD95fc6d62013-11-07 14:21:46 +0100137 .gnu : { *(.gnu*) }
138 .ARM.exidx : { *(.ARM.exidx*) }
Albert ARIBAUDddadbed2014-01-13 14:57:05 +0100139 .gnu.linkonce.armexidx : { *(.gnu.linkonce.armexidx.*) }
Simon Glass437e2b82012-02-23 03:28:41 +0000140}