Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2007 Freescale Semiconductor, Inc. |
| 4 | * Kevin Lam <kevin.lam@freescale.com> |
| 5 | * Joe D'Abbraccio <joe.d'abbraccio@freescale.com> |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
Simon Glass | db22961 | 2019-08-01 09:46:42 -0600 | [diff] [blame] | 9 | #include <env.h> |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 10 | #include <hwconfig.h> |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 11 | #include <i2c.h> |
Simon Glass | 0ffd9db | 2019-12-28 10:45:06 -0700 | [diff] [blame] | 12 | #include <init.h> |
Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 13 | #include <asm/bitops.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 14 | #include <asm/global_data.h> |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 15 | #include <asm/io.h> |
Kumar Gala | b7c3ccf | 2010-04-20 10:02:24 -0500 | [diff] [blame] | 16 | #include <asm/fsl_mpc83xx_serdes.h> |
Jean-Christophe PLAGNIOL-VILLARD | 5fc8a4b | 2008-04-02 13:41:21 +0200 | [diff] [blame] | 17 | #include <fdt_support.h> |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 18 | #include <spd_sdram.h> |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 19 | #include <vsc7385.h> |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 20 | #include <fsl_esdhc.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 21 | #include <linux/delay.h> |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 22 | |
Simon Glass | 39f90ba | 2017-03-31 08:40:25 -0600 | [diff] [blame] | 23 | DECLARE_GLOBAL_DATA_PTR; |
| 24 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 25 | #if defined(CFG_SYS_DRAM_TEST) |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 26 | int |
| 27 | testdram(void) |
| 28 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 29 | uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START; |
| 30 | uint *pend = (uint *) CONFIG_SYS_MEMTEST_END; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 31 | uint *p; |
| 32 | |
| 33 | printf("Testing DRAM from 0x%08x to 0x%08x\n", |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 34 | CONFIG_SYS_MEMTEST_START, |
| 35 | CONFIG_SYS_MEMTEST_END); |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 36 | |
| 37 | printf("DRAM test phase 1:\n"); |
| 38 | for (p = pstart; p < pend; p++) |
| 39 | *p = 0xaaaaaaaa; |
| 40 | |
| 41 | for (p = pstart; p < pend; p++) { |
| 42 | if (*p != 0xaaaaaaaa) { |
| 43 | printf("DRAM test fails at: %08x\n", (uint) p); |
| 44 | return 1; |
| 45 | } |
| 46 | } |
| 47 | |
| 48 | printf("DRAM test phase 2:\n"); |
| 49 | for (p = pstart; p < pend; p++) |
| 50 | *p = 0x55555555; |
| 51 | |
| 52 | for (p = pstart; p < pend; p++) { |
| 53 | if (*p != 0x55555555) { |
| 54 | printf("DRAM test fails at: %08x\n", (uint) p); |
| 55 | return 1; |
| 56 | } |
| 57 | } |
| 58 | |
| 59 | printf("DRAM test passed.\n"); |
| 60 | return 0; |
| 61 | } |
| 62 | #endif |
| 63 | |
Peter Tyser | cb4731f | 2009-06-30 17:15:50 -0500 | [diff] [blame] | 64 | #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 65 | void ddr_enable_ecc(unsigned int dram_size); |
| 66 | #endif |
| 67 | int fixed_sdram(void); |
| 68 | |
Simon Glass | d35f338 | 2017-04-06 12:47:05 -0600 | [diff] [blame] | 69 | int dram_init(void) |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 70 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 71 | immap_t *im = (immap_t *) CONFIG_SYS_IMMR; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 72 | u32 msize = 0; |
| 73 | |
| 74 | if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) |
Simon Glass | 39f90ba | 2017-03-31 08:40:25 -0600 | [diff] [blame] | 75 | return -ENXIO; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 76 | |
| 77 | #if defined(CONFIG_SPD_EEPROM) |
| 78 | msize = spd_sdram(); |
| 79 | #else |
| 80 | msize = fixed_sdram(); |
| 81 | #endif |
| 82 | |
Peter Tyser | cb4731f | 2009-06-30 17:15:50 -0500 | [diff] [blame] | 83 | #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 84 | /* Initialize DDR ECC byte */ |
| 85 | ddr_enable_ecc(msize * 1024 * 1024); |
| 86 | #endif |
| 87 | /* return total bus DDR size(bytes) */ |
Simon Glass | 39f90ba | 2017-03-31 08:40:25 -0600 | [diff] [blame] | 88 | gd->ram_size = msize * 1024 * 1024; |
| 89 | |
| 90 | return 0; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | #if !defined(CONFIG_SPD_EEPROM) |
| 94 | /************************************************************************* |
| 95 | * fixed sdram init -- doesn't use serial presence detect. |
| 96 | ************************************************************************/ |
| 97 | int fixed_sdram(void) |
| 98 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 99 | immap_t *im = (immap_t *) CONFIG_SYS_IMMR; |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 100 | u32 msize = CFG_SYS_SDRAM_SIZE; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 101 | u32 msize_log2 = __ilog2(msize); |
| 102 | |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 103 | im->sysconf.ddrlaw[0].bar = CFG_SYS_SDRAM_BASE & 0xfffff000; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 104 | im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1); |
| 105 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 106 | im->sysconf.ddrcdr = CFG_SYS_DDRCDR_VALUE; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 107 | udelay(50000); |
| 108 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 109 | im->ddr.sdram_clk_cntl = CFG_SYS_DDR_SDRAM_CLK_CNTL; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 110 | udelay(1000); |
| 111 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 112 | im->ddr.csbnds[0].csbnds = CFG_SYS_DDR_CS0_BNDS; |
| 113 | im->ddr.cs_config[0] = CFG_SYS_DDR_CS0_CONFIG; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 114 | udelay(1000); |
| 115 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 116 | im->ddr.timing_cfg_0 = CFG_SYS_DDR_TIMING_0; |
| 117 | im->ddr.timing_cfg_1 = CFG_SYS_DDR_TIMING_1; |
| 118 | im->ddr.timing_cfg_2 = CFG_SYS_DDR_TIMING_2; |
| 119 | im->ddr.timing_cfg_3 = CFG_SYS_DDR_TIMING_3; |
| 120 | im->ddr.sdram_cfg = CFG_SYS_DDR_SDRAM_CFG; |
| 121 | im->ddr.sdram_cfg2 = CFG_SYS_DDR_SDRAM_CFG2; |
| 122 | im->ddr.sdram_mode = CFG_SYS_DDR_MODE; |
| 123 | im->ddr.sdram_mode2 = CFG_SYS_DDR_MODE2; |
| 124 | im->ddr.sdram_interval = CFG_SYS_DDR_INTERVAL; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 125 | sync(); |
| 126 | udelay(1000); |
| 127 | |
| 128 | im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; |
| 129 | udelay(2000); |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 130 | return CFG_SYS_SDRAM_SIZE >> 20; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 131 | } |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 132 | #endif /*!CONFIG_SYS_SPD_EEPROM */ |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 133 | |
| 134 | int checkboard(void) |
| 135 | { |
| 136 | puts("Board: Freescale MPC837xERDB\n"); |
| 137 | return 0; |
| 138 | } |
| 139 | |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 140 | int board_early_init_f(void) |
| 141 | { |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
Sinan Akman | d068b6a | 2020-04-04 01:16:47 -0400 | [diff] [blame] | 143 | #ifdef CONFIG_FSL_SERDES |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 144 | u32 spridr = in_be32(&immr->sysconf.spridr); |
| 145 | |
| 146 | /* we check only part num, and don't look for CPU revisions */ |
Kim Phillips | ecb2d6f | 2008-03-28 10:19:07 -0500 | [diff] [blame] | 147 | switch (PARTID_NO_E(spridr)) { |
| 148 | case SPR_8377: |
Tom Rini | 4909b1c | 2022-12-04 10:04:03 -0500 | [diff] [blame^] | 149 | fsl_setup_serdes(CFG_FSL_SERDES1, FSL_SERDES_PROTO_SATA, |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 150 | FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); |
Kim Phillips | ecb2d6f | 2008-03-28 10:19:07 -0500 | [diff] [blame] | 151 | fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX, |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 152 | FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); |
| 153 | break; |
Kim Phillips | ecb2d6f | 2008-03-28 10:19:07 -0500 | [diff] [blame] | 154 | case SPR_8378: |
Anton Vorontsov | 642016b | 2008-10-02 18:31:53 +0400 | [diff] [blame] | 155 | fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_PEX, |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 156 | FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); |
| 157 | break; |
Kim Phillips | ecb2d6f | 2008-03-28 10:19:07 -0500 | [diff] [blame] | 158 | case SPR_8379: |
Tom Rini | 4909b1c | 2022-12-04 10:04:03 -0500 | [diff] [blame^] | 159 | fsl_setup_serdes(CFG_FSL_SERDES1, FSL_SERDES_PROTO_SATA, |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 160 | FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); |
Kim Phillips | ecb2d6f | 2008-03-28 10:19:07 -0500 | [diff] [blame] | 161 | fsl_setup_serdes(CONFIG_FSL_SERDES2, FSL_SERDES_PROTO_SATA, |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 162 | FSL_SERDES_CLK_100, FSL_SERDES_VDD_1V); |
| 163 | break; |
| 164 | default: |
| 165 | printf("serdes not configured: unknown CPU part number: " |
| 166 | "%04x\n", spridr >> 16); |
| 167 | break; |
| 168 | } |
| 169 | #endif /* CONFIG_FSL_SERDES */ |
Sinan Akman | d068b6a | 2020-04-04 01:16:47 -0400 | [diff] [blame] | 170 | |
| 171 | #ifdef CONFIG_FSL_ESDHC |
| 172 | clrsetbits_be32(&immr->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); |
| 173 | clrsetbits_be32(&immr->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD); |
| 174 | #endif |
Anton Vorontsov | 2b3c004 | 2008-03-24 17:40:43 +0300 | [diff] [blame] | 175 | return 0; |
| 176 | } |
| 177 | |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 178 | #ifdef CONFIG_FSL_ESDHC |
Sinan Akman | 8d09f91 | 2021-05-11 14:18:02 -0400 | [diff] [blame] | 179 | #if !(CONFIG_IS_ENABLED(DM_MMC) || CONFIG_IS_ENABLED(DM_USB)) |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 180 | int board_mmc_init(struct bd_info *bd) |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 181 | { |
| 182 | struct immap __iomem *im = (struct immap __iomem *)CONFIG_SYS_IMMR; |
Sinan Akman | 8dc24e0 | 2015-01-20 20:47:01 -0500 | [diff] [blame] | 183 | char buffer[HWCONFIG_BUFFER_SIZE] = {0}; |
| 184 | int esdhc_hwconfig_enabled = 0; |
| 185 | |
Simon Glass | 64b723f | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 186 | if (env_get_f("hwconfig", buffer, sizeof(buffer)) > 0) |
Sinan Akman | 8dc24e0 | 2015-01-20 20:47:01 -0500 | [diff] [blame] | 187 | esdhc_hwconfig_enabled = hwconfig_f("esdhc", buffer); |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 188 | |
Sinan Akman | 8dc24e0 | 2015-01-20 20:47:01 -0500 | [diff] [blame] | 189 | if (esdhc_hwconfig_enabled == 0) |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 190 | return 0; |
| 191 | |
| 192 | clrsetbits_be32(&im->sysconf.sicrl, SICRL_USB_B, SICRL_USB_B_SD); |
| 193 | clrsetbits_be32(&im->sysconf.sicrh, SICRH_SPI, SICRH_SPI_SD); |
| 194 | |
| 195 | return fsl_esdhc_mmc_init(bd); |
| 196 | } |
| 197 | #endif |
Sinan Akman | d068b6a | 2020-04-04 01:16:47 -0400 | [diff] [blame] | 198 | #endif |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 199 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 200 | /* |
| 201 | * Miscellaneous late-boot configurations |
| 202 | * |
| 203 | * If a VSC7385 microcode image is present, then upload it. |
| 204 | */ |
| 205 | int misc_init_r(void) |
| 206 | { |
| 207 | int rc = 0; |
| 208 | |
| 209 | #ifdef CONFIG_VSC7385_IMAGE |
| 210 | if (vsc7385_upload_firmware((void *) CONFIG_VSC7385_IMAGE, |
| 211 | CONFIG_VSC7385_IMAGE_SIZE)) { |
| 212 | puts("Failure uploading VSC7385 microcode.\n"); |
| 213 | rc = 1; |
| 214 | } |
| 215 | #endif |
| 216 | |
| 217 | return rc; |
| 218 | } |
| 219 | |
Sinan Akman | 8d09f91 | 2021-05-11 14:18:02 -0400 | [diff] [blame] | 220 | int board_late_init(void) |
| 221 | { |
| 222 | volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR; |
Tom Rini | 8a09162 | 2021-07-09 10:11:55 -0400 | [diff] [blame] | 223 | #ifdef CONFIG_USB_HOST |
Sinan Akman | 8d09f91 | 2021-05-11 14:18:02 -0400 | [diff] [blame] | 224 | clrsetbits_be32(&immap->sysconf.sicrl, SICRL_USB_A, 0x40000000); |
| 225 | #endif |
| 226 | return 0; |
| 227 | } |
| 228 | |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 229 | #if defined(CONFIG_OF_BOARD_SETUP) |
| 230 | |
Masahiro Yamada | f7ed78b | 2020-06-26 15:13:33 +0900 | [diff] [blame] | 231 | int ft_board_setup(void *blob, struct bd_info *bd) |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 232 | { |
| 233 | #ifdef CONFIG_PCI |
| 234 | ft_pci_setup(blob, bd); |
| 235 | #endif |
| 236 | ft_cpu_setup(blob, bd); |
Sriram Dash | 9fd465c | 2016-09-16 17:12:15 +0530 | [diff] [blame] | 237 | fsl_fdt_fixup_dr_usb(blob, bd); |
Anton Vorontsov | 3628a93 | 2009-06-10 00:25:30 +0400 | [diff] [blame] | 238 | fdt_fixup_esdhc(blob, bd); |
Simon Glass | 2aec3cc | 2014-10-23 18:58:47 -0600 | [diff] [blame] | 239 | |
| 240 | return 0; |
Kim Phillips | 1cb07e6 | 2008-01-16 00:38:05 -0600 | [diff] [blame] | 241 | } |
| 242 | #endif /* CONFIG_OF_BOARD_SETUP */ |