arch/arm/dts/exynos5.dtsi

/*
 * Copyright (c) 2013 The Chromium OS Authors
 * SAMSUNG EXYNOS5 SoC device tree source
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include "skeleton.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	compatible = "samsung,exynos5";

	combiner: interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		samsung,combiner-nr = <32>;
		reg = <0x10440000 0x1000>;
		interrupts =	<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
				<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
				<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
				<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
				<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
				<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
				<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
				<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	};

	gic: interrupt-controller@10481000 {
		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg =	<0x10481000 0x1000>,
			<0x10482000 0x1000>,
			<0x10484000 0x2000>,
			<0x10486000 0x2000>;
		interrupts = <1 9 0xf04>;
	};

	sromc@12250000 {
		compatible = "samsung,exynos-sromc";
		reg = <0x12250000 0x20>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	combiner: interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		samsung,combiner-nr = <32>;
		reg = <0x10440000 0x1000>;
		interrupts =	<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
				<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
				<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
				<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
				<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
				<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
				<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
				<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	};

	gic: interrupt-controller@10481000 {
		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg =	<0x10481000 0x1000>,
			<0x10482000 0x1000>,
			<0x10484000 0x2000>,
			<0x10486000 0x2000>;
		interrupts = <1 9 0xf04>;
	};

	i2c_0: i2c@12C60000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C60000 0x100>;
		interrupts = <0 56 0>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c_1: i2c@12C70000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C70000 0x100>;
		interrupts = <0 57 0>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c_2: i2c@12C80000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C80000 0x100>;
		interrupts = <0 58 0>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	i2c_3: i2c@12C90000 {
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C90000 0x100>;
		interrupts = <0 59 0>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	spi_0: spi@12d20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x12d20000 0x30>;
		interrupts = <0 68 0>;
	};

	spi_1: spi@12d30000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x12d30000 0x30>;
		interrupts = <0 69 0>;
	};

	spi_2: spi@12d40000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x12d40000 0x30>;
		clock-frequency = <50000000>;
		interrupts = <0 70 0>;
        };

	spi_3: spi@131a0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x131a0000 0x30>;
		interrupts = <0 129 0>;
	};

	spi_4: spi@131b0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x131b0000 0x30>;
		interrupts = <0 130 0>;
	};

	ehci@12110000 {
		compatible = "samsung,exynos-ehci";
		reg = <0x12110000 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;

		phy {
			compatible = "samsung,exynos-usb-phy";
			reg = <0x12130000 0x100>;
		};
	};

	tmu@10060000 {
		compatible = "samsung,exynos-tmu";
		reg = <0x10060000 0x10000>;
	};

	fimd@14400000 {
		compatible = "samsung,exynos-fimd";
		reg = <0x14400000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;
	};

	dp@145b0000 {
		compatible = "samsung,exynos5-dp";
		reg = <0x145b0000 0x1000>;
		#address-cells = <1>;
		#size-cells = <1>;
	};

	xhci0: xhci@12000000 {
		compatible = "samsung,exynos5250-xhci";
		reg = <0x12000000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;

		phy {
			compatible = "samsung,exynos5250-usb3-phy";
			reg = <0x12100000 0x100>;
		};
	};

	mmc@12200000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12200000 0x1000>;
		interrupts = <0 75 0>;
	};

	mmc@12210000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12210000 0x1000>;
		interrupts = <0 76 0>;
	};

	mmc@12220000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12220000 0x1000>;
		interrupts = <0 77 0>;
	};

	mmc@12230000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12230000 0x1000>;
		interrupts = <0 78 0>;
	};

	serial@12C00000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C00000 0x100>;
		interrupts = <0 51 0>;
		id = <0>;
	};

	serial@12C10000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C10000 0x100>;
		interrupts = <0 52 0>;
		id = <1>;
	};

	serial@12C20000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C20000 0x100>;
		interrupts = <0 53 0>;
		id = <2>;
	};

	serial@12C30000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C30000 0x100>;
		interrupts = <0 54 0>;
		u-boot,dm-pre-reloc;
		id = <3>;
	};
};