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git01.mediatek.com / filogic / uboot / 45d276476936047473318eabbc839e2efea7121f / . / configs / sama5d2_xplained_mmc_defconfig
blob: 633f6c5ad00cc240c08864df3be93720286e3f4f [file] [log] [blame]
Wenyou Yangc64a75a2015-10-30 09:55:52 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_AT91=y
Tom Rini07edfae2018-02-03 12:10:38 -0500[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x26f00000
Wenyou Yangc64a75a2015-10-30 09:55:52 +0800[diff] [blame]4CONFIG_TARGET_SAMA5D2_XPLAINED=y
Simon Glass0bdfc3e2016-09-12 23:18:39 -0600[diff] [blame]5CONFIG_SPL_GPIO_SUPPORT=y
Simon Glassf2a89462016-09-12 23:18:41 -0600[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
Simon Glassb16c92c2016-09-12 23:18:43 -0600[diff] [blame]7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]8CONFIG_SYS_MALLOC_F_LEN=0x2000
Simon Glassbd58f1d2016-09-12 23:18:44 -0600[diff] [blame]9CONFIG_SPL_MMC_SUPPORT=y
Simon Glasse076d6f2016-09-12 23:18:56 -0600[diff] [blame]10CONFIG_SPL_SERIAL_SUPPORT=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]11CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]12CONFIG_NR_DRAM_BANKS=1
Tom Rini9bd09622018-04-07 20:27:54 -0400[diff] [blame]13CONFIG_SPL=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]14CONFIG_DEBUG_UART_BOARD_INIT=y
15CONFIG_DEBUG_UART_BASE=0xf8020000
16CONFIG_DEBUG_UART_CLOCK=83000000
Tien Fong Chee6fd0a712019-01-23 14:20:03 +0800[diff] [blame]17CONFIG_SPL_FS_FAT=y
Tom Rinie0056d72018-06-04 11:57:37 -0400[diff] [blame]18CONFIG_SPL_LIBDISK_SUPPORT=y
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]19CONFIG_DEBUG_UART=y
Adam Ford58dbf862018-02-06 07:58:59 -0600[diff] [blame]20CONFIG_ENV_VARS_UBOOT_CONFIG=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]21CONFIG_FIT=y
Wenyou Yangc64a75a2015-10-30 09:55:52 +0800[diff] [blame]22CONFIG_SYS_EXTRA_OPTIONS="SAMA5D2,SYS_USE_MMC"
Wenyou Yange035ea72017-09-14 11:07:44 +0800[diff] [blame]23CONFIG_SD_BOOT=y
Heiko Schocher0b368b12016-06-07 08:31:14 +0200[diff] [blame]24CONFIG_BOOTDELAY=3
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]25CONFIG_USE_BOOTARGS=y
26CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk1p2 rw rootwait"
Adam Ford10541762018-07-29 13:13:29 -0500[diff] [blame]27CONFIG_MISC_INIT_R=y
Lokesh Vutla94d95e42016-10-11 21:33:46 -0400[diff] [blame]28# CONFIG_DISPLAY_BOARDINFO is not set
Simon Goldschmidtcc4078c2018-09-30 14:31:53 +0200[diff] [blame]29CONFIG_SPL_TEXT_BASE=0x200000
Wenyou Yanga4db4492017-03-23 14:26:28 +0800[diff] [blame]30CONFIG_SPL_SEPARATE_BSS=y
Tom Rinif852e732016-04-21 21:37:19 -0400[diff] [blame]31CONFIG_HUSH_PARSER=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]32CONFIG_CMD_BOOTZ=y
Wenyou Yangc64a75a2015-10-30 09:55:52 +0800[diff] [blame]33# CONFIG_CMD_FLASH is not set
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]34CONFIG_CMD_I2C=y
35# CONFIG_CMD_LOADS is not set
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]36CONFIG_CMD_MMC=y
Wenyou Yangc64a75a2015-10-30 09:55:52 +0800[diff] [blame]37CONFIG_CMD_SF=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]38CONFIG_CMD_USB=y
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]39CONFIG_CMD_DHCP=y
40CONFIG_CMD_PING=y
Eugen Hristev0ff07d22018-05-09 13:08:01 +0300[diff] [blame]41CONFIG_CMD_EXT4=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]42CONFIG_CMD_FAT=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]43CONFIG_OF_CONTROL=y
44CONFIG_SPL_OF_CONTROL=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]45CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained"
Wenyou Yanga4db4492017-03-23 14:26:28 +0800[diff] [blame]46CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]47CONFIG_ENV_IS_IN_FAT=y
Eugen Hristev41407de2018-05-11 11:14:31 +0300[diff] [blame]48CONFIG_ENV_FAT_DEVICE_AND_PART="1:1"
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]49CONFIG_DM=y
50CONFIG_SPL_DM=y
Wenyou Yanga4db4492017-03-23 14:26:28 +0800[diff] [blame]51CONFIG_SPL_DM_SEQ_ALIAS=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]52CONFIG_CLK=y
53CONFIG_SPL_CLK=y
54CONFIG_CLK_AT91=y
55CONFIG_AT91_UTMI=y
56CONFIG_AT91_H32MX=y
57CONFIG_AT91_GENERIC_CLK=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]58CONFIG_DM_GPIO=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]59CONFIG_ATMEL_PIO4=y
60CONFIG_DM_I2C=y
61CONFIG_SYS_I2C_AT91=y
Wenyou Yanga1e24ec2017-09-01 16:26:17 +0800[diff] [blame]62CONFIG_I2C_EEPROM=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]63CONFIG_DM_MMC=y
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]64CONFIG_MMC_SDHCI=y
Tom Rini9834b902017-03-13 13:48:42 -0400[diff] [blame]65CONFIG_MMC_SDHCI_ATMEL=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]66CONFIG_DM_SPI_FLASH=y
Wenyou Yangc64a75a2015-10-30 09:55:52 +0800[diff] [blame]67CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]68CONFIG_SF_DEFAULT_SPEED=30000000
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]69CONFIG_SPI_FLASH_ATMEL=y
Tudor Ambarus45d27642019-06-18 08:51:53 +0000[diff] [blame^]70CONFIG_SPI_FLASH_MACRONIX=y
71CONFIG_SPI_FLASH_SPANSION=y
72CONFIG_SPI_FLASH_STMICRO=y
73CONFIG_SPI_FLASH_SST=y
Wenyou Yang69b73012017-03-23 14:26:24 +0800[diff] [blame]74CONFIG_DM_ETH=y
75CONFIG_MACB=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]76CONFIG_PINCTRL=y
Wenyou Yanga4db4492017-03-23 14:26:28 +0800[diff] [blame]77CONFIG_SPL_PINCTRL=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]78CONFIG_PINCTRL_AT91PIO4=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]79CONFIG_DM_SERIAL=y
Wenyou Yang113e1d12016-10-17 09:55:26 +0800[diff] [blame]80CONFIG_DEBUG_UART_ATMEL=y
Wenyou Yang113e1d12016-10-17 09:55:26 +0800[diff] [blame]81CONFIG_DEBUG_UART_ANNOUNCE=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]82CONFIG_ATMEL_USART=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]83CONFIG_SPI=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]84CONFIG_DM_SPI=y
Tudor Ambarus45d27642019-06-18 08:51:53 +0000[diff] [blame^]85CONFIG_ATMEL_QSPI=y
Wenyou.Yang@microchip.com272167d2017-08-15 17:40:27 +0800[diff] [blame]86CONFIG_TIMER=y
87CONFIG_SPL_TIMER=y
88CONFIG_ATMEL_PIT_TIMER=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]89CONFIG_USB=y
Wenyou Yang904c7742016-10-17 09:55:23 +0800[diff] [blame]90CONFIG_DM_USB=y
91CONFIG_USB_EHCI_HCD=y
Masahiro Yamada74f09b82016-12-07 22:10:25 +0900[diff] [blame]92CONFIG_USB_STORAGE=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]93CONFIG_USB_GADGET=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]94CONFIG_USB_GADGET_ATMEL_USBA=y
Wenyou Yang3ec18a62017-09-18 15:25:57 +0800[diff] [blame]95CONFIG_DM_VIDEO=y
96CONFIG_ATMEL_HLCD=y
Eugen Hristev20913262018-09-18 10:35:37 +0300[diff] [blame]97CONFIG_W1=y
98CONFIG_W1_GPIO=y
99CONFIG_W1_EEPROM=y
100CONFIG_W1_EEPROM_DS24XXX=y
Eugen Hristevba4c76f2018-09-18 10:35:48 +0300[diff] [blame]101CONFIG_OF_LIBFDT_OVERLAY=y