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Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +05301/*
2 * Xilinx ZC770 XM013 board DTS
3 *
4 * Copyright (C) 2013 Xilinx, Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8/dts-v1/;
9#include "zynq-7000.dtsi"
10
11/ {
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +053012 compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
Michal Simek1b27e662015-07-22 11:36:32 +020013 model = "Xilinx Zynq";
Masahiro Yamadad6367a22014-05-15 20:37:54 +090014
Masahiro Yamada87f645e2014-05-15 20:37:55 +090015 aliases {
Michal Simek1b27e662015-07-22 11:36:32 +020016 ethernet0 = &gem1;
17 i2c0 = &i2c1;
Masahiro Yamada87f645e2014-05-15 20:37:55 +090018 serial0 = &uart0;
Michal Simek1b27e662015-07-22 11:36:32 +020019 spi0 = &spi0;
Masahiro Yamada87f645e2014-05-15 20:37:55 +090020 };
21
Michal Simek1b27e662015-07-22 11:36:32 +020022 chosen {
23 bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk";
24 linux,stdout-path = &uart0;
25 stdout-path = &uart0;
26 };
27
Michal Simeka8d362f2015-08-12 11:25:05 +020028 memory {
Masahiro Yamadad6367a22014-05-15 20:37:54 +090029 device_type = "memory";
Michal Simek1b27e662015-07-22 11:36:32 +020030 reg = <0x0 0x40000000>;
Masahiro Yamadad6367a22014-05-15 20:37:54 +090031 };
Jagannadha Sutradharudu Tekifc0d22b2014-01-09 01:48:29 +053032};
Michal Simek1b27e662015-07-22 11:36:32 +020033
34&spi0 {
35 status = "okay";
36 num-cs = <4>;
37 is-decoded-cs = <0>;
38 eeprom: at25@0 {
39 at25,byte-len = <8192>;
40 at25,addr-mode = <2>;
41 at25,page-size = <32>;
42
43 compatible = "atmel,at25";
44 reg = <2>;
45 spi-max-frequency = <1000000>;
46 };
47};
48
49&can1 {
50 status = "okay";
51};
52
53&gem1 {
54 status = "okay";
55 phy-mode = "rgmii-id";
56 phy-handle = <&ethernet_phy>;
57
58 ethernet_phy: ethernet-phy@7 {
59 reg = <7>;
60 };
61};
62
63&i2c1 {
64 status = "okay";
65 clock-frequency = <400000>;
66
67 si570: clock-generator@55 {
68 #clock-cells = <0>;
69 compatible = "silabs,si570";
70 temperature-stability = <50>;
71 reg = <0x55>;
72 factory-fout = <156250000>;
73 clock-frequency = <148500000>;
74 };
75};
76
77&uart0 {
Simon Glass8c7323a2015-10-17 19:41:24 -060078 u-boot,dm-pre-reloc;
Michal Simek1b27e662015-07-22 11:36:32 +020079 status = "okay";
80};