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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Yusuke Godacf236022008-03-11 12:55:12 +09002/*
Nobuhiro Iwamatsud76619d2008-03-12 18:02:57 +09003 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Godacf236022008-03-11 12:55:12 +09004 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
Yusuke Godacf236022008-03-11 12:55:12 +09005 */
6
7#include <common.h>
8#include <ide.h>
Simon Glass18afe102019-11-14 12:57:47 -07009#include <init.h>
Simon Glass274e0b02020-05-10 11:39:56 -060010#include <net.h>
Yusuke Godacf236022008-03-11 12:55:12 +090011#include <asm/processor.h>
12#include <asm/io.h>
13#include <asm/pci.h>
Ben Warren26425a62008-08-31 09:49:42 -070014#include <netdev.h>
Yusuke Godacf236022008-03-11 12:55:12 +090015#include "r7780mp.h"
16
17int checkboard(void)
18{
19#if defined(CONFIG_R7780MP)
20 puts("BOARD: Renesas Solutions R7780MP\n");
21#else
22 puts("BOARD: Renesas Solutions R7780RP\n");
23#endif
24 return 0;
25}
26
27int board_init(void)
28{
29 /* SCIF Enable */
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090030 writew(0x0, PHCR);
Yusuke Godacf236022008-03-11 12:55:12 +090031
Yusuke Godacf236022008-03-11 12:55:12 +090032 return 0;
33}
34
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090035void led_set_state(unsigned short value)
Yusuke Godacf236022008-03-11 12:55:12 +090036{
37
38}
39
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090040void ide_set_reset(int idereset)
Yusuke Godacf236022008-03-11 12:55:12 +090041{
42 /* if reset = 1 IDE reset will be asserted */
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090043 if (idereset) {
44 writew(0x432, FPGA_CFCTL);
Yusuke Godacf236022008-03-11 12:55:12 +090045#if defined(CONFIG_R7780MP)
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090046 writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW);
Yusuke Godacf236022008-03-11 12:55:12 +090047#else
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090048 writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW);
Yusuke Godacf236022008-03-11 12:55:12 +090049#endif
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090050 writew(0x01, FPGA_CFCDINTCLR);
Yusuke Godacf236022008-03-11 12:55:12 +090051 }
52}
53
Yusuke Godacf236022008-03-11 12:55:12 +090054static struct pci_controller hose;
55void pci_init_board(void)
56{
Nobuhiro Iwamatsu9aa0bd72008-06-17 16:27:41 +090057 pci_sh7780_init(&hose);
Yusuke Godacf236022008-03-11 12:55:12 +090058}
Ben Warren26425a62008-08-31 09:49:42 -070059
Masahiro Yamadaf7ed78b2020-06-26 15:13:33 +090060int board_eth_init(struct bd_info *bis)
Ben Warren26425a62008-08-31 09:49:42 -070061{
Bernhard Kaindladb18ea2011-10-20 10:56:59 +000062 /* return >= 0 if a chip is found, the board's AX88796L is n2k-based */
63 return ne2k_register() + pci_eth_init(bis);
Ben Warren26425a62008-08-31 09:49:42 -070064}