Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 SAMSUNG Electronics |
| 3 | * Minkyu Kang <mk7.kang@samsung.com> |
| 4 | * Heungjun Kim <riverful.kim@samsung.com> |
| 5 | * |
| 6 | * based on drivers/serial/s3c64xx.c |
| 7 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 12 | #include <dm.h> |
| 13 | #include <errno.h> |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 14 | #include <fdtdec.h> |
Mike Frysinger | f96c042 | 2011-04-29 18:03:29 +0000 | [diff] [blame] | 15 | #include <linux/compiler.h> |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 16 | #include <asm/io.h> |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 17 | #include <asm/arch/clk.h> |
Simon Glass | 405fd14 | 2015-07-02 18:15:53 -0600 | [diff] [blame] | 18 | #include <asm/arch/uart.h> |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 19 | #include <serial.h> |
| 20 | |
John Rigby | 0d21ed0 | 2010-12-20 18:27:51 -0700 | [diff] [blame] | 21 | DECLARE_GLOBAL_DATA_PTR; |
| 22 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 23 | #define RX_FIFO_COUNT_SHIFT 0 |
| 24 | #define RX_FIFO_COUNT_MASK (0xff << RX_FIFO_COUNT_SHIFT) |
| 25 | #define RX_FIFO_FULL (1 << 8) |
| 26 | #define TX_FIFO_COUNT_SHIFT 16 |
| 27 | #define TX_FIFO_COUNT_MASK (0xff << TX_FIFO_COUNT_SHIFT) |
| 28 | #define TX_FIFO_FULL (1 << 24) |
Akshay Saraswat | 63f1090 | 2013-03-21 20:33:04 +0000 | [diff] [blame] | 29 | |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 30 | /* Information about a serial port */ |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 31 | struct s5p_serial_platdata { |
| 32 | struct s5p_uart *reg; /* address of registers in physical memory */ |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 33 | u8 port_id; /* uart port number */ |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 34 | }; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 35 | |
| 36 | /* |
Minkyu Kang | baa3688 | 2010-03-24 16:59:30 +0900 | [diff] [blame] | 37 | * The coefficient, used to calculate the baudrate on S5P UARTs is |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 38 | * calculated as |
| 39 | * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT |
| 40 | * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1, |
| 41 | * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants: |
| 42 | */ |
| 43 | static const int udivslot[] = { |
| 44 | 0, |
| 45 | 0x0080, |
| 46 | 0x0808, |
| 47 | 0x0888, |
| 48 | 0x2222, |
| 49 | 0x4924, |
| 50 | 0x4a52, |
| 51 | 0x54aa, |
| 52 | 0x5555, |
| 53 | 0xd555, |
| 54 | 0xd5d5, |
| 55 | 0xddd5, |
| 56 | 0xdddd, |
| 57 | 0xdfdd, |
| 58 | 0xdfdf, |
| 59 | 0xffdf, |
| 60 | }; |
| 61 | |
Simon Glass | 405fd14 | 2015-07-02 18:15:53 -0600 | [diff] [blame] | 62 | static void __maybe_unused s5p_serial_init(struct s5p_uart *uart) |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 63 | { |
Simon Glass | 405fd14 | 2015-07-02 18:15:53 -0600 | [diff] [blame] | 64 | /* enable FIFOs, auto clear Rx FIFO */ |
| 65 | writel(0x3, &uart->ufcon); |
| 66 | writel(0, &uart->umcon); |
| 67 | /* 8N1 */ |
| 68 | writel(0x3, &uart->ulcon); |
| 69 | /* No interrupts, no DMA, pure polling */ |
| 70 | writel(0x245, &uart->ucon); |
| 71 | } |
| 72 | |
| 73 | static void __maybe_unused s5p_serial_baud(struct s5p_uart *uart, uint uclk, |
| 74 | int baudrate) |
| 75 | { |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 76 | u32 val; |
| 77 | |
Minkyu Kang | 36f25cf | 2010-08-24 15:51:55 +0900 | [diff] [blame] | 78 | val = uclk / baudrate; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 79 | |
| 80 | writel(val / 16 - 1, &uart->ubrdiv); |
Minkyu Kang | bfa1424 | 2010-09-28 14:35:02 +0900 | [diff] [blame] | 81 | |
Minkyu Kang | afae8aa | 2011-01-24 14:43:25 +0900 | [diff] [blame] | 82 | if (s5p_uart_divslot()) |
Minkyu Kang | bfa1424 | 2010-09-28 14:35:02 +0900 | [diff] [blame] | 83 | writew(udivslot[val % 16], &uart->rest.slot); |
| 84 | else |
| 85 | writeb(val % 16, &uart->rest.value); |
Simon Glass | 405fd14 | 2015-07-02 18:15:53 -0600 | [diff] [blame] | 86 | } |
| 87 | |
Simon Glass | 8ed4bc1 | 2015-07-02 18:15:55 -0600 | [diff] [blame] | 88 | #ifndef CONFIG_SPL_BUILD |
Simon Glass | 405fd14 | 2015-07-02 18:15:53 -0600 | [diff] [blame] | 89 | int s5p_serial_setbrg(struct udevice *dev, int baudrate) |
| 90 | { |
| 91 | struct s5p_serial_platdata *plat = dev->platdata; |
| 92 | struct s5p_uart *const uart = plat->reg; |
| 93 | u32 uclk = get_uart_clk(plat->port_id); |
| 94 | |
| 95 | s5p_serial_baud(uart, uclk, baudrate); |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 96 | |
| 97 | return 0; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 98 | } |
| 99 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 100 | static int s5p_serial_probe(struct udevice *dev) |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 101 | { |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 102 | struct s5p_serial_platdata *plat = dev->platdata; |
| 103 | struct s5p_uart *const uart = plat->reg; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 104 | |
Simon Glass | 405fd14 | 2015-07-02 18:15:53 -0600 | [diff] [blame] | 105 | s5p_serial_init(uart); |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 106 | |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 107 | return 0; |
| 108 | } |
| 109 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 110 | static int serial_err_check(const struct s5p_uart *const uart, int op) |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 111 | { |
Minkyu Kang | 9455aab | 2009-11-10 20:23:50 +0900 | [diff] [blame] | 112 | unsigned int mask; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 113 | |
Minkyu Kang | 9455aab | 2009-11-10 20:23:50 +0900 | [diff] [blame] | 114 | /* |
| 115 | * UERSTAT |
| 116 | * Break Detect [3] |
| 117 | * Frame Err [2] : receive operation |
| 118 | * Parity Err [1] : receive operation |
| 119 | * Overrun Err [0] : receive operation |
| 120 | */ |
| 121 | if (op) |
| 122 | mask = 0x8; |
| 123 | else |
| 124 | mask = 0xf; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 125 | |
Minkyu Kang | 9455aab | 2009-11-10 20:23:50 +0900 | [diff] [blame] | 126 | return readl(&uart->uerstat) & mask; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 127 | } |
| 128 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 129 | static int s5p_serial_getc(struct udevice *dev) |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 130 | { |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 131 | struct s5p_serial_platdata *plat = dev->platdata; |
| 132 | struct s5p_uart *const uart = plat->reg; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 133 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 134 | if (!(readl(&uart->ufstat) & RX_FIFO_COUNT_MASK)) |
| 135 | return -EAGAIN; |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 136 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 137 | serial_err_check(uart, 0); |
Minkyu Kang | 7622981 | 2010-07-06 20:08:29 +0900 | [diff] [blame] | 138 | return (int)(readb(&uart->urxh) & 0xff); |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 139 | } |
| 140 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 141 | static int s5p_serial_putc(struct udevice *dev, const char ch) |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 142 | { |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 143 | struct s5p_serial_platdata *plat = dev->platdata; |
| 144 | struct s5p_uart *const uart = plat->reg; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 145 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 146 | if (readl(&uart->ufstat) & TX_FIFO_FULL) |
| 147 | return -EAGAIN; |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 148 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 149 | writeb(ch, &uart->utxh); |
| 150 | serial_err_check(uart, 1); |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 151 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 152 | return 0; |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 153 | } |
| 154 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 155 | static int s5p_serial_pending(struct udevice *dev, bool input) |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 156 | { |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 157 | struct s5p_serial_platdata *plat = dev->platdata; |
| 158 | struct s5p_uart *const uart = plat->reg; |
| 159 | uint32_t ufstat = readl(&uart->ufstat); |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 160 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 161 | if (input) |
| 162 | return (ufstat & RX_FIFO_COUNT_MASK) >> RX_FIFO_COUNT_SHIFT; |
| 163 | else |
| 164 | return (ufstat & TX_FIFO_COUNT_MASK) >> TX_FIFO_COUNT_SHIFT; |
Marek Vasut | 5bcdf24 | 2012-09-09 18:48:28 +0200 | [diff] [blame] | 165 | } |
Minkyu Kang | fca3084 | 2009-10-01 17:20:28 +0900 | [diff] [blame] | 166 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 167 | static int s5p_serial_ofdata_to_platdata(struct udevice *dev) |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 168 | { |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 169 | struct s5p_serial_platdata *plat = dev->platdata; |
| 170 | fdt_addr_t addr; |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 171 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 172 | addr = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); |
| 173 | if (addr == FDT_ADDR_T_NONE) |
| 174 | return -EINVAL; |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 175 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 176 | plat->reg = (struct s5p_uart *)addr; |
| 177 | plat->port_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "id", -1); |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 178 | |
| 179 | return 0; |
| 180 | } |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 181 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 182 | static const struct dm_serial_ops s5p_serial_ops = { |
| 183 | .putc = s5p_serial_putc, |
| 184 | .pending = s5p_serial_pending, |
| 185 | .getc = s5p_serial_getc, |
| 186 | .setbrg = s5p_serial_setbrg, |
| 187 | }; |
Rajeshwari Shinde | bd19fa9 | 2013-06-24 16:47:22 +0530 | [diff] [blame] | 188 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 189 | static const struct udevice_id s5p_serial_ids[] = { |
| 190 | { .compatible = "samsung,exynos4210-uart" }, |
| 191 | { } |
| 192 | }; |
Marek Vasut | 533e31e | 2012-09-12 19:39:57 +0200 | [diff] [blame] | 193 | |
Simon Glass | 767e737 | 2014-09-14 16:36:17 -0600 | [diff] [blame] | 194 | U_BOOT_DRIVER(serial_s5p) = { |
| 195 | .name = "serial_s5p", |
| 196 | .id = UCLASS_SERIAL, |
| 197 | .of_match = s5p_serial_ids, |
| 198 | .ofdata_to_platdata = s5p_serial_ofdata_to_platdata, |
| 199 | .platdata_auto_alloc_size = sizeof(struct s5p_serial_platdata), |
| 200 | .probe = s5p_serial_probe, |
| 201 | .ops = &s5p_serial_ops, |
| 202 | .flags = DM_FLAG_PRE_RELOC, |
| 203 | }; |
Simon Glass | 8ed4bc1 | 2015-07-02 18:15:55 -0600 | [diff] [blame] | 204 | #endif |
Simon Glass | 74afb29 | 2015-07-02 18:15:54 -0600 | [diff] [blame] | 205 | |
| 206 | #ifdef CONFIG_DEBUG_UART_S5P |
| 207 | |
| 208 | #include <debug_uart.h> |
| 209 | |
| 210 | void debug_uart_init(void) |
| 211 | { |
| 212 | struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; |
| 213 | |
| 214 | s5p_serial_init(uart); |
| 215 | s5p_serial_baud(uart, CONFIG_DEBUG_UART_CLOCK, CONFIG_BAUDRATE); |
| 216 | } |
| 217 | |
| 218 | static inline void _debug_uart_putc(int ch) |
| 219 | { |
| 220 | struct s5p_uart *uart = (struct s5p_uart *)CONFIG_DEBUG_UART_BASE; |
| 221 | |
| 222 | while (readl(&uart->ufstat) & TX_FIFO_FULL); |
| 223 | |
| 224 | writeb(ch, &uart->utxh); |
| 225 | } |
| 226 | |
| 227 | DEBUG_UART_FUNCS |
| 228 | |
| 229 | #endif |