blob: 930cdbd4e40bde0157079978ba3cc9e1a1986f84 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Rick Chenb46a18b2017-12-26 13:55:54 +08002/*
3 * Copyright (C) 2017 Andes Technology Corporation
4 * Rick Chen, Andes Technology Corporation <rick@andestech.com>
Rick Chenb46a18b2017-12-26 13:55:54 +08005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
10/*
11 * CPU and Board Configuration Options
12 */
Rick Chenb46a18b2017-12-26 13:55:54 +080013#define CONFIG_BOOTP_SEND_HOSTNAME
14#define CONFIG_BOOTP_SERVERIP
15
Rick Chenb46a18b2017-12-26 13:55:54 +080016/*
17 * Miscellaneous configurable options
18 */
Rick Chenb46a18b2017-12-26 13:55:54 +080019#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
20
21/*
22 * Print Buffer Size
23 */
24#define CONFIG_SYS_PBSIZE \
25 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
26
27/*
28 * max number of command args
29 */
30#define CONFIG_SYS_MAXARGS 16
31
32/*
33 * Boot Argument Buffer Size
34 */
35#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
36
37/*
38 * Size of malloc() pool
39 * 512kB is suggested, (CONFIG_ENV_SIZE + 128 * 1024) was not enough
40 */
41#define CONFIG_SYS_MALLOC_LEN (512 << 10)
42
Rick Chen40a6fe72018-03-29 10:08:33 +080043/* DT blob (fdt) address */
44#define CONFIG_SYS_FDT_BASE 0x000f0000
45
Rick Chenb46a18b2017-12-26 13:55:54 +080046/*
47 * Physical Memory Map
48 */
49#define CONFIG_NR_DRAM_BANKS 2
50#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */
51#define PHYS_SDRAM_1 \
52 (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */
53#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */
54#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */
55#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_0
56
57/*
58 * Serial console configuration
59 */
Rick Chenb46a18b2017-12-26 13:55:54 +080060#define CONFIG_SYS_NS16550_SERIAL
61#ifndef CONFIG_DM_SERIAL
62#define CONFIG_SYS_NS16550_REG_SIZE -4
63#endif
64#define CONFIG_SYS_NS16550_CLK 19660800
65
Rick Chenb46a18b2017-12-26 13:55:54 +080066/* Init Stack Pointer */
67#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000000 - \
68 GENERATED_GBL_DATA_SIZE)
69
70/*
71 * Load address and memory test area should agree with
72 * arch/riscv/config.mk. Be careful not to overwrite U-Boot itself.
73 */
74#define CONFIG_SYS_LOAD_ADDR 0x100000 /* SDRAM */
75
76/*
77 * memtest works on 512 MB in DRAM
78 */
79#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_0
80#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE)
81
82/* environments */
83#define CONFIG_ENV_SPI_BUS 0
84#define CONFIG_ENV_SPI_CS 0
85#define CONFIG_ENV_SPI_MAX_HZ 50000000
86#define CONFIG_ENV_SPI_MODE 0
87#define CONFIG_ENV_SECT_SIZE 0x1000
88#define CONFIG_ENV_OVERWRITE
89
90/* SPI FLASH */
91#define CONFIG_SF_DEFAULT_BUS 0
92#define CONFIG_SF_DEFAULT_CS 0
93#define CONFIG_SF_DEFAULT_SPEED 1000000
94#define CONFIG_SF_DEFAULT_MODE 0
95
96/*
97 * For booting Linux, the board info and command line data
98 * have to be in the first 16 MB of memory, since this is
99 * the maximum mapped by the Linux kernel during initialization.
100 */
101
102/* Initial Memory map for Linux*/
103#define CONFIG_SYS_BOOTMAPSZ (64 << 20)
104/* Increase max gunzip size */
105#define CONFIG_SYS_BOOTM_LEN (64 << 20)
106
107#endif /* __CONFIG_H */