| Yanhong Wang | aaa1852 | 2023-03-16 10:53:32 +0800 | [diff] [blame] | 1 | CONFIG_RISCV=y |
| 2 | CONFIG_SYS_MALLOC_LEN=0x800000 |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x10000 |
| 4 | CONFIG_SPL_GPIO=y |
| 5 | CONFIG_NR_DRAM_BANKS=1 |
| 6 | CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y |
| 7 | CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000000 |
| Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 8 | CONFIG_SF_DEFAULT_SPEED=100000000 |
| Yanhong Wang | aaa1852 | 2023-03-16 10:53:32 +0800 | [diff] [blame] | 9 | CONFIG_SPL_DM_SPI=y |
| 10 | CONFIG_DEFAULT_DEVICE_TREE="jh7110-starfive-visionfive-2-v1.3b" |
| 11 | CONFIG_SPL_TEXT_BASE=0x8000000 |
| 12 | CONFIG_SYS_PROMPT="StarFive #" |
| Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 13 | CONFIG_OF_LIBFDT_OVERLAY=y |
| Yanhong Wang | aaa1852 | 2023-03-16 10:53:32 +0800 | [diff] [blame] | 14 | CONFIG_DM_RESET=y |
| 15 | CONFIG_SPL_MMC=y |
| 16 | CONFIG_SPL_STACK=0x8180000 |
| 17 | CONFIG_SPL=y |
| 18 | CONFIG_SPL_SPI_FLASH_SUPPORT=y |
| 19 | CONFIG_SPL_SPI=y |
| 20 | CONFIG_SYS_LOAD_ADDR=0x82000000 |
| 21 | CONFIG_TARGET_STARFIVE_VISIONFIVE2=y |
| 22 | CONFIG_SPL_OPENSBI_LOAD_ADDR=0x40000000 |
| 23 | CONFIG_ARCH_RV64I=y |
| 24 | CONFIG_CMODEL_MEDANY=y |
| 25 | CONFIG_RISCV_SMODE=y |
| Yanhong Wang | aaa1852 | 2023-03-16 10:53:32 +0800 | [diff] [blame] | 26 | CONFIG_FIT=y |
| Tom Rini | a77d6f8 | 2023-05-01 11:50:26 -0400 | [diff] [blame] | 27 | CONFIG_DISTRO_DEFAULTS=y |
| Yanhong Wang | aaa1852 | 2023-03-16 10:53:32 +0800 | [diff] [blame] | 28 | CONFIG_QSPI_BOOT=y |
| 29 | CONFIG_SD_BOOT=y |
| 30 | CONFIG_USE_BOOTARGS=y |
| 31 | CONFIG_BOOTARGS="console=ttyS0,115200 debug rootwait earlycon=sbi" |
| 32 | CONFIG_USE_PREBOOT=y |
| 33 | CONFIG_PREBOOT="setenv fdt_addr ${fdtcontroladdr};fdt addr ${fdtcontroladdr};" |
| 34 | CONFIG_DEFAULT_FDT_FILE="starfive/jh7110-starfive-visionfive-2-v1.3b.dtb" |
| 35 | CONFIG_DISPLAY_CPUINFO=y |
| 36 | CONFIG_DISPLAY_BOARDINFO=y |
| 37 | CONFIG_SPL_MAX_SIZE=0x40000 |
| 38 | CONFIG_SPL_PAD_TO=0x0 |
| 39 | CONFIG_SPL_BSS_START_ADDR=0x8040000 |
| 40 | CONFIG_SPL_BSS_MAX_SIZE=0x10000 |
| 41 | # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set |
| 42 | CONFIG_SYS_SPL_MALLOC=y |
| 43 | CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y |
| 44 | CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80000000 |
| 45 | CONFIG_SYS_SPL_MALLOC_SIZE=0x400000 |
| 46 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y |
| 47 | CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x2 |
| 48 | CONFIG_SPL_DM_SPI_FLASH=y |
| 49 | CONFIG_SPL_DM_RESET=y |
| 50 | CONFIG_SPL_SPI_LOAD=y |
| 51 | CONFIG_SYS_CBSIZE=256 |
| 52 | CONFIG_SYS_PBSIZE=276 |
| 53 | CONFIG_SYS_BOOTM_LEN=0x4000000 |
| 54 | CONFIG_CMD_MEMINFO=y |
| 55 | CONFIG_CMD_TFTPPUT=y |
| 56 | CONFIG_SYS_RELOC_GD_ENV_ADDR=y |
| 57 | CONFIG_SPL_CLK_COMPOSITE_CCF=y |
| 58 | CONFIG_CLK_COMPOSITE_CCF=y |
| 59 | CONFIG_SPL_CLK_JH7110=y |
| 60 | # CONFIG_I2C is not set |
| 61 | CONFIG_MMC_HS400_SUPPORT=y |
| 62 | CONFIG_SPL_MMC_HS400_SUPPORT=y |
| 63 | CONFIG_MMC_DW=y |
| 64 | CONFIG_MMC_DW_SNPS=y |
| Yanhong Wang | aaa1852 | 2023-03-16 10:53:32 +0800 | [diff] [blame] | 65 | CONFIG_SPI_FLASH_EON=y |
| 66 | CONFIG_SPI_FLASH_GIGADEVICE=y |
| 67 | CONFIG_SPI_FLASH_ISSI=y |
| 68 | CONFIG_SPI_FLASH_MACRONIX=y |
| 69 | CONFIG_PINCTRL=y |
| 70 | CONFIG_PINCONF=y |
| 71 | CONFIG_SPL_PINCTRL=y |
| 72 | CONFIG_SPL_PINCONF=y |
| 73 | CONFIG_SPL_PINCTRL_STARFIVE=y |
| 74 | CONFIG_SPL_PINCTRL_STARFIVE_JH7110=y |
| 75 | CONFIG_PINCTRL_STARFIVE=y |
| 76 | # CONFIG_RAM_SIFIVE is not set |
| 77 | CONFIG_SYS_NS16550=y |
| 78 | CONFIG_CADENCE_QSPI=y |
| 79 | CONFIG_TIMER_EARLY=y |