blob: a34e0df2ab8646206b26c19f529629f9dfedf226 [file] [log] [blame]
Roger Quadrosbace4672024-05-13 15:13:54 +03001// SPDX-License-Identifier: GPL-2.0-only OR MIT
Robert Nelson0c24aad2023-08-25 13:03:03 -05002/*
3 * https://beagleplay.org/
4 *
Roger Quadrosbace4672024-05-13 15:13:54 +03005 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
6 * Copyright (C) 2022-2024 Robert Nelson, BeagleBoard.org Foundation
Robert Nelson0c24aad2023-08-25 13:03:03 -05007 */
8
9/dts-v1/;
10
11#include <dt-bindings/leds/common.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14#include "k3-am625.dtsi"
15
16/ {
Nishanth Menon96934b02023-09-11 09:02:56 -050017 compatible = "beagle,am625-beagleplay", "ti,am625";
Robert Nelson0c24aad2023-08-25 13:03:03 -050018 model = "BeagleBoard.org BeaglePlay";
19
20 aliases {
21 ethernet0 = &cpsw_port1;
22 ethernet1 = &cpsw_port2;
23 gpio0 = &main_gpio0;
24 gpio1 = &main_gpio1;
25 gpio2 = &mcu_gpio0;
26 i2c0 = &main_i2c0;
27 i2c1 = &main_i2c1;
28 i2c2 = &main_i2c2;
29 i2c3 = &main_i2c3;
30 i2c4 = &wkup_i2c0;
31 i2c5 = &mcu_i2c0;
Robert Nelson0c24aad2023-08-25 13:03:03 -050032 mmc0 = &sdhci0;
33 mmc1 = &sdhci1;
34 mmc2 = &sdhci2;
35 rtc0 = &rtc;
36 serial0 = &main_uart5;
37 serial1 = &main_uart6;
38 serial2 = &main_uart0;
39 usb0 = &usb0;
40 usb1 = &usb1;
41 };
42
43 chosen {
44 stdout-path = "serial2:115200n8";
45 };
46
47 memory@80000000 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -060048 bootph-pre-ram;
Robert Nelson0c24aad2023-08-25 13:03:03 -050049 device_type = "memory";
50 /* 2G RAM */
51 reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
52 };
53
54 reserved-memory {
55 #address-cells = <2>;
56 #size-cells = <2>;
57 ranges;
58
59 ramoops: ramoops@9ca00000 {
60 compatible = "ramoops";
Nishanth Menonc72e8e72023-11-14 21:28:54 -060061 reg = <0x00 0x9ca00000 0x00 0x00100000>;
Robert Nelson0c24aad2023-08-25 13:03:03 -050062 record-size = <0x8000>;
63 console-size = <0x8000>;
64 ftrace-size = <0x00>;
65 pmsg-size = <0x8000>;
66 };
67
68 secure_tfa_ddr: tfa@9e780000 {
69 reg = <0x00 0x9e780000 0x00 0x80000>;
70 no-map;
71 };
72
73 secure_ddr: optee@9e800000 {
74 reg = <0x00 0x9e800000 0x00 0x01800000>;
75 no-map;
76 };
77
78 wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
79 compatible = "shared-dma-pool";
80 reg = <0x00 0x9db00000 0x00 0xc00000>;
81 no-map;
82 };
83 };
84
85 vsys_5v0: regulator-1 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -060086 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050087 compatible = "regulator-fixed";
88 regulator-name = "vsys_5v0";
89 regulator-min-microvolt = <5000000>;
90 regulator-max-microvolt = <5000000>;
91 regulator-always-on;
92 regulator-boot-on;
93 };
94
95 vdd_3v3: regulator-2 {
96 /* output of TLV62595DMQR-U12 */
Nishanth Menonc72e8e72023-11-14 21:28:54 -060097 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -050098 compatible = "regulator-fixed";
99 regulator-name = "vdd_3v3";
100 regulator-min-microvolt = <3300000>;
101 regulator-max-microvolt = <3300000>;
102 vin-supply = <&vsys_5v0>;
103 regulator-always-on;
104 regulator-boot-on;
105 };
106
107 wlan_en: regulator-3 {
108 /* OUTPUT of SN74AVC2T244DQMR */
109 compatible = "regulator-fixed";
110 regulator-name = "wlan_en";
111 regulator-min-microvolt = <1800000>;
112 regulator-max-microvolt = <1800000>;
113 enable-active-high;
114 regulator-always-on;
115 vin-supply = <&vdd_3v3>;
116 gpio = <&main_gpio0 38 GPIO_ACTIVE_HIGH>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&wifi_en_pins_default>;
119 };
120
121 vdd_3v3_sd: regulator-4 {
122 /* output of TPS22918DBVR-U21 */
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600123 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500124 pinctrl-names = "default";
125 pinctrl-0 = <&vdd_3v3_sd_pins_default>;
126
127 compatible = "regulator-fixed";
128 regulator-name = "vdd_3v3_sd";
129 regulator-min-microvolt = <3300000>;
130 regulator-max-microvolt = <3300000>;
131 enable-active-high;
132 regulator-always-on;
133 vin-supply = <&vdd_3v3>;
134 gpio = <&main_gpio1 19 GPIO_ACTIVE_HIGH>;
135 };
136
137 vdd_sd_dv: regulator-5 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600138 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500139 compatible = "regulator-gpio";
140 regulator-name = "sd_hs200_switch";
141 pinctrl-names = "default";
142 pinctrl-0 = <&vdd_sd_dv_pins_default>;
143 regulator-min-microvolt = <1800000>;
144 regulator-max-microvolt = <3300000>;
145 regulator-boot-on;
146 vin-supply = <&ldo1_reg>;
147 gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
148 states = <1800000 0x0>,
149 <3300000 0x1>;
150 };
151
152 leds {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600153 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500154 compatible = "gpio-leds";
155
156 led-0 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600157 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500158 gpios = <&main_gpio0 3 GPIO_ACTIVE_HIGH>;
159 linux,default-trigger = "heartbeat";
160 function = LED_FUNCTION_HEARTBEAT;
161 default-state = "off";
162 };
163
164 led-1 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600165 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500166 gpios = <&main_gpio0 4 GPIO_ACTIVE_HIGH>;
167 linux,default-trigger = "disk-activity";
168 function = LED_FUNCTION_DISK_ACTIVITY;
169 default-state = "keep";
170 };
171
172 led-2 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600173 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500174 gpios = <&main_gpio0 5 GPIO_ACTIVE_HIGH>;
175 function = LED_FUNCTION_CPU;
176 };
177
178 led-3 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600179 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500180 gpios = <&main_gpio0 6 GPIO_ACTIVE_HIGH>;
181 function = LED_FUNCTION_LAN;
182 };
183
184 led-4 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600185 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500186 gpios = <&main_gpio0 9 GPIO_ACTIVE_HIGH>;
187 function = LED_FUNCTION_WLAN;
188 };
189 };
190
191 gpio_keys: gpio-keys {
192 compatible = "gpio-keys";
193 autorepeat;
194 pinctrl-names = "default";
195 pinctrl-0 = <&usr_button_pins_default>;
196
197 usr: button-usr {
198 label = "User Key";
199 linux,code = <BTN_0>;
200 gpios = <&main_gpio0 18 GPIO_ACTIVE_LOW>;
201 };
202
203 };
204
Nishanth Menon96934b02023-09-11 09:02:56 -0500205 hdmi0: connector-hdmi {
206 compatible = "hdmi-connector";
207 label = "hdmi";
208 type = "a";
209 port {
210 hdmi_connector_in: endpoint {
211 remote-endpoint = <&it66121_out>;
212 };
213 };
214 };
215
216 sound {
217 compatible = "simple-audio-card";
218 simple-audio-card,name = "it66121 HDMI";
219 simple-audio-card,format = "i2s";
220 simple-audio-card,bitclock-master = <&hdmi_dailink_master>;
221 simple-audio-card,frame-master = <&hdmi_dailink_master>;
222
223 hdmi_dailink_master: simple-audio-card,cpu {
224 sound-dai = <&mcasp1>;
225 system-clock-direction-out;
226 };
227
228 simple-audio-card,codec {
229 sound-dai = <&it66121>;
230 };
231 };
232
Robert Nelson0c24aad2023-08-25 13:03:03 -0500233};
234
235&main_pmx0 {
236 gpio0_pins_default: gpio0-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600237 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500238 pinctrl-single,pins = <
239 AM62X_IOPAD(0x0004, PIN_INPUT, 7) /* (G25) OSPI0_LBCLKO.GPIO0_1 */
240 AM62X_IOPAD(0x0008, PIN_INPUT, 7) /* (J24) OSPI0_DQS.GPIO0_2 */
241 AM62X_IOPAD(0x000c, PIN_INPUT, 7) /* (E25) OSPI0_D0.GPIO0_3 */
242 AM62X_IOPAD(0x0010, PIN_INPUT, 7) /* (G24) OSPI0_D1.GPIO0_4 */
243 AM62X_IOPAD(0x0014, PIN_INPUT, 7) /* (F25) OSPI0_D2.GPIO0_5 */
244 AM62X_IOPAD(0x0018, PIN_INPUT, 7) /* (F24) OSPI0_D3.GPIO0_6 */
245 AM62X_IOPAD(0x0024, PIN_INPUT, 7) /* (H25) OSPI0_D6.GPIO0_9 */
246 AM62X_IOPAD(0x0028, PIN_INPUT, 7) /* (J22) OSPI0_D7.GPIO0_10 */
247 AM62X_IOPAD(0x002c, PIN_INPUT, 7) /* (F23) OSPI0_CSn0.GPIO0_11 */
248 AM62X_IOPAD(0x0030, PIN_INPUT, 7) /* (G21) OSPI0_CSn1.GPIO0_12 */
249 AM62X_IOPAD(0x0034, PIN_INPUT, 7) /* (H21) OSPI0_CSn2.GPIO0_13 */
250 AM62X_IOPAD(0x0038, PIN_INPUT, 7) /* (E24) OSPI0_CSn3.GPIO0_14 */
251 AM62X_IOPAD(0x00a4, PIN_INPUT, 7) /* (M22) GPMC0_DIR.GPIO0_40 */
252 AM62X_IOPAD(0x00ac, PIN_INPUT, 7) /* (L21) GPMC0_CSn1.GPIO0_42 */
253 >;
254 };
255
256 vdd_sd_dv_pins_default: vdd-sd-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600257 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500258 pinctrl-single,pins = <
259 AM62X_IOPAD(0x0244, PIN_OUTPUT, 7) /* (C17) MMC1_SDWP.GPIO1_49 */
260 >;
261 };
262
263 usr_button_pins_default: usr-button-default-pins {
264 pinctrl-single,pins = <
265 AM62X_IOPAD(0x0048, PIN_INPUT, 7) /* (N25) GPMC0_AD3.GPIO0_18 */
266 >;
267 };
268
269 grove_pins_default: grove-default-pins {
270 pinctrl-single,pins = <
271 AM62X_IOPAD(0x01e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */
272 AM62X_IOPAD(0x01ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */
273 >;
274 };
275
276 local_i2c_pins_default: local-i2c-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600277 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500278 pinctrl-single,pins = <
279 AM62X_IOPAD(0x01e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */
280 AM62X_IOPAD(0x01e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */
281 >;
282 };
283
284 i2c2_1v8_pins_default: i2c2-default-pins {
285 pinctrl-single,pins = <
286 AM62X_IOPAD(0x00b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */
287 AM62X_IOPAD(0x00b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */
288 >;
289 };
290
291 mdio0_pins_default: mdio0-default-pins {
292 pinctrl-single,pins = <
Roger Quadrosbace4672024-05-13 15:13:54 +0300293 AM62X_IOPAD(0x0160, PIN_OUTPUT, 0) /* (AD24) MDIO0_MDC */
294 AM62X_IOPAD(0x015c, PIN_INPUT, 0) /* (AB22) MDIO0_MDIO */
Robert Nelson0c24aad2023-08-25 13:03:03 -0500295 >;
296 };
297
298 rgmii1_pins_default: rgmii1-default-pins {
299 pinctrl-single,pins = <
300 AM62X_IOPAD(0x014c, PIN_INPUT, 0) /* (AB17) RGMII1_RD0 */
301 AM62X_IOPAD(0x0150, PIN_INPUT, 0) /* (AC17) RGMII1_RD1 */
302 AM62X_IOPAD(0x0154, PIN_INPUT, 0) /* (AB16) RGMII1_RD2 */
303 AM62X_IOPAD(0x0158, PIN_INPUT, 0) /* (AA15) RGMII1_RD3 */
304 AM62X_IOPAD(0x0148, PIN_INPUT, 0) /* (AD17) RGMII1_RXC */
305 AM62X_IOPAD(0x0144, PIN_INPUT, 0) /* (AE17) RGMII1_RX_CTL */
306 AM62X_IOPAD(0x0134, PIN_OUTPUT, 0) /* (AE20) RGMII1_TD0 */
307 AM62X_IOPAD(0x0138, PIN_OUTPUT, 0) /* (AD20) RGMII1_TD1 */
308 AM62X_IOPAD(0x013c, PIN_OUTPUT, 0) /* (AE18) RGMII1_TD2 */
309 AM62X_IOPAD(0x0140, PIN_OUTPUT, 0) /* (AD18) RGMII1_TD3 */
310 AM62X_IOPAD(0x0130, PIN_OUTPUT, 0) /* (AE19) RGMII1_TXC */
311 AM62X_IOPAD(0x012c, PIN_OUTPUT, 0) /* (AD19) RGMII1_TX_CTL */
312 >;
313 };
314
315 emmc_pins_default: emmc-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600316 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500317 pinctrl-single,pins = <
318 AM62X_IOPAD(0x0220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */
319 AM62X_IOPAD(0x0218, PIN_INPUT, 0) /* (AB1) MMC0_CLK */
320 AM62X_IOPAD(0x0214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */
321 AM62X_IOPAD(0x0210, PIN_INPUT, 0) /* (AA1) MMC0_DAT1 */
322 AM62X_IOPAD(0x020c, PIN_INPUT, 0) /* (AA3) MMC0_DAT2 */
323 AM62X_IOPAD(0x0208, PIN_INPUT, 0) /* (Y4) MMC0_DAT3 */
324 AM62X_IOPAD(0x0204, PIN_INPUT, 0) /* (AB2) MMC0_DAT4 */
325 AM62X_IOPAD(0x0200, PIN_INPUT, 0) /* (AC1) MMC0_DAT5 */
326 AM62X_IOPAD(0x01fc, PIN_INPUT, 0) /* (AD2) MMC0_DAT6 */
327 AM62X_IOPAD(0x01f8, PIN_INPUT, 0) /* (AC2) MMC0_DAT7 */
328 >;
329 };
330
331 vdd_3v3_sd_pins_default: vdd-3v3-sd-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600332 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500333 pinctrl-single,pins = <
334 AM62X_IOPAD(0x01c4, PIN_INPUT, 7) /* (B14) SPI0_D1_GPIO1_19 */
335 >;
336 };
337
338 sd_pins_default: sd-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600339 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500340 pinctrl-single,pins = <
341 AM62X_IOPAD(0x023c, PIN_INPUT, 0) /* (A21) MMC1_CMD */
342 AM62X_IOPAD(0x0234, PIN_INPUT, 0) /* (B22) MMC1_CLK */
343 AM62X_IOPAD(0x0230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */
344 AM62X_IOPAD(0x022c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */
345 AM62X_IOPAD(0x0228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */
346 AM62X_IOPAD(0x0224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */
347 AM62X_IOPAD(0x0240, PIN_INPUT, 7) /* (D17) MMC1_SDCD.GPIO1_48 */
348 >;
349 };
350
351 wifi_pins_default: wifi-default-pins {
352 pinctrl-single,pins = <
353 AM62X_IOPAD(0x0120, PIN_INPUT, 0) /* (C24) MMC2_CMD */
354 AM62X_IOPAD(0x0118, PIN_INPUT, 0) /* (D25) MMC2_CLK */
355 AM62X_IOPAD(0x0114, PIN_INPUT, 0) /* (B24) MMC2_DAT0 */
356 AM62X_IOPAD(0x0110, PIN_INPUT, 0) /* (C25) MMC2_DAT1 */
357 AM62X_IOPAD(0x010c, PIN_INPUT, 0) /* (E23) MMC2_DAT2 */
358 AM62X_IOPAD(0x0108, PIN_INPUT, 0) /* (D24) MMC2_DAT3 */
359 AM62X_IOPAD(0x0124, PIN_INPUT, 0) /* (A23) MMC2_SDCD */
360 AM62X_IOPAD(0x11c, PIN_INPUT, 0) /* (#N/A) MMC2_CLKB */
361 >;
362 };
363
364 wifi_en_pins_default: wifi-en-default-pins {
365 pinctrl-single,pins = <
366 AM62X_IOPAD(0x009c, PIN_OUTPUT, 7) /* (V25) GPMC0_WAIT1.GPIO0_38 */
367 >;
368 };
369
370 wifi_wlirq_pins_default: wifi-wlirq-default-pins {
371 pinctrl-single,pins = <
372 AM62X_IOPAD(0x00a8, PIN_INPUT, 7) /* (M21) GPMC0_CSn0.GPIO0_41 */
373 >;
374 };
375
376 spe_pins_default: spe-default-pins {
377 pinctrl-single,pins = <
378 AM62X_IOPAD(0x0168, PIN_INPUT, 1) /* (AE21) RGMII2_TXC.RMII2_CRS_DV */
379 AM62X_IOPAD(0x0180, PIN_INPUT, 1) /* (AD23) RGMII2_RXC.RMII2_REF_CLK */
380 AM62X_IOPAD(0x0184, PIN_INPUT, 1) /* (AE23) RGMII2_RD0.RMII2_RXD0 */
381 AM62X_IOPAD(0x0188, PIN_INPUT, 1) /* (AB20) RGMII2_RD1.RMII2_RXD1 */
382 AM62X_IOPAD(0x017c, PIN_INPUT, 1) /* (AD22) RGMII2_RX_CTL.RMII2_RX_ER */
383 AM62X_IOPAD(0x016c, PIN_INPUT, 1) /* (Y18) RGMII2_TD0.RMII2_TXD0 */
384 AM62X_IOPAD(0x0170, PIN_INPUT, 1) /* (AA18) RGMII2_TD1.RMII2_TXD1 */
385 AM62X_IOPAD(0x0164, PIN_INPUT, 1) /* (AA19) RGMII2_TX_CTL.RMII2_TX_EN */
386 AM62X_IOPAD(0x018c, PIN_OUTPUT, 7) /* (AC21) RGMII2_RD2.GPIO1_5 */
387 AM62X_IOPAD(0x0190, PIN_INPUT, 7) /* (AE22) RGMII2_RD3.GPIO1_6 */
388 AM62X_IOPAD(0x01f0, PIN_OUTPUT, 5) /* (A18) EXT_REFCLK1.CLKOUT0 */
389 >;
390 };
391
392 mikrobus_i2c_pins_default: mikrobus-i2c-default-pins {
393 pinctrl-single,pins = <
394 AM62X_IOPAD(0x01d0, PIN_INPUT_PULLUP, 2) /* (A15) UART0_CTSn.I2C3_SCL */
395 AM62X_IOPAD(0x01d4, PIN_INPUT_PULLUP, 2) /* (B15) UART0_RTSn.I2C3_SDA */
396 >;
397 };
398
399 mikrobus_uart_pins_default: mikrobus-uart-default-pins {
400 pinctrl-single,pins = <
401 AM62X_IOPAD(0x01d8, PIN_INPUT, 1) /* (C15) MCAN0_TX.UART5_RXD */
402 AM62X_IOPAD(0x01dc, PIN_OUTPUT, 1) /* (E15) MCAN0_RX.UART5_TXD */
403 >;
404 };
405
406 mikrobus_spi_pins_default: mikrobus-spi-default-pins {
407 pinctrl-single,pins = <
408 AM62X_IOPAD(0x01b0, PIN_INPUT, 1) /* (A20) MCASP0_ACLKR.SPI2_CLK */
409 AM62X_IOPAD(0x01ac, PIN_INPUT, 1) /* (E19) MCASP0_AFSR.SPI2_CS0 */
410 AM62X_IOPAD(0x0194, PIN_INPUT, 1) /* (B19) MCASP0_AXR3.SPI2_D0 */
411 AM62X_IOPAD(0x0198, PIN_INPUT, 1) /* (A19) MCASP0_AXR2.SPI2_D1 */
412 >;
413 };
414
415 mikrobus_gpio_pins_default: mikrobus-gpio-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600416 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500417 pinctrl-single,pins = <
418 AM62X_IOPAD(0x019c, PIN_INPUT, 7) /* (B18) MCASP0_AXR1.GPIO1_9 */
419 AM62X_IOPAD(0x01a0, PIN_INPUT, 7) /* (E18) MCASP0_AXR0.GPIO1_10 */
420 AM62X_IOPAD(0x01a8, PIN_INPUT, 7) /* (D20) MCASP0_AFSX.GPIO1_12 */
421 >;
422 };
423
Roger Quadrosbace4672024-05-13 15:13:54 +0300424 main_uart0_pins_default: main-uart0-default-pins {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600425 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500426 pinctrl-single,pins = <
427 AM62X_IOPAD(0x01c8, PIN_INPUT, 0) /* (D14) UART0_RXD */
428 AM62X_IOPAD(0x01cc, PIN_OUTPUT, 0) /* (E14) UART0_TXD */
429 >;
430 };
431
432 wifi_debug_uart_pins_default: wifi-debug-uart-default-pins {
433 pinctrl-single,pins = <
434 AM62X_IOPAD(0x001c, PIN_INPUT, 3) /* (J23) OSPI0_D4.UART6_RXD */
435 AM62X_IOPAD(0x0020, PIN_OUTPUT, 3) /* (J25) OSPI0_D5.UART6_TXD */
436 >;
437 };
438
439 usb1_pins_default: usb1-default-pins {
440 pinctrl-single,pins = <
441 AM62X_IOPAD(0x0258, PIN_INPUT, 0) /* (F18) USB1_DRVVBUS */
442 >;
443 };
444
445 pmic_irq_pins_default: pmic-irq-default-pins {
446 pinctrl-single,pins = <
447 AM62X_IOPAD(0x01f4, PIN_INPUT_PULLUP, 0) /* (D16) EXTINTn */
448 >;
449 };
Nishanth Menon96934b02023-09-11 09:02:56 -0500450
451 hdmi_gpio_pins_default: hdmi-gpio-default-pins {
452 pinctrl-single,pins = <
453 AM62X_IOPAD(0x0094, PIN_INPUT_PULLUP | PIN_DEBOUNCE_CONF6, 7) /* (N20) GPMC0_BE1n.GPIO0_36 */
454 AM62X_IOPAD(0x0054, PIN_OUTPUT_PULLUP, 7) /* (P21) GPMC0_AD6.GPIO0_21 */
455 >;
456 };
457
458 mcasp_hdmi_pins_default: mcasp-hdmi-default-pins {
459 pinctrl-single,pins = <
460 AM62X_IOPAD(0x0090, PIN_INPUT, 2) /* (M24) GPMC0_BE0n_CLE.MCASP1_ACLKX */
461 AM62X_IOPAD(0x0098, PIN_INPUT, 2) /* (U23) GPMC0_WAIT0.MCASP1_AFSX */
462 AM62X_IOPAD(0x008c, PIN_OUTPUT, 2) /* (L25) GPMC0_WEn.MCASP1_AXR0 */
463 AM62X_IOPAD(0x0088, PIN_INPUT, 2) /* (L24) GPMC0_OEn_REn.MCASP1_AXR1 */
464 AM62X_IOPAD(0x0084, PIN_INPUT, 2) /* (L23) GPMC0_ADVn_ALE.MCASP1_AXR2 */
465 AM62X_IOPAD(0x007c, PIN_INPUT, 2) /* (P25) GPMC0_CLK.MCASP1_AXR3 */
466 >;
467 };
468
469 dss0_pins_default: dss0-default-pins {
470 pinctrl-single,pins = <
471 AM62X_IOPAD(0x0100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
472 AM62X_IOPAD(0x00f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
473 AM62X_IOPAD(0x0104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
474 AM62X_IOPAD(0x00fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
475 AM62X_IOPAD(0x00b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
476 AM62X_IOPAD(0x00bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
477 AM62X_IOPAD(0x00c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
478 AM62X_IOPAD(0x00c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
479 AM62X_IOPAD(0x00c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
480 AM62X_IOPAD(0x00cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
481 AM62X_IOPAD(0x00d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
482 AM62X_IOPAD(0x00d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
483 AM62X_IOPAD(0x00d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
484 AM62X_IOPAD(0x00dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
485 AM62X_IOPAD(0x00e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
486 AM62X_IOPAD(0x00e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
487 AM62X_IOPAD(0x00e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
488 AM62X_IOPAD(0x00ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
489 AM62X_IOPAD(0x00f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
490 AM62X_IOPAD(0x00f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
491 AM62X_IOPAD(0x005c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
492 AM62X_IOPAD(0x0060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
493 AM62X_IOPAD(0x0064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
494 AM62X_IOPAD(0x0068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
495 AM62X_IOPAD(0x006c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
496 AM62X_IOPAD(0x0070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
497 AM62X_IOPAD(0x0074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
498 AM62X_IOPAD(0x0078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
499 >;
500 };
Robert Nelson0c24aad2023-08-25 13:03:03 -0500501};
502
503&mcu_pmx0 {
504 i2c_qwiic_pins_default: i2c-qwiic-default-pins {
505 pinctrl-single,pins = <
506 AM62X_MCU_IOPAD(0x0044, PIN_INPUT, 0) /* (A8) MCU_I2C0_SCL */
507 AM62X_MCU_IOPAD(0x0048, PIN_INPUT, 0) /* (D10) MCU_I2C0_SDA */
508 >;
509 };
510
Nishanth Menon96934b02023-09-11 09:02:56 -0500511 gbe_pmx_obsclk: gbe-pmx-obsclk-default-pins {
Robert Nelson0c24aad2023-08-25 13:03:03 -0500512 pinctrl-single,pins = <
513 AM62X_MCU_IOPAD(0x0004, PIN_OUTPUT, 1) /* (B8) MCU_SPI0_CS1.MCU_OBSCLK0 */
514 >;
515 };
516
517 i2c_csi_pins_default: i2c-csi-default-pins {
518 pinctrl-single,pins = <
519 AM62X_MCU_IOPAD(0x004c, PIN_INPUT_PULLUP, 0) /* (B9) WKUP_I2C0_SCL */
520 AM62X_MCU_IOPAD(0x0050, PIN_INPUT_PULLUP, 0) /* (A9) WKUP_I2C0_SDA */
521 >;
522 };
523
524 wifi_32k_clk: mcu-clk-out-default-pins {
525 pinctrl-single,pins = <
526 AM62X_MCU_IOPAD(0x0084, PIN_OUTPUT, 0) /* (A12) WKUP_CLKOUT0 */
527 >;
528 };
529};
530
531&a53_opp_table {
532 /* Requires VDD_CORE to be at 0.85V */
533 opp-1400000000 {
534 opp-hz = /bits/ 64 <1400000000>;
535 opp-supported-hw = <0x01 0x0004>;
536 };
537};
538
539&wkup_i2c0 {
540 pinctrl-names = "default";
541 pinctrl-0 = <&i2c_csi_pins_default>;
542 clock-frequency = <400000>;
543 /* Enable with overlay for camera sensor */
544};
545
546&mcu_i2c0 {
547 pinctrl-names = "default";
548 pinctrl-0 = <&i2c_qwiic_pins_default>;
549 clock-frequency = <100000>;
550 status = "okay";
551};
552
553&usbss0 {
Roger Quadrosbace4672024-05-13 15:13:54 +0300554 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500555 ti,vbus-divider;
556 status = "okay";
557};
558
559&usb0 {
Roger Quadrosbace4672024-05-13 15:13:54 +0300560 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500561 dr_mode = "peripheral";
562};
563
564&usbss1 {
565 ti,vbus-divider;
566 status = "okay";
567};
568
569&usb1 {
570 dr_mode = "host";
571 pinctrl-names = "default";
572 pinctrl-0 = <&usb1_pins_default>;
573};
574
575&cpsw3g {
576 pinctrl-names = "default";
577 pinctrl-0 = <&rgmii1_pins_default>, <&spe_pins_default>,
578 <&gbe_pmx_obsclk>;
579 assigned-clocks = <&k3_clks 157 70>, <&k3_clks 157 20>;
580 assigned-clock-parents = <&k3_clks 157 72>, <&k3_clks 157 22>;
581};
582
583&cpsw_port1 {
584 phy-mode = "rgmii-rxid";
585 phy-handle = <&cpsw3g_phy0>;
586};
587
588&cpsw_port2 {
589 phy-mode = "rmii";
590 phy-handle = <&cpsw3g_phy1>;
591};
592
593&cpsw3g_mdio {
Roger Quadrosbace4672024-05-13 15:13:54 +0300594 status = "okay";
595 pinctrl-names = "default";
596 pinctrl-0 = <&mdio0_pins_default>;
597
598 cpsw3g_phy0: ethernet-phy@0 {
599 reg = <0>;
600 };
601
602 cpsw3g_phy1: ethernet-phy@1 {
603 reg = <1>;
604 reset-gpios = <&main_gpio1 5 GPIO_ACTIVE_LOW>;
605 reset-assert-us = <25>;
606 reset-deassert-us = <60000>; /* T2 */
607 };
Robert Nelson0c24aad2023-08-25 13:03:03 -0500608};
609
610&main_gpio0 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600611 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500612 pinctrl-names = "default";
613 pinctrl-0 = <&gpio0_pins_default>;
614 gpio-line-names = "BL_EN_3V3", "SPE_PO_EN", "RTC_INT", /* 0-2 */
615 "USR0", "USR1", "USR2", "USR3", "", "", "USR4", /* 3-9 */
616 "EEPROM_WP", /* 10 */
617 "CSI2_CAMERA_GPIO1", "CSI2_CAMERA_GPIO2", /* 11-12 */
618 "CC1352P7_BOOT", "CC1352P7_RSTN", "", "", "", /* 13-17 */
619 "USR_BUTTON", "", "", "", "", "", "", "", "", /* 18-26 */
620 "", "", "", "", "", "", "", "", "", "HDMI_INT", /* 27-36 */
621 "", "VDD_WLAN_EN", "", "", "WL_IRQ", "GBE_INTN",/* 37-42 */
622 "", "", "", "", "", "", "", "", "", "", "", "", /* 43-54 */
623 "", "", "", "", "", "", "", "", "", "", "", "", /* 55-66 */
624 "", "", "", "", "", "", "", "", "", "", "", "", /* 67-78 */
625 "", "", "", "", "", "", /* 79-84 */
626 "BITBANG_MDIO_DATA", "BITBANG_MDIO_CLK", /* 85-86 */
627 "", "", "", "", ""; /* 87-91 */
628};
629
630&main_gpio1 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600631 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500632 pinctrl-names = "default";
633 pinctrl-0 = <&mikrobus_gpio_pins_default>;
634 gpio-line-names = "", "", "", "", "", /* 0-4 */
635 "SPE_RSTN", "SPE_INTN", "MIKROBUS_GPIO1_7", /* 5-7 */
636 "MIKROBUS_GPIO1_8", "MIKROBUS_GPIO1_9", /* 8-9 */
637 "MIKROBUS_GPIO1_10", "MIKROBUS_GPIO1_11", /* 10-11 */
638 "MIKROBUS_GPIO1_12", "MIKROBUS_W1_GPIO0", /* 12-13 */
639 "MIKROBUS_GPIO1_14", /* 14 */
640 "", "", "", "", "VDD_3V3_SD", "", "", /* 15-21 */
641 "MIKROBUS_GPIO1_22", "MIKROBUS_GPIO1_23", /* 22-23 */
642 "MIKROBUS_GPIO1_24", "MIKROBUS_GPIO1_25", /* 24-25 */
643 "", "", "", "", "", "", "", "", "", "", "", "", /* 26-37 */
644 "", "", "", "", "", "", "", "", "", "", /* 38-47 */
645 "SD_CD", "SD_VOLT_SEL", "", ""; /* 48-51 */
646};
647
648&main_i2c0 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600649 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500650 pinctrl-names = "default";
651 pinctrl-0 = <&local_i2c_pins_default>;
652 clock-frequency = <400000>;
653 status = "okay";
654
655 eeprom@50 {
656 compatible = "atmel,24c32";
657 reg = <0x50>;
658 };
659
660 rtc: rtc@68 {
661 compatible = "ti,bq32000";
662 reg = <0x68>;
663 interrupt-parent = <&main_gpio0>;
664 interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
665 };
666
667 tps65219: pmic@30 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600668 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500669 compatible = "ti,tps65219";
670 reg = <0x30>;
671 buck1-supply = <&vsys_5v0>;
672 buck2-supply = <&vsys_5v0>;
673 buck3-supply = <&vsys_5v0>;
674 ldo1-supply = <&vdd_3v3>;
675 ldo2-supply = <&buck2_reg>;
676 ldo3-supply = <&vdd_3v3>;
677 ldo4-supply = <&vdd_3v3>;
678
679 pinctrl-names = "default";
680 pinctrl-0 = <&pmic_irq_pins_default>;
681 interrupt-parent = <&gic500>;
682 interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
683 interrupt-controller;
684 #interrupt-cells = <1>;
685
686 system-power-controller;
687 ti,power-button;
688
689 regulators {
690 buck1_reg: buck1 {
691 regulator-name = "VDD_CORE";
692 regulator-min-microvolt = <850000>;
693 regulator-max-microvolt = <850000>;
694 regulator-boot-on;
695 regulator-always-on;
696 };
697
698 buck2_reg: buck2 {
699 regulator-name = "VDD_1V8";
700 regulator-min-microvolt = <1800000>;
701 regulator-max-microvolt = <1800000>;
702 regulator-boot-on;
703 regulator-always-on;
704 };
705
706 buck3_reg: buck3 {
707 regulator-name = "VDD_1V2";
708 regulator-min-microvolt = <1200000>;
709 regulator-max-microvolt = <1200000>;
710 regulator-boot-on;
711 regulator-always-on;
712 };
713
714 ldo1_reg: ldo1 {
715 /*
716 * Regulator is left as is unused, vdd_sd
717 * is controlled via GPIO with bypass config
718 * as per the NVM configuration
719 */
720 regulator-name = "VDD_SD_3V3";
721 regulator-min-microvolt = <3300000>;
722 regulator-max-microvolt = <3300000>;
723 regulator-allow-bypass;
724 regulator-boot-on;
725 regulator-always-on;
726 };
727
728 ldo2_reg: ldo2 {
729 regulator-name = "VDDA_0V85";
730 regulator-min-microvolt = <850000>;
731 regulator-max-microvolt = <850000>;
732 regulator-boot-on;
733 regulator-always-on;
734 };
735
736 ldo3_reg: ldo3 {
737 regulator-name = "VDDA_1V8";
738 regulator-min-microvolt = <1800000>;
739 regulator-max-microvolt = <1800000>;
740 regulator-boot-on;
741 regulator-always-on;
742 };
743
744 ldo4_reg: ldo4 {
745 regulator-name = "VDD_2V5";
746 regulator-min-microvolt = <2500000>;
747 regulator-max-microvolt = <2500000>;
748 regulator-boot-on;
749 regulator-always-on;
750 };
751 };
752 };
753};
754
755&main_i2c1 {
756 pinctrl-names = "default";
757 pinctrl-0 = <&grove_pins_default>;
758 clock-frequency = <100000>;
759 status = "okay";
760};
761
762&main_i2c2 {
763 pinctrl-names = "default";
764 pinctrl-0 = <&i2c2_1v8_pins_default>;
765 clock-frequency = <100000>;
766 status = "okay";
Nishanth Menon96934b02023-09-11 09:02:56 -0500767
768 it66121: bridge-hdmi@4c {
769 compatible = "ite,it66121";
770 reg = <0x4c>;
771 pinctrl-names = "default";
772 pinctrl-0 = <&hdmi_gpio_pins_default>;
773 vcn33-supply = <&vdd_3v3>;
774 vcn18-supply = <&buck2_reg>;
775 vrf12-supply = <&buck3_reg>;
776 reset-gpios = <&main_gpio0 21 GPIO_ACTIVE_LOW>;
777 interrupt-parent = <&main_gpio0>;
778 interrupts = <36 IRQ_TYPE_EDGE_FALLING>;
779 #sound-dai-cells = <0>;
780
781 ports {
782 #address-cells = <1>;
783 #size-cells = <0>;
784
785 port@0 {
786 reg = <0>;
787
788 it66121_in: endpoint {
789 bus-width = <24>;
790 remote-endpoint = <&dpi1_out>;
791 };
792 };
793
794 port@1 {
795 reg = <1>;
796
797 it66121_out: endpoint {
798 remote-endpoint = <&hdmi_connector_in>;
799 };
800 };
801 };
802 };
Robert Nelson0c24aad2023-08-25 13:03:03 -0500803};
804
805&main_i2c3 {
806 pinctrl-names = "default";
807 pinctrl-0 = <&mikrobus_i2c_pins_default>;
808 clock-frequency = <400000>;
809 status = "okay";
810};
811
812&main_spi2 {
813 pinctrl-names = "default";
814 pinctrl-0 = <&mikrobus_spi_pins_default>;
815 status = "okay";
816};
817
818&sdhci0 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600819 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500820 pinctrl-names = "default";
821 pinctrl-0 = <&emmc_pins_default>;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500822 disable-wp;
823 status = "okay";
824};
825
826&sdhci1 {
827 /* SD/MMC */
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600828 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500829 pinctrl-names = "default";
830 pinctrl-0 = <&sd_pins_default>;
831
832 vmmc-supply = <&vdd_3v3_sd>;
833 vqmmc-supply = <&vdd_sd_dv>;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500834 disable-wp;
835 cd-gpios = <&main_gpio1 48 GPIO_ACTIVE_LOW>;
836 cd-debounce-delay-ms = <100>;
837 ti,fails-without-test-cd;
838 status = "okay";
839};
840
841&sdhci2 {
842 vmmc-supply = <&wlan_en>;
843 pinctrl-names = "default";
844 pinctrl-0 = <&wifi_pins_default>, <&wifi_32k_clk>;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500845 non-removable;
846 ti,fails-without-test-cd;
847 cap-power-off-card;
848 keep-power-in-suspend;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500849 assigned-clocks = <&k3_clks 157 158>;
850 assigned-clock-parents = <&k3_clks 157 160>;
851 #address-cells = <1>;
852 #size-cells = <0>;
853 status = "okay";
854
855 wlcore: wlcore@2 {
856 compatible = "ti,wl1807";
857 reg = <2>;
858 pinctrl-names = "default";
859 pinctrl-0 = <&wifi_wlirq_pins_default>;
860 interrupt-parent = <&main_gpio0>;
861 interrupts = <41 IRQ_TYPE_EDGE_FALLING>;
862 };
863};
864
865&main_uart0 {
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600866 bootph-all;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500867 pinctrl-names = "default";
Roger Quadrosbace4672024-05-13 15:13:54 +0300868 pinctrl-0 = <&main_uart0_pins_default>;
Robert Nelson0c24aad2023-08-25 13:03:03 -0500869 status = "okay";
870};
871
872&main_uart1 {
873 /* Main UART1 is used by TIFS firmware */
874 status = "reserved";
875};
876
877&main_uart5 {
878 pinctrl-names = "default";
879 pinctrl-0 = <&mikrobus_uart_pins_default>;
880 status = "okay";
881};
882
883&main_uart6 {
884 pinctrl-names = "default";
885 pinctrl-0 = <&wifi_debug_uart_pins_default>;
886 status = "okay";
Nishanth Menonc72e8e72023-11-14 21:28:54 -0600887
888 mcu {
889 compatible = "ti,cc1352p7";
890 reset-gpios = <&main_gpio0 72 GPIO_ACTIVE_LOW>;
891 vdds-supply = <&vdd_3v3>;
892 };
Robert Nelson0c24aad2023-08-25 13:03:03 -0500893};
Nishanth Menon96934b02023-09-11 09:02:56 -0500894
895&dss {
896 status = "okay";
897 pinctrl-names = "default";
898 pinctrl-0 = <&dss0_pins_default>;
899};
900
901&dss_ports {
902 /* VP2: DPI Output */
903 port@1 {
904 reg = <1>;
905
906 dpi1_out: endpoint {
907 remote-endpoint = <&it66121_in>;
908 };
909 };
910};
911
912&mcasp1 {
913 status = "okay";
914 #sound-dai-cells = <0>;
915 pinctrl-names = "default";
916 pinctrl-0 = <&mcasp_hdmi_pins_default>;
917 auxclk-fs-ratio = <2177>;
918 op-mode = <0>; /* MCASP_IIS_MODE */
919 tdm-slots = <2>;
920 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
921 1 0 0 0
922 0 0 0 0
923 0 0 0 0
924 0 0 0 0
925 >;
926 tx-num-evt = <32>;
927 rx-num-evt = <32>;
928};