Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Modified for Hawkboard - Syed Mohammed Khasim <khasim@beagleboard.org> |
| 3 | * |
| 4 | * Copyright (C) 2008 Sekhar Nori, Texas Instruments, Inc. <nsekhar@ti.com> |
| 5 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> |
| 6 | * Copyright (C) 2004 Texas Instruments. |
Sughosh Ganu | 282e2af | 2012-08-09 10:45:20 +0000 | [diff] [blame] | 7 | * Copyright (C) 2012 Sughosh Ganu <urwithsughosh@gmail.com>. |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 8 | * |
| 9 | * ---------------------------------------------------------------------------- |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 10 | * SPDX-License-Identifier: GPL-2.0+ |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 11 | * ---------------------------------------------------------------------------- |
| 12 | */ |
| 13 | |
| 14 | #include <common.h> |
| 15 | #include <asm/errno.h> |
| 16 | #include <asm/arch/hardware.h> |
| 17 | #include <asm/io.h> |
| 18 | #include <asm/arch/davinci_misc.h> |
Sughosh Ganu | a261697 | 2012-02-02 00:44:41 +0000 | [diff] [blame] | 19 | #include <asm/arch/pinmux_defs.h> |
Sughosh Ganu | 282e2af | 2012-08-09 10:45:20 +0000 | [diff] [blame] | 20 | #include <asm/arch/da8xx-usb.h> |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 21 | #include <ns16550.h> |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 22 | |
| 23 | DECLARE_GLOBAL_DATA_PTR; |
| 24 | |
Sughosh Ganu | a261697 | 2012-02-02 00:44:41 +0000 | [diff] [blame] | 25 | const struct pinmux_resource pinmuxes[] = { |
| 26 | PINMUX_ITEM(emac_pins_mii), |
| 27 | PINMUX_ITEM(emac_pins_mdio), |
| 28 | PINMUX_ITEM(emifa_pins_cs3), |
| 29 | PINMUX_ITEM(emifa_pins_cs4), |
| 30 | PINMUX_ITEM(emifa_pins_nand), |
| 31 | PINMUX_ITEM(uart2_pins_txrx), |
| 32 | PINMUX_ITEM(uart2_pins_rtscts), |
| 33 | }; |
| 34 | |
| 35 | const int pinmuxes_size = ARRAY_SIZE(pinmuxes); |
| 36 | |
| 37 | const struct lpsc_resource lpsc[] = { |
| 38 | { DAVINCI_LPSC_AEMIF }, /* NAND, NOR */ |
| 39 | { DAVINCI_LPSC_SPI1 }, /* Serial Flash */ |
| 40 | { DAVINCI_LPSC_EMAC }, /* image download */ |
| 41 | { DAVINCI_LPSC_UART2 }, /* console */ |
| 42 | { DAVINCI_LPSC_GPIO }, |
| 43 | }; |
| 44 | |
| 45 | const int lpsc_size = ARRAY_SIZE(lpsc); |
| 46 | |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 47 | int board_init(void) |
| 48 | { |
| 49 | /* arch number of the board */ |
| 50 | gd->bd->bi_arch_number = MACH_TYPE_OMAPL138_HAWKBOARD; |
| 51 | |
| 52 | /* address of boot parameters */ |
| 53 | gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; |
| 54 | |
| 55 | return 0; |
| 56 | } |
| 57 | |
| 58 | int board_early_init_f(void) |
| 59 | { |
| 60 | /* |
| 61 | * Kick Registers need to be set to allow access to Pin Mux registers |
| 62 | */ |
Christian Riesch | af5829ce | 2011-11-19 00:45:44 +0000 | [diff] [blame] | 63 | writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); |
| 64 | writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); |
Sughosh Ganu | 1b9c52b | 2010-11-30 11:25:01 -0500 | [diff] [blame] | 65 | |
| 66 | /* set cfgchip3 to select mii */ |
| 67 | writel(readl(&davinci_syscfg_regs->cfgchip3) & |
| 68 | ~(1 << 8), &davinci_syscfg_regs->cfgchip3); |
| 69 | |
| 70 | return 0; |
| 71 | } |
| 72 | |
| 73 | int misc_init_r(void) |
| 74 | { |
| 75 | char buf[32]; |
| 76 | |
| 77 | printf("ARM Clock : %s MHz\n", |
| 78 | strmhz(buf, clk_get(DAVINCI_ARM_CLKID))); |
| 79 | |
| 80 | return 0; |
| 81 | } |
Sughosh Ganu | 282e2af | 2012-08-09 10:45:20 +0000 | [diff] [blame] | 82 | |
| 83 | int usb_phy_on(void) |
| 84 | { |
| 85 | u32 timeout; |
| 86 | u32 cfgchip2; |
| 87 | |
| 88 | cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); |
| 89 | |
| 90 | cfgchip2 &= ~(CFGCHIP2_RESET | CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | |
| 91 | CFGCHIP2_OTGMODE | CFGCHIP2_REFFREQ | |
| 92 | CFGCHIP2_USB1PHYCLKMUX); |
| 93 | cfgchip2 |= CFGCHIP2_SESENDEN | CFGCHIP2_VBDTCTEN | CFGCHIP2_PHY_PLLON | |
| 94 | CFGCHIP2_REFFREQ_24MHZ | CFGCHIP2_USB2PHYCLKMUX | |
| 95 | CFGCHIP2_USB1SUSPENDM; |
| 96 | |
| 97 | writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); |
| 98 | |
| 99 | /* wait until the usb phy pll locks */ |
| 100 | timeout = DA8XX_USB_OTG_TIMEOUT; |
| 101 | while (timeout--) |
| 102 | if (readl(&davinci_syscfg_regs->cfgchip2) & CFGCHIP2_PHYCLKGD) |
| 103 | return 1; |
| 104 | |
| 105 | /* USB phy was not turned on */ |
| 106 | return 0; |
| 107 | } |
| 108 | |
| 109 | void usb_phy_off(void) |
| 110 | { |
| 111 | u32 cfgchip2; |
| 112 | |
| 113 | /* |
| 114 | * Power down the on-chip PHY. |
| 115 | */ |
| 116 | cfgchip2 = readl(&davinci_syscfg_regs->cfgchip2); |
| 117 | cfgchip2 &= ~(CFGCHIP2_PHY_PLLON | CFGCHIP2_USB1SUSPENDM); |
| 118 | cfgchip2 |= CFGCHIP2_PHYPWRDN | CFGCHIP2_OTGPWRDN | CFGCHIP2_RESET; |
| 119 | writel(cfgchip2, &davinci_syscfg_regs->cfgchip2); |
| 120 | } |