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git01.mediatek.com / filogic / uboot / 40a5548b6b06fc9eb2c6ddc0cb9aab7f07dc5f10 / . / configs / zynq_zc702_defconfig
blob: 748b080c7c2708f727e94e3807b53d17650c81ab [file] [log] [blame]
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_ZYNQ=y
Michal Simek92543872016-12-16 11:57:17 +0100[diff] [blame]3CONFIG_SYS_TEXT_BASE=0x4000000
Tom Rinic9285bf2019-04-29 15:54:04 -0400[diff] [blame]4CONFIG_SPL_STACK_R_ADDR=0x200000
Michal Simek040050b2018-03-23 09:34:00 +0100[diff] [blame]5CONFIG_SPL=y
Michal Simeka932ae72018-06-04 08:33:30 +0200[diff] [blame]6CONFIG_DEBUG_UART_BASE=0xe0001000
7CONFIG_DEBUG_UART_CLOCK=50000000
Michal Simek96794a72017-12-13 10:35:06 +0100[diff] [blame]8CONFIG_IDENT_STRING=" Xilinx Zynq ZC702"
Tom Rini256aa742017-06-19 09:47:40 -0400[diff] [blame]9CONFIG_DEBUG_UART=y
Michal Simek8a0e11c2018-01-09 19:31:16 +0100[diff] [blame]10CONFIG_DISTRO_DEFAULTS=y
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]11CONFIG_FIT=y
Masahiro Yamada17b3d372015-05-18 15:31:51 +0900[diff] [blame]12CONFIG_FIT_SIGNATURE=y
Jagan Teki4c57e4c2017-01-21 11:48:33 +0100[diff] [blame]13CONFIG_FIT_VERBOSE=y
Alex Kiernan0419a9b2018-04-20 21:25:38 +0000[diff] [blame]14CONFIG_IMAGE_FORMAT_LEGACY=y
Michal Simekc7abf8d2017-12-01 13:50:33 +0100[diff] [blame]15CONFIG_SPL_STACK_R=y
Heiko Schocher1d12ba22016-10-06 07:55:15 +0200[diff] [blame]16CONFIG_SPL_OS_BOOT=y
Marek Vasute2542252018-04-07 16:05:27 +0200[diff] [blame]17CONFIG_SPL_SPI_LOAD=y
Siva Durga Prasad Paladugu59d461e2016-01-11 12:01:10 +0530[diff] [blame]18CONFIG_SYS_PROMPT="Zynq> "
Simon Glassa18b9692017-08-04 16:34:57 -0600[diff] [blame]19CONFIG_CMD_THOR_DOWNLOAD=y
Michal Simek9b97b7c2018-01-17 08:41:13 +0100[diff] [blame]20CONFIG_CMD_MEMTEST=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]21CONFIG_CMD_DFU=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]22# CONFIG_CMD_FLASH is not set
Simon Glass80cb1892017-05-17 03:25:21 -0600[diff] [blame]23CONFIG_CMD_FPGA_LOADBP=y
24CONFIG_CMD_FPGA_LOADFS=y
25CONFIG_CMD_FPGA_LOADMK=y
26CONFIG_CMD_FPGA_LOADP=y
Thomas Chou3a077cd2015-11-11 21:39:33 +0800[diff] [blame]27CONFIG_CMD_GPIO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]28CONFIG_CMD_I2C=y
29CONFIG_CMD_MMC=y
30CONFIG_CMD_SF=y
31CONFIG_CMD_USB=y
Joe Hershberger5a9d7f12015-06-22 16:15:30 -0500[diff] [blame]32# CONFIG_CMD_SETEXPR is not set
Tom Rini0f2dcb92016-04-22 16:41:25 -0400[diff] [blame]33CONFIG_CMD_TFTPPUT=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]34CONFIG_CMD_CACHE=y
Tom Rini1d9ac832016-04-24 17:29:26 -0400[diff] [blame]35CONFIG_CMD_EXT4_WRITE=y
Tom Rini74060322018-09-03 15:26:12 -0400[diff] [blame]36CONFIG_DEFAULT_DEVICE_TREE="zynq-zc702"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]37CONFIG_ENV_IS_IN_SPI_FLASH=y
Masahiro Yamada88e2e362015-07-17 20:26:06 +0900[diff] [blame]38CONFIG_NET_RANDOM_ETHADDR=y
Nathan Rossidd71c8a2016-01-08 03:00:46 +1000[diff] [blame]39CONFIG_SPL_DM_SEQ_ALIAS=y
Tom Rini265c7da2016-09-19 13:31:30 -0400[diff] [blame]40CONFIG_DFU_MMC=y
41CONFIG_DFU_RAM=y
Michal Simek216f6372017-11-03 15:53:56 +0100[diff] [blame]42CONFIG_FPGA_XILINX=y
Vipul Kumar4a4946b2018-02-16 18:02:51 +0530[diff] [blame]43CONFIG_FPGA_ZYNQPL=y
Michal Simek846d61b2018-01-09 15:27:31 +0100[diff] [blame]44CONFIG_DM_GPIO=y
Michal Simek2a6fafb2019-01-22 14:43:04 +0100[diff] [blame]45CONFIG_DM_I2C=y
46CONFIG_SYS_I2C_CADENCE=y
Michal Simekdef629c2018-07-16 14:12:43 +0200[diff] [blame]47CONFIG_LED=y
48CONFIG_LED_GPIO=y
Michal Simek2a6fafb2019-01-22 14:43:04 +0100[diff] [blame]49CONFIG_MISC=y
50CONFIG_I2C_EEPROM=y
51CONFIG_SYS_I2C_EEPROM_ADDR=0x0
52CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
Masahiro Yamada7db8c172016-12-07 22:10:28 +0900[diff] [blame]53CONFIG_MMC_SDHCI=y
Michal Simek19abc1d2017-02-10 13:57:35 +0100[diff] [blame]54CONFIG_MMC_SDHCI_ZYNQ=y
Jagan Teki083a2f52015-08-31 17:36:03 +0530[diff] [blame]55CONFIG_SPI_FLASH=y
Patrick Delaunay0df81042019-02-27 15:20:36 +0100[diff] [blame]56CONFIG_SF_DEFAULT_SPEED=30000000
Michal Simekf26b4c72016-01-25 15:39:26 +0100[diff] [blame]57CONFIG_SPI_FLASH_ISSI=y
Michal Simek27ebfbd2017-11-02 10:44:48 +0100[diff] [blame]58CONFIG_SPI_FLASH_MACRONIX=y
Bin Meng27f5b192015-11-25 05:34:54 -0800[diff] [blame]59CONFIG_SPI_FLASH_SPANSION=y
60CONFIG_SPI_FLASH_STMICRO=y
61CONFIG_SPI_FLASH_WINBOND=y
Vipul Kumar603ca6d2018-01-24 10:51:30 +0530[diff] [blame]62CONFIG_PHY_MARVELL=y
63CONFIG_PHY_REALTEK=y
64CONFIG_PHY_XILINX=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]65CONFIG_MII=y
Michal Simek3d7285f2015-11-30 14:34:52 +0100[diff] [blame]66CONFIG_ZYNQ_GEM=y
Michal Simek669bd682015-12-01 08:41:17 +0100[diff] [blame]67CONFIG_DEBUG_UART_ZYNQ=y
Michal Simekab754532017-11-06 09:16:05 +0100[diff] [blame]68CONFIG_ZYNQ_SERIAL=y
Jagan Tekic6dca132015-08-31 17:38:40 +0530[diff] [blame]69CONFIG_ZYNQ_QSPI=y
Sam Protsenkob084b0c2016-03-25 16:39:47 +0200[diff] [blame]70CONFIG_USB=y
Siva Durga Prasad Paladugu42fcc182016-07-22 14:51:51 +0530[diff] [blame]71CONFIG_USB_EHCI_HCD=y
Mateusz Kulikowski533e7b12016-03-31 23:12:19 +0200[diff] [blame]72CONFIG_USB_ULPI_VIEWPORT=y
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]73CONFIG_USB_ULPI=y
Michal Simekb9c5d132016-07-27 15:08:03 +0200[diff] [blame]74CONFIG_USB_GADGET=y
Maxime Ripard7f78b9d2017-09-07 08:58:08 +0200[diff] [blame]75CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
76CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
77CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
Sam Protsenkob4a0bf72016-04-13 14:20:25 +0300[diff] [blame]78CONFIG_CI_UDC=y
Sam Protsenko4d2439d2016-04-13 14:20:26 +0300[diff] [blame]79CONFIG_USB_GADGET_DOWNLOAD=y
Lukasz Majewski3c32b422018-01-29 19:30:18 +0100[diff] [blame]80CONFIG_USB_FUNCTION_THOR=y