blob: 0a644a9bc5bfe56aeb9c8377a72504dd9eb9c7c9 [file] [log] [blame]
Simon Glassf87bbff2014-11-14 20:56:33 -07001/*
2 * Copyright (C) 2014 Google, Inc
3 *
4 * From coreboot, originally based on the Linux kernel (drivers/pci/pci.c).
5 *
6 * Modifications are:
7 * Copyright (C) 2003-2004 Linux Networx
8 * (Written by Eric Biederman <ebiederman@lnxi.com> for Linux Networx)
9 * Copyright (C) 2003-2006 Ronald G. Minnich <rminnich@gmail.com>
10 * Copyright (C) 2004-2005 Li-Ta Lo <ollie@lanl.gov>
11 * Copyright (C) 2005-2006 Tyan
12 * (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
13 * Copyright (C) 2005-2009 coresystems GmbH
14 * (Written by Stefan Reinauer <stepan@coresystems.de> for coresystems GmbH)
15 *
16 * PCI Bus Services, see include/linux/pci.h for further explanation.
17 *
18 * Copyright 1993 -- 1997 Drew Eckhardt, Frederic Potter,
19 * David Mosberger-Tang
20 *
21 * Copyright 1997 -- 1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
22
23 * SPDX-License-Identifier: GPL-2.0
24 */
25
26#include <common.h>
27#include <bios_emul.h>
28#include <errno.h>
29#include <malloc.h>
30#include <pci.h>
31#include <pci_rom.h>
32#include <vbe.h>
33#include <video_fb.h>
34
35#ifdef CONFIG_HAVE_ACPI_RESUME
36#include <asm/acpi.h>
37#endif
38
39__weak bool board_should_run_oprom(pci_dev_t dev)
40{
41 return true;
42}
43
44static bool should_load_oprom(pci_dev_t dev)
45{
46#ifdef CONFIG_HAVE_ACPI_RESUME
47 if (acpi_get_slp_type() == 3)
48 return false;
49#endif
50 if (IS_ENABLED(CONFIG_ALWAYS_LOAD_OPROM))
51 return 1;
52 if (board_should_run_oprom(dev))
53 return 1;
54
55 return 0;
56}
57
58__weak uint32_t board_map_oprom_vendev(uint32_t vendev)
59{
60 return vendev;
61}
62
63static int pci_rom_probe(pci_dev_t dev, uint class,
64 struct pci_rom_header **hdrp)
65{
66 struct pci_rom_header *rom_header;
67 struct pci_rom_data *rom_data;
68 u16 vendor, device;
Simon Glassdfca4462014-12-29 19:32:23 -070069 u16 rom_vendor, rom_device;
Bin Meng932f80e2015-04-24 15:48:03 +080070 u32 rom_class;
Simon Glassf87bbff2014-11-14 20:56:33 -070071 u32 vendev;
72 u32 mapped_vendev;
73 u32 rom_address;
74
75 pci_read_config_word(dev, PCI_VENDOR_ID, &vendor);
76 pci_read_config_word(dev, PCI_DEVICE_ID, &device);
77 vendev = vendor << 16 | device;
78 mapped_vendev = board_map_oprom_vendev(vendev);
79 if (vendev != mapped_vendev)
80 debug("Device ID mapped to %#08x\n", mapped_vendev);
81
82#ifdef CONFIG_X86_OPTION_ROM_ADDR
83 rom_address = CONFIG_X86_OPTION_ROM_ADDR;
84#else
Simon Glass1c1695b2015-01-14 21:37:04 -070085
86 if (pciauto_setup_rom(pci_bus_to_hose(PCI_BUS(dev)), dev)) {
87 debug("Cannot find option ROM\n");
88 return -ENOENT;
89 }
90
Simon Glassf87bbff2014-11-14 20:56:33 -070091 pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_address);
92 if (rom_address == 0x00000000 || rom_address == 0xffffffff) {
93 debug("%s: rom_address=%x\n", __func__, rom_address);
94 return -ENOENT;
95 }
96
97 /* Enable expansion ROM address decoding. */
98 pci_write_config_dword(dev, PCI_ROM_ADDRESS,
99 rom_address | PCI_ROM_ADDRESS_ENABLE);
100#endif
101 debug("Option ROM address %x\n", rom_address);
Minghuan Lianf40ad9f2015-01-22 13:21:55 +0800102 rom_header = (struct pci_rom_header *)(unsigned long)rom_address;
Simon Glassf87bbff2014-11-14 20:56:33 -0700103
104 debug("PCI expansion ROM, signature %#04x, INIT size %#04x, data ptr %#04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700105 le16_to_cpu(rom_header->signature),
106 rom_header->size * 512, le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700107
Simon Glassdfca4462014-12-29 19:32:23 -0700108 if (le16_to_cpu(rom_header->signature) != PCI_ROM_HDR) {
Simon Glassf87bbff2014-11-14 20:56:33 -0700109 printf("Incorrect expansion ROM header signature %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700110 le16_to_cpu(rom_header->signature));
Simon Glassf87bbff2014-11-14 20:56:33 -0700111 return -EINVAL;
112 }
113
Simon Glassdfca4462014-12-29 19:32:23 -0700114 rom_data = (((void *)rom_header) + le16_to_cpu(rom_header->data));
115 rom_vendor = le16_to_cpu(rom_data->vendor);
116 rom_device = le16_to_cpu(rom_data->device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700117
118 debug("PCI ROM image, vendor ID %04x, device ID %04x,\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700119 rom_vendor, rom_device);
Simon Glassf87bbff2014-11-14 20:56:33 -0700120
121 /* If the device id is mapped, a mismatch is expected */
Simon Glassdfca4462014-12-29 19:32:23 -0700122 if ((vendor != rom_vendor || device != rom_device) &&
Simon Glassf87bbff2014-11-14 20:56:33 -0700123 (vendev == mapped_vendev)) {
124 printf("ID mismatch: vendor ID %04x, device ID %04x\n",
Simon Glassdfca4462014-12-29 19:32:23 -0700125 rom_vendor, rom_device);
Simon Glass02db2172014-12-29 19:32:27 -0700126 /* Continue anyway */
Simon Glassf87bbff2014-11-14 20:56:33 -0700127 }
128
Bin Meng932f80e2015-04-24 15:48:03 +0800129 rom_class = (le16_to_cpu(rom_data->class_hi) << 8) | rom_data->class_lo;
130 debug("PCI ROM image, Class Code %06x, Code Type %02x\n",
131 rom_class, rom_data->type);
Simon Glassf87bbff2014-11-14 20:56:33 -0700132
Bin Meng932f80e2015-04-24 15:48:03 +0800133 if (class != rom_class) {
134 debug("Class Code mismatch ROM %06x, dev %06x\n",
135 rom_class, class);
Simon Glassf87bbff2014-11-14 20:56:33 -0700136 }
137 *hdrp = rom_header;
138
139 return 0;
140}
141
Bin Meng7cc45c72015-04-24 15:48:04 +0800142int pci_rom_load(struct pci_rom_header *rom_header,
Simon Glassf87bbff2014-11-14 20:56:33 -0700143 struct pci_rom_header **ram_headerp)
144{
145 struct pci_rom_data *rom_data;
146 unsigned int rom_size;
147 unsigned int image_size = 0;
148 void *target;
149
150 do {
151 /* Get next image, until we see an x86 version */
152 rom_header = (struct pci_rom_header *)((void *)rom_header +
153 image_size);
154
155 rom_data = (struct pci_rom_data *)((void *)rom_header +
Simon Glassdfca4462014-12-29 19:32:23 -0700156 le16_to_cpu(rom_header->data));
Simon Glassf87bbff2014-11-14 20:56:33 -0700157
Simon Glassdfca4462014-12-29 19:32:23 -0700158 image_size = le16_to_cpu(rom_data->ilen) * 512;
159 } while ((rom_data->type != 0) && (rom_data->indicator == 0));
Simon Glassf87bbff2014-11-14 20:56:33 -0700160
161 if (rom_data->type != 0)
162 return -EACCES;
163
164 rom_size = rom_header->size * 512;
165
Simon Glass1b6b9b92014-12-29 19:32:24 -0700166#ifdef PCI_VGA_RAM_IMAGE_START
Simon Glassf87bbff2014-11-14 20:56:33 -0700167 target = (void *)PCI_VGA_RAM_IMAGE_START;
Simon Glass1b6b9b92014-12-29 19:32:24 -0700168#else
169 target = (void *)malloc(rom_size);
170 if (!target)
171 return -ENOMEM;
172#endif
Simon Glassf87bbff2014-11-14 20:56:33 -0700173 if (target != rom_header) {
Simon Glassf6898082015-01-01 16:18:01 -0700174 ulong start = get_timer(0);
175
Simon Glassf87bbff2014-11-14 20:56:33 -0700176 debug("Copying VGA ROM Image from %p to %p, 0x%x bytes\n",
177 rom_header, target, rom_size);
178 memcpy(target, rom_header, rom_size);
179 if (memcmp(target, rom_header, rom_size)) {
180 printf("VGA ROM copy failed\n");
181 return -EFAULT;
182 }
Simon Glassf6898082015-01-01 16:18:01 -0700183 debug("Copy took %lums\n", get_timer(start));
Simon Glassf87bbff2014-11-14 20:56:33 -0700184 }
185 *ram_headerp = target;
186
187 return 0;
188}
189
190static struct vbe_mode_info mode_info;
191
192int vbe_get_video_info(struct graphic_device *gdev)
193{
194#ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE
195 struct vesa_mode_info *vesa = &mode_info.vesa;
196
197 gdev->winSizeX = vesa->x_resolution;
198 gdev->winSizeY = vesa->y_resolution;
199
200 gdev->plnSizeX = vesa->x_resolution;
201 gdev->plnSizeY = vesa->y_resolution;
202
203 gdev->gdfBytesPP = vesa->bits_per_pixel / 8;
204
205 switch (vesa->bits_per_pixel) {
Jian Luo40002602015-07-06 16:31:29 +0800206 case 32:
Simon Glassf87bbff2014-11-14 20:56:33 -0700207 case 24:
208 gdev->gdfIndex = GDF_32BIT_X888RGB;
209 break;
210 case 16:
211 gdev->gdfIndex = GDF_16BIT_565RGB;
212 break;
213 default:
214 gdev->gdfIndex = GDF__8BIT_INDEX;
215 break;
216 }
217
218 gdev->isaBase = CONFIG_SYS_ISA_IO_BASE_ADDRESS;
219 gdev->pciBase = vesa->phys_base_ptr;
220
221 gdev->frameAdrs = vesa->phys_base_ptr;
222 gdev->memSize = vesa->bytes_per_scanline * vesa->y_resolution;
223
224 gdev->vprBase = vesa->phys_base_ptr;
225 gdev->cprBase = vesa->phys_base_ptr;
226
Simon Glassed33cb82015-01-01 16:18:00 -0700227 return gdev->winSizeX ? 0 : -ENOSYS;
Simon Glassf87bbff2014-11-14 20:56:33 -0700228#else
229 return -ENOSYS;
230#endif
231}
232
Simon Glass684818d2015-01-27 22:13:34 -0700233int pci_run_vga_bios(pci_dev_t dev, int (*int15_handler)(void), int exec_method)
Simon Glassf87bbff2014-11-14 20:56:33 -0700234{
235 struct pci_rom_header *rom, *ram;
236 int vesa_mode = -1;
Bin Meng932f80e2015-04-24 15:48:03 +0800237 uint class;
Simon Glass684818d2015-01-27 22:13:34 -0700238 bool emulate;
Simon Glassf87bbff2014-11-14 20:56:33 -0700239 int ret;
240
241 /* Only execute VGA ROMs */
Bin Meng932f80e2015-04-24 15:48:03 +0800242 pci_read_config_dword(dev, PCI_REVISION_ID, &class);
243 if (((class >> 16) ^ PCI_CLASS_DISPLAY_VGA) & 0xff00) {
Simon Glassf87bbff2014-11-14 20:56:33 -0700244 debug("%s: Class %#x, should be %#x\n", __func__, class,
245 PCI_CLASS_DISPLAY_VGA);
246 return -ENODEV;
247 }
Bin Meng932f80e2015-04-24 15:48:03 +0800248 class >>= 8;
Simon Glassf87bbff2014-11-14 20:56:33 -0700249
250 if (!should_load_oprom(dev))
251 return -ENXIO;
252
253 ret = pci_rom_probe(dev, class, &rom);
254 if (ret)
255 return ret;
256
Bin Meng7cc45c72015-04-24 15:48:04 +0800257 ret = pci_rom_load(rom, &ram);
Simon Glassf87bbff2014-11-14 20:56:33 -0700258 if (ret)
259 return ret;
260
261 if (!board_should_run_oprom(dev))
262 return -ENXIO;
263
264#if defined(CONFIG_FRAMEBUFFER_SET_VESA_MODE) && \
265 defined(CONFIG_FRAMEBUFFER_VESA_MODE)
266 vesa_mode = CONFIG_FRAMEBUFFER_VESA_MODE;
267#endif
Simon Glassc49a8f82015-01-01 16:18:05 -0700268 debug("Selected vesa mode %#x\n", vesa_mode);
Simon Glass684818d2015-01-27 22:13:34 -0700269
270 if (exec_method & PCI_ROM_USE_NATIVE) {
271#ifdef CONFIG_X86
272 emulate = false;
273#else
274 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
275 printf("BIOS native execution is only available on x86\n");
276 return -ENOSYS;
277 }
278 emulate = true;
279#endif
280 } else {
281#ifdef CONFIG_BIOSEMU
282 emulate = true;
283#else
284 if (!(exec_method & PCI_ROM_ALLOW_FALLBACK)) {
285 printf("BIOS emulation not available - see CONFIG_BIOSEMU\n");
286 return -ENOSYS;
287 }
288 emulate = false;
289#endif
290 }
291
Simon Glassf87bbff2014-11-14 20:56:33 -0700292 if (emulate) {
293#ifdef CONFIG_BIOSEMU
294 BE_VGAInfo *info;
295
296 ret = biosemu_setup(dev, &info);
297 if (ret)
298 return ret;
299 biosemu_set_interrupt_handler(0x15, int15_handler);
300 ret = biosemu_run(dev, (uchar *)ram, 1 << 16, info, true,
301 vesa_mode, &mode_info);
302 if (ret)
303 return ret;
Simon Glassf87bbff2014-11-14 20:56:33 -0700304#endif
305 } else {
306#ifdef CONFIG_X86
307 bios_set_interrupt_handler(0x15, int15_handler);
308
309 bios_run_on_x86(dev, (unsigned long)ram, vesa_mode,
310 &mode_info);
Simon Glassf87bbff2014-11-14 20:56:33 -0700311#endif
312 }
Simon Glassc49a8f82015-01-01 16:18:05 -0700313 debug("Final vesa mode %#x\n", mode_info.video_mode);
Simon Glassf87bbff2014-11-14 20:56:33 -0700314
315 return 0;
316}