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Manivannan Sadhasivamcf33f922019-08-02 20:40:09 +05301/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2019 Linaro
4 * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
5 */
6
7#ifndef __HI3660_H__
8#define __HI3660_H__
9
10#define HI3660_UART6_BASE 0xfff32000
11
12#define PMU_REG_BASE 0xfff34000
13#define PMIC_HARDWARE_CTRL0 (PMU_REG_BASE + (0x0C5 << 2))
14
15#define SCTRL_REG_BASE 0xfff0a000
16#define SCTRL_SCFPLLCTRL0 (SCTRL_REG_BASE + 0x120)
17#define SCTRL_SCFPLLCTRL0_FPLL0_EN BIT(0)
18
19#define CRG_REG_BASE 0xfff35000
20#define CRG_PEREN2 (CRG_REG_BASE + 0x020)
21#define CRG_PERDIS2 (CRG_REG_BASE + 0x024)
22#define CRG_PERCLKEN2 (CRG_REG_BASE + 0x028)
23#define CRG_PERSTAT2 (CRG_REG_BASE + 0x02C)
24#define CRG_PEREN4 (CRG_REG_BASE + 0x040)
25#define CRG_PERDIS4 (CRG_REG_BASE + 0x044)
26#define CRG_PERCLKEN4 (CRG_REG_BASE + 0x048)
27#define CRG_PERSTAT4 (CRG_REG_BASE + 0x04C)
28#define CRG_PERRSTEN2 (CRG_REG_BASE + 0x078)
29#define CRG_PERRSTDIS2 (CRG_REG_BASE + 0x07C)
30#define CRG_PERRSTSTAT2 (CRG_REG_BASE + 0x080)
31#define CRG_PERRSTEN3 (CRG_REG_BASE + 0x084)
32#define CRG_PERRSTDIS3 (CRG_REG_BASE + 0x088)
33#define CRG_PERRSTSTAT3 (CRG_REG_BASE + 0x08C)
34#define CRG_PERRSTEN4 (CRG_REG_BASE + 0x090)
35#define CRG_PERRSTDIS4 (CRG_REG_BASE + 0x094)
36#define CRG_PERRSTSTAT4 (CRG_REG_BASE + 0x098)
37#define CRG_ISOEN (CRG_REG_BASE + 0x144)
38#define CRG_ISODIS (CRG_REG_BASE + 0x148)
39#define CRG_ISOSTAT (CRG_REG_BASE + 0x14C)
40
41#define PINMUX4_BASE 0xfff11000
42#define PINMUX4_SDDET (PINMUX4_BASE + 0x60)
43
44#define PINCONF3_BASE 0xff37e800
45#define PINCONF3_SDCLK (PINCONF3_BASE + 0x00)
46#define PINCONF3_SDCMD (PINCONF3_BASE + 0x04)
47#define PINCONF3_SDDATA0 (PINCONF3_BASE + 0x08)
48#define PINCONF3_SDDATA1 (PINCONF3_BASE + 0x0c)
49#define PINCONF3_SDDATA2 (PINCONF3_BASE + 0x10)
50#define PINCONF3_SDDATA3 (PINCONF3_BASE + 0x14)
51
52#endif /*__HI3660_H__*/