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Stefan Agner7152f342018-06-22 17:19:46 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * NXP GPMI NAND flash driver
4 *
5 * Copyright (C) 2018 Toradex
6 * Authors:
7 * Stefan Agner <stefan.agner@toradex.com>
8 */
9
Stefan Agner19f90512018-06-22 18:06:16 +020010#include <linux/mtd/mtd.h>
11#include <asm/cache.h>
12#include <nand.h>
13#include <asm/mach-imx/dma.h>
14
15/**
16 * @gf_len: The length of Galois Field. (e.g., 13 or 14)
17 * @ecc_strength: A number that describes the strength of the ECC
18 * algorithm.
Ye Li94547442020-05-04 22:08:50 +080019 * @ecc_chunk0_size: The size, in bytes, of a first ECC chunk.
20 * @ecc_chunkn_size: The size, in bytes, of a single ECC chunk after
21 * the first chunk in the page.
Stefan Agner19f90512018-06-22 18:06:16 +020022 * @ecc_chunk_count: The number of ECC chunks in the page,
23 * @block_mark_byte_offset: The byte offset in the ECC-based page view at
24 * which the underlying physical block mark appears.
25 * @block_mark_bit_offset: The bit offset into the ECC-based page view at
26 * which the underlying physical block mark appears.
Ye Li94547442020-05-04 22:08:50 +080027 * @ecc_for_meta: The flag to indicate if there is a dedicate ecc
28 * for meta.
Stefan Agner19f90512018-06-22 18:06:16 +020029 */
30struct bch_geometry {
31 unsigned int gf_len;
32 unsigned int ecc_strength;
Ye Li94547442020-05-04 22:08:50 +080033 unsigned int ecc_chunk0_size;
34 unsigned int ecc_chunkn_size;
Stefan Agner19f90512018-06-22 18:06:16 +020035 unsigned int ecc_chunk_count;
36 unsigned int block_mark_byte_offset;
37 unsigned int block_mark_bit_offset;
Ye Li94547442020-05-04 22:08:50 +080038 unsigned int ecc_for_meta; /* ECC for meta data */
Stefan Agner19f90512018-06-22 18:06:16 +020039};
40
41struct mxs_nand_info {
42 struct nand_chip chip;
43 struct udevice *dev;
44 unsigned int max_ecc_strength_supported;
45 bool use_minimum_ecc;
Ye Lic6736132020-05-04 22:08:51 +080046 /* legacy bch geometry flag */
47 bool legacy_bch_geometry;
Stefan Agner19f90512018-06-22 18:06:16 +020048 int cur_chip;
49
50 uint32_t cmd_queue_len;
51 uint32_t data_buf_size;
52 struct bch_geometry bch_geometry;
53
54 uint8_t *cmd_buf;
55 uint8_t *data_buf;
56 uint8_t *oob_buf;
57
58 uint8_t marking_block_bad;
59 uint8_t raw_oob_mode;
60
61 struct mxs_gpmi_regs *gpmi_regs;
62 struct mxs_bch_regs *bch_regs;
63
64 /* Functions with altered behaviour */
65 int (*hooked_read_oob)(struct mtd_info *mtd,
66 loff_t from, struct mtd_oob_ops *ops);
67 int (*hooked_write_oob)(struct mtd_info *mtd,
68 loff_t to, struct mtd_oob_ops *ops);
69 int (*hooked_block_markbad)(struct mtd_info *mtd,
70 loff_t ofs);
71
72 /* DMA descriptors */
73 struct mxs_dma_desc **desc;
74 uint32_t desc_index;
Igor Opaniukc55401372019-11-03 16:49:43 +010075
76 /* Hardware BCH interface and randomizer */
77 u32 en_randomizer;
78 u32 writesize;
79 u32 oobsize;
80 u32 bch_flash0layout0;
81 u32 bch_flash0layout1;
82};
83
84struct mxs_nand_layout {
85 u32 nblocks;
86 u32 meta_size;
87 u32 data0_size;
88 u32 ecc0;
89 u32 datan_size;
90 u32 eccn;
Han Xu33543b52020-05-04 22:08:58 +080091 u32 gf_len;
Stefan Agner19f90512018-06-22 18:06:16 +020092};
93
94int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info);
Stefan Agner7152f342018-06-22 17:19:46 +020095int mxs_nand_init_spl(struct nand_chip *nand);
Stefan Agner5883e552018-06-22 17:19:47 +020096int mxs_nand_setup_ecc(struct mtd_info *mtd);
Igor Opaniukc55401372019-11-03 16:49:43 +010097
Han Xuafed2a12020-05-06 20:59:19 +080098void mxs_nand_mode_fcb_62bit(struct mtd_info *mtd);
99void mxs_nand_mode_fcb_40bit(struct mtd_info *mtd);
Igor Opaniukc55401372019-11-03 16:49:43 +0100100void mxs_nand_mode_normal(struct mtd_info *mtd);
101u32 mxs_nand_mark_byte_offset(struct mtd_info *mtd);
102u32 mxs_nand_mark_bit_offset(struct mtd_info *mtd);
103void mxs_nand_get_layout(struct mtd_info *mtd, struct mxs_nand_layout *l);