Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 2 | /* |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 3 | * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> |
| 4 | * |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 5 | * (C) Copyright 2002 |
| 6 | * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
| 7 | * |
| 8 | * (C) Copyright 2002 |
| 9 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 10 | * Marius Groeger <mgroeger@sysgo.de> |
| 11 | * |
| 12 | * (C) Copyright 2002 |
| 13 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> |
| 14 | * Alex Zuepke <azu@sysgo.de> |
| 15 | * |
| 16 | * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl) |
| 17 | * |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 18 | * Modified to add driver model (DM) support |
| 19 | * (C) Copyright 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | #include <common.h> |
Simon Glass | f11478f | 2019-12-28 10:45:07 -0700 | [diff] [blame] | 23 | #include <hang.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 24 | #include <asm/arch/pxa-regs.h> |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 25 | #include <asm/arch/regs-uart.h> |
Marek Vasut | 2db1e96 | 2010-09-09 09:50:39 +0200 | [diff] [blame] | 26 | #include <asm/io.h> |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 27 | #include <dm.h> |
| 28 | #include <dm/platform_data/serial_pxa.h> |
Marek Vasut | bc53d14 | 2012-09-12 12:26:30 +0200 | [diff] [blame] | 29 | #include <linux/compiler.h> |
Marcel Ziswiler | 7cfcbee | 2015-08-16 04:16:29 +0200 | [diff] [blame] | 30 | #include <serial.h> |
| 31 | #include <watchdog.h> |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 32 | |
Wolfgang Denk | 6405a15 | 2006-03-31 18:32:53 +0200 | [diff] [blame] | 33 | DECLARE_GLOBAL_DATA_PTR; |
| 34 | |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 35 | static uint32_t pxa_uart_get_baud_divider(int baudrate) |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 36 | { |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 37 | return 921600 / baudrate; |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 38 | } |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 39 | |
Marek Vasut | bcf4872 | 2012-09-12 12:59:42 +0200 | [diff] [blame] | 40 | static void pxa_uart_toggle_clock(uint32_t uart_index, int enable) |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 41 | { |
| 42 | uint32_t clk_reg, clk_offset, reg; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 43 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 44 | clk_reg = UART_CLK_REG; |
| 45 | clk_offset = UART_CLK_BASE << uart_index; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 46 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 47 | reg = readl(clk_reg); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 48 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 49 | if (enable) |
| 50 | reg |= clk_offset; |
| 51 | else |
| 52 | reg &= ~clk_offset; |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 53 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 54 | writel(reg, clk_reg); |
| 55 | } |
wdenk | b02744a | 2003-04-05 00:53:31 +0000 | [diff] [blame] | 56 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 57 | /* |
| 58 | * Enable clock and set baud rate, parity etc. |
| 59 | */ |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 60 | void pxa_setbrg_common(struct pxa_uart_regs *uart_regs, int port, int baudrate) |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 61 | { |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 62 | uint32_t divider = pxa_uart_get_baud_divider(baudrate); |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 63 | if (!divider) |
| 64 | hang(); |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 65 | |
wdenk | 5958f4a | 2003-09-18 09:21:33 +0000 | [diff] [blame] | 66 | |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 67 | pxa_uart_toggle_clock(port, 1); |
wdenk | 5958f4a | 2003-09-18 09:21:33 +0000 | [diff] [blame] | 68 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 69 | /* Disable interrupts and FIFOs */ |
| 70 | writel(0, &uart_regs->ier); |
| 71 | writel(0, &uart_regs->fcr); |
wdenk | 5958f4a | 2003-09-18 09:21:33 +0000 | [diff] [blame] | 72 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 73 | /* Set baud rate */ |
| 74 | writel(LCR_WLS0 | LCR_WLS1 | LCR_DLAB, &uart_regs->lcr); |
| 75 | writel(divider & 0xff, &uart_regs->dll); |
| 76 | writel(divider >> 8, &uart_regs->dlh); |
| 77 | writel(LCR_WLS0 | LCR_WLS1, &uart_regs->lcr); |
wdenk | 5958f4a | 2003-09-18 09:21:33 +0000 | [diff] [blame] | 78 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 79 | /* Enable UART */ |
| 80 | writel(IER_UUE, &uart_regs->ier); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 81 | } |
| 82 | |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 83 | #ifndef CONFIG_DM_SERIAL |
| 84 | static struct pxa_uart_regs *pxa_uart_index_to_regs(uint32_t uart_index) |
| 85 | { |
| 86 | switch (uart_index) { |
| 87 | case FFUART_INDEX: return (struct pxa_uart_regs *)FFUART_BASE; |
| 88 | case BTUART_INDEX: return (struct pxa_uart_regs *)BTUART_BASE; |
| 89 | case STUART_INDEX: return (struct pxa_uart_regs *)STUART_BASE; |
| 90 | case HWUART_INDEX: return (struct pxa_uart_regs *)HWUART_BASE; |
| 91 | default: |
| 92 | return NULL; |
| 93 | } |
| 94 | } |
| 95 | |
| 96 | /* |
| 97 | * Enable clock and set baud rate, parity etc. |
| 98 | */ |
| 99 | void pxa_setbrg_dev(uint32_t uart_index) |
| 100 | { |
| 101 | struct pxa_uart_regs *uart_regs = pxa_uart_index_to_regs(uart_index); |
| 102 | if (!uart_regs) |
| 103 | panic("Failed getting UART registers\n"); |
| 104 | |
| 105 | pxa_setbrg_common(uart_regs, uart_index, gd->baudrate); |
| 106 | } |
| 107 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 108 | /* |
| 109 | * Initialise the serial port with the given baudrate. The settings |
| 110 | * are always 8 data bits, no parity, 1 stop bit, no start bits. |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 111 | */ |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 112 | int pxa_init_dev(unsigned int uart_index) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 113 | { |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 114 | pxa_setbrg_dev(uart_index); |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 115 | return 0; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 116 | } |
| 117 | |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 118 | /* |
| 119 | * Output a single byte to the serial port. |
| 120 | */ |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 121 | void pxa_putc_dev(unsigned int uart_index, const char c) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 122 | { |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 123 | struct pxa_uart_regs *uart_regs; |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 124 | |
Alison Wang | 23e06b5 | 2016-03-02 11:00:37 +0800 | [diff] [blame] | 125 | /* If \n, also do \r */ |
| 126 | if (c == '\n') |
| 127 | pxa_putc_dev(uart_index, '\r'); |
| 128 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 129 | uart_regs = pxa_uart_index_to_regs(uart_index); |
| 130 | if (!uart_regs) |
| 131 | hang(); |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 132 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 133 | while (!(readl(&uart_regs->lsr) & LSR_TEMT)) |
| 134 | WATCHDOG_RESET(); |
| 135 | writel(c, &uart_regs->thr); |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 136 | } |
| 137 | |
| 138 | /* |
| 139 | * Read a single byte from the serial port. Returns 1 on success, 0 |
| 140 | * otherwise. When the function is succesfull, the character read is |
| 141 | * written into its argument c. |
| 142 | */ |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 143 | int pxa_tstc_dev(unsigned int uart_index) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 144 | { |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 145 | struct pxa_uart_regs *uart_regs; |
| 146 | |
| 147 | uart_regs = pxa_uart_index_to_regs(uart_index); |
| 148 | if (!uart_regs) |
| 149 | return -1; |
| 150 | |
| 151 | return readl(&uart_regs->lsr) & LSR_DR; |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 152 | } |
| 153 | |
| 154 | /* |
| 155 | * Read a single byte from the serial port. Returns 1 on success, 0 |
| 156 | * otherwise. When the function is succesfull, the character read is |
| 157 | * written into its argument c. |
| 158 | */ |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 159 | int pxa_getc_dev(unsigned int uart_index) |
wdenk | c609719 | 2002-11-03 00:24:07 +0000 | [diff] [blame] | 160 | { |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 161 | struct pxa_uart_regs *uart_regs; |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 162 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 163 | uart_regs = pxa_uart_index_to_regs(uart_index); |
| 164 | if (!uart_regs) |
| 165 | return -1; |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 166 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 167 | while (!(readl(&uart_regs->lsr) & LSR_DR)) |
| 168 | WATCHDOG_RESET(); |
| 169 | return readl(&uart_regs->rbr) & 0xff; |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 170 | } |
| 171 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 172 | void pxa_puts_dev(unsigned int uart_index, const char *s) |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 173 | { |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 174 | while (*s) |
| 175 | pxa_putc_dev(uart_index, *s++); |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 176 | } |
| 177 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 178 | #define pxa_uart(uart, UART) \ |
| 179 | int uart##_init(void) \ |
| 180 | { \ |
| 181 | return pxa_init_dev(UART##_INDEX); \ |
| 182 | } \ |
| 183 | \ |
| 184 | void uart##_setbrg(void) \ |
| 185 | { \ |
| 186 | return pxa_setbrg_dev(UART##_INDEX); \ |
| 187 | } \ |
| 188 | \ |
| 189 | void uart##_putc(const char c) \ |
| 190 | { \ |
| 191 | return pxa_putc_dev(UART##_INDEX, c); \ |
| 192 | } \ |
| 193 | \ |
| 194 | void uart##_puts(const char *s) \ |
| 195 | { \ |
| 196 | return pxa_puts_dev(UART##_INDEX, s); \ |
| 197 | } \ |
| 198 | \ |
| 199 | int uart##_getc(void) \ |
| 200 | { \ |
| 201 | return pxa_getc_dev(UART##_INDEX); \ |
| 202 | } \ |
| 203 | \ |
| 204 | int uart##_tstc(void) \ |
| 205 | { \ |
| 206 | return pxa_tstc_dev(UART##_INDEX); \ |
| 207 | } \ |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 208 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 209 | #define pxa_uart_desc(uart) \ |
| 210 | struct serial_device serial_##uart##_device = \ |
| 211 | { \ |
Marek Vasut | 5bcdf24 | 2012-09-09 18:48:28 +0200 | [diff] [blame] | 212 | .name = "serial_"#uart, \ |
| 213 | .start = uart##_init, \ |
| 214 | .stop = NULL, \ |
| 215 | .setbrg = uart##_setbrg, \ |
| 216 | .getc = uart##_getc, \ |
| 217 | .tstc = uart##_tstc, \ |
| 218 | .putc = uart##_putc, \ |
| 219 | .puts = uart##_puts, \ |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 220 | }; |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 221 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 222 | #define pxa_uart_multi(uart, UART) \ |
| 223 | pxa_uart(uart, UART) \ |
| 224 | pxa_uart_desc(uart) |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 225 | |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 226 | #if defined(CONFIG_HWUART) |
| 227 | pxa_uart_multi(hwuart, HWUART) |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 228 | #endif |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 229 | #if defined(CONFIG_STUART) |
| 230 | pxa_uart_multi(stuart, STUART) |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 231 | #endif |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 232 | #if defined(CONFIG_FFUART) |
| 233 | pxa_uart_multi(ffuart, FFUART) |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 234 | #endif |
Marek Vasut | ac737ff | 2011-08-28 03:35:13 +0200 | [diff] [blame] | 235 | #if defined(CONFIG_BTUART) |
| 236 | pxa_uart_multi(btuart, BTUART) |
| 237 | #endif |
stefano babic | 5ab4f03 | 2007-08-30 22:57:04 +0200 | [diff] [blame] | 238 | |
Marek Vasut | bc53d14 | 2012-09-12 12:26:30 +0200 | [diff] [blame] | 239 | __weak struct serial_device *default_serial_console(void) |
| 240 | { |
| 241 | #if CONFIG_CONS_INDEX == 1 |
| 242 | return &serial_hwuart_device; |
| 243 | #elif CONFIG_CONS_INDEX == 2 |
| 244 | return &serial_stuart_device; |
| 245 | #elif CONFIG_CONS_INDEX == 3 |
| 246 | return &serial_ffuart_device; |
| 247 | #elif CONFIG_CONS_INDEX == 4 |
| 248 | return &serial_btuart_device; |
| 249 | #else |
| 250 | #error "Bad CONFIG_CONS_INDEX." |
| 251 | #endif |
| 252 | } |
Marek Vasut | f344201 | 2012-09-12 13:57:58 +0200 | [diff] [blame] | 253 | |
| 254 | void pxa_serial_initialize(void) |
| 255 | { |
| 256 | #if defined(CONFIG_FFUART) |
| 257 | serial_register(&serial_ffuart_device); |
| 258 | #endif |
| 259 | #if defined(CONFIG_BTUART) |
| 260 | serial_register(&serial_btuart_device); |
| 261 | #endif |
| 262 | #if defined(CONFIG_STUART) |
| 263 | serial_register(&serial_stuart_device); |
| 264 | #endif |
| 265 | } |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 266 | #endif /* CONFIG_DM_SERIAL */ |
| 267 | |
| 268 | #ifdef CONFIG_DM_SERIAL |
| 269 | static int pxa_serial_probe(struct udevice *dev) |
| 270 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 271 | struct pxa_serial_plat *plat = dev_get_plat(dev); |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 272 | |
| 273 | pxa_setbrg_common((struct pxa_uart_regs *)plat->base, plat->port, |
| 274 | plat->baudrate); |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | static int pxa_serial_putc(struct udevice *dev, const char ch) |
| 279 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 280 | struct pxa_serial_plat *plat = dev_get_plat(dev); |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 281 | struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; |
| 282 | |
| 283 | /* Wait for last character to go. */ |
| 284 | if (!(readl(&uart_regs->lsr) & LSR_TEMT)) |
| 285 | return -EAGAIN; |
| 286 | |
| 287 | writel(ch, &uart_regs->thr); |
| 288 | |
| 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | static int pxa_serial_getc(struct udevice *dev) |
| 293 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 294 | struct pxa_serial_plat *plat = dev_get_plat(dev); |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 295 | struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; |
| 296 | |
| 297 | /* Wait for a character to arrive. */ |
| 298 | if (!(readl(&uart_regs->lsr) & LSR_DR)) |
| 299 | return -EAGAIN; |
| 300 | |
| 301 | return readl(&uart_regs->rbr) & 0xff; |
| 302 | } |
| 303 | |
| 304 | int pxa_serial_setbrg(struct udevice *dev, int baudrate) |
| 305 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 306 | struct pxa_serial_plat *plat = dev_get_plat(dev); |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 307 | struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; |
| 308 | int port = plat->port; |
| 309 | |
| 310 | pxa_setbrg_common(uart_regs, port, baudrate); |
| 311 | |
| 312 | return 0; |
| 313 | } |
| 314 | |
| 315 | static int pxa_serial_pending(struct udevice *dev, bool input) |
| 316 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 317 | struct pxa_serial_plat *plat = dev_get_plat(dev); |
Marcel Ziswiler | 90392d0 | 2016-11-14 21:40:26 +0100 | [diff] [blame] | 318 | struct pxa_uart_regs *uart_regs = (struct pxa_uart_regs *)plat->base; |
| 319 | |
| 320 | if (input) |
| 321 | return readl(&uart_regs->lsr) & LSR_DR ? 1 : 0; |
| 322 | else |
| 323 | return readl(&uart_regs->lsr) & LSR_TEMT ? 0 : 1; |
| 324 | |
| 325 | return 0; |
| 326 | } |
| 327 | |
| 328 | static const struct dm_serial_ops pxa_serial_ops = { |
| 329 | .putc = pxa_serial_putc, |
| 330 | .pending = pxa_serial_pending, |
| 331 | .getc = pxa_serial_getc, |
| 332 | .setbrg = pxa_serial_setbrg, |
| 333 | }; |
| 334 | |
| 335 | U_BOOT_DRIVER(serial_pxa) = { |
| 336 | .name = "serial_pxa", |
| 337 | .id = UCLASS_SERIAL, |
| 338 | .probe = pxa_serial_probe, |
| 339 | .ops = &pxa_serial_ops, |
| 340 | .flags = DM_FLAG_PRE_RELOC, |
| 341 | }; |
| 342 | #endif /* CONFIG_DM_SERIAL */ |