| developer | 15dd2c8 | 2022-09-09 19:59:16 +0800 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Configuration for MediaTek MT7981 SoC |
| 4 | * |
| 5 | * Copyright (C) 2022 MediaTek Inc. |
| 6 | * Author: Sam Shih <sam.shih@mediatek.com> |
| 7 | */ |
| 8 | |
| 9 | #ifndef __MT7981_H |
| 10 | #define __MT7981_H |
| 11 | |
| developer | 15dd2c8 | 2022-09-09 19:59:16 +0800 | [diff] [blame] | 12 | /* Uboot definition */ |
| Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 13 | #define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE |
| developer | 15dd2c8 | 2022-09-09 19:59:16 +0800 | [diff] [blame] | 14 | |
| 15 | /* SPL -> Uboot */ |
| Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 16 | #define CFG_SYS_UBOOT_START CONFIG_TEXT_BASE |
| developer | 15dd2c8 | 2022-09-09 19:59:16 +0800 | [diff] [blame] | 17 | |
| 18 | /* DRAM */ |
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 19 | #define CFG_SYS_SDRAM_BASE 0x40000000 |
| developer | 15dd2c8 | 2022-09-09 19:59:16 +0800 | [diff] [blame] | 20 | |
| 21 | #endif |