blob: 06f9a5ede032d2927fb938e1e266ea6a0f06becb [file] [log] [blame]
TsiChungLiew5b8943a2008-01-15 14:02:49 -06001/*
2 * (C) Copyright 2000-2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Alison Wang027f76f2012-03-26 21:49:07 +00005 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew5b8943a2008-01-15 14:02:49 -06006 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
TsiChungLiew5b8943a2008-01-15 14:02:49 -06009 */
10
11#include <config.h>
12#include <common.h>
13#include <pci.h>
14#include <asm/immap.h>
Alison Wang027f76f2012-03-26 21:49:07 +000015#include <asm/io.h>
TsiChungLiew5b8943a2008-01-15 14:02:49 -060016
17DECLARE_GLOBAL_DATA_PTR;
18
19int checkboard(void)
20{
21 puts("Board: ");
22 puts("Freescale FireEngine 5485 EVB\n");
23 return 0;
24};
25
Simon Glassb4de3f32017-03-31 08:40:24 -060026phys_size_t initdram(void)
TsiChungLiew5b8943a2008-01-15 14:02:49 -060027{
Alison Wang027f76f2012-03-26 21:49:07 +000028 siu_t *siu = (siu_t *) (MMAP_SIU);
29 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060030 u32 dramsize, i;
stany MARCELfba93142011-10-14 04:38:06 +000031#ifdef CONFIG_SYS_DRAMSZ1
32 u32 temp;
33#endif
TsiChungLiew5b8943a2008-01-15 14:02:49 -060034
Alison Wang027f76f2012-03-26 21:49:07 +000035 out_be32(&siu->drv, CONFIG_SYS_SDRAM_DRVSTRENGTH);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060036
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020037 dramsize = CONFIG_SYS_DRAMSZ * 0x100000;
TsiChungLiew5b8943a2008-01-15 14:02:49 -060038 for (i = 0x13; i < 0x20; i++) {
39 if (dramsize == (1 << i))
40 break;
41 }
42 i--;
Alison Wang027f76f2012-03-26 21:49:07 +000043 out_be32(&siu->cs0cfg, CONFIG_SYS_SDRAM_BASE | i);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060044
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045#ifdef CONFIG_SYS_DRAMSZ1
46 temp = CONFIG_SYS_DRAMSZ1 * 0x100000;
TsiChungLiew5b8943a2008-01-15 14:02:49 -060047 for (i = 0x13; i < 0x20; i++) {
48 if (temp == (1 << i))
49 break;
50 }
51 i--;
52 dramsize += temp;
Alison Wang027f76f2012-03-26 21:49:07 +000053 out_be32(&siu->cs1cfg, (CONFIG_SYS_SDRAM_BASE + temp) | i);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060054#endif
55
Alison Wang027f76f2012-03-26 21:49:07 +000056 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1);
57 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060058
59 /* Issue PALL */
Alison Wang027f76f2012-03-26 21:49:07 +000060 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060061
62 /* Issue LEMR */
Alison Wang027f76f2012-03-26 21:49:07 +000063 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD);
64 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060065
66 udelay(500);
67
68 /* Issue PALL */
Alison Wang027f76f2012-03-26 21:49:07 +000069 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060070
71 /* Perform two refresh cycles */
Alison Wang027f76f2012-03-26 21:49:07 +000072 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
73 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060074
Alison Wang027f76f2012-03-26 21:49:07 +000075 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060076
Alison Wang027f76f2012-03-26 21:49:07 +000077 out_be32(&sdram->ctrl,
78 (CONFIG_SYS_SDRAM_CTRL & ~0x80000000) | 0x10000F00);
TsiChungLiew5b8943a2008-01-15 14:02:49 -060079
80 udelay(100);
81
82 return dramsize;
83};
84
85int testdram(void)
86{
87 /* TODO: XXX XXX XXX */
88 printf("DRAM test not implemented!\n");
89
90 return (0);
91}
92
93#if defined(CONFIG_PCI)
94/*
95 * Initialize PCI devices, report devices found.
96 */
97static struct pci_controller hose;
98extern void pci_mcf547x_8x_init(struct pci_controller *hose);
99
100void pci_init_board(void)
101{
102 pci_mcf547x_8x_init(&hose);
103}
104#endif /* CONFIG_PCI */