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git01.mediatek.com / filogic / uboot / a44c84ef1973e64bbe0a63ac7fca9c46faf77d4a / . / include / configs / k2hk_evm.h
blob: 9d0ba248cf8731d44aa276cffb1c23a16f30aaf8 [file] [log] [blame]
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -0400[diff] [blame]1/*
2 * Configuration header file for TI's k2hk-evm
3 *
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_K2HK_EVM_H
11#define __CONFIG_K2HK_EVM_H
12
13/* Platform type */
14#define CONFIG_SOC_K2HK
15#define CONFIG_K2HK_EVM
16
17/* U-Boot Build Configuration */
18#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
19#define CONFIG_SYS_NO_FLASH /* that is, no *NOR* flash */
20#define CONFIG_SYS_CONSOLE_INFO_QUIET
21#define CONFIG_BOARD_EARLY_INIT_F
22#define CONFIG_SYS_THUMB_BUILD
23
24/* SoC Configuration */
25#define CONFIG_ARMV7
26#define CONFIG_ARCH_CPU_INIT
27#define CONFIG_SYS_ARCH_TIMER
28#define CONFIG_SYS_HZ 1000
29#define CONFIG_SYS_TEXT_BASE 0x0c001000
30#define CONFIG_SPL_TARGET "u-boot-spi.gph"
31#define CONFIG_SYS_DCACHE_OFF
32
33/* Memory Configuration */
34#define CONFIG_NR_DRAM_BANKS 2
35#define CONFIG_SYS_SDRAM_BASE 0x80000000
36#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
37#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
38#define CONFIG_STACKSIZE (512 << 10) /* 512 KiB */
39#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* 4 MiB */
40#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - \
41 GENERATED_GBL_DATA_SIZE)
42
43/* SPL SPI Loader Configuration */
44#define CONFIG_SPL_TEXT_BASE 0x0c200000
45#define CONFIG_SPL_PAD_TO 65536
46#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
47#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
48 CONFIG_SPL_MAX_SIZE)
49#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
50#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
51 CONFIG_SPL_BSS_MAX_SIZE)
52#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
53#define CONFIG_SPL_STACK_SIZE (8 * 1024)
54#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
55 CONFIG_SYS_SPL_MALLOC_SIZE + \
56 CONFIG_SPL_STACK_SIZE - 4)
57#define CONFIG_SPL_LIBCOMMON_SUPPORT
58#define CONFIG_SPL_LIBGENERIC_SUPPORT
59#define CONFIG_SPL_SERIAL_SUPPORT
60#define CONFIG_SPL_SPI_FLASH_SUPPORT
61#define CONFIG_SPL_SPI_SUPPORT
62#define CONFIG_SPL_BOARD_INIT
63#define CONFIG_SPL_SPI_LOAD
64#define CONFIG_SPL_SPI_BUS 0
65#define CONFIG_SPL_SPI_CS 0
66#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
67#define CONFIG_SPL_FRAMEWORK
68
69/* UART Configuration */
70#define CONFIG_SYS_NS16550
71#define CONFIG_SYS_NS16550_SERIAL
72#define CONFIG_SYS_NS16550_MEM32
73#define CONFIG_SYS_NS16550_REG_SIZE -4
74#define CONFIG_SYS_NS16550_COM1 K2HK_UART0_BASE
75#define CONFIG_SYS_NS16550_CLK clk_get_rate(K2HK_CLK1_6)
76#define CONFIG_CONS_INDEX 1
77#define CONFIG_BAUDRATE 115200
78
79/* SPI Configuration */
80#define CONFIG_SPI
81#define CONFIG_SPI_FLASH
82#define CONFIG_SPI_FLASH_STMICRO
83#define CONFIG_DAVINCI_SPI
84#define CONFIG_SYS_SPI_BASE K2HK_SPI_BASE
85#define CONFIG_SYS_SPI_CLK clk_get_rate(K2HK_LPSC_EMIF25_SPI)
86#define CONFIG_SF_DEFAULT_SPEED 30000000
87#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
88
89/* I2C Configuration */
90#define CONFIG_SYS_I2C
91#define CONFIG_SYS_I2C_DAVINCI
92#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
93#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
94#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
95#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
96#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
97#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
98#define I2C_BUS_MAX 3
99
100/* EEPROM definitions */
101#define CONFIG_SYS_I2C_MULTI_EEPROMS
102#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
103#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
104#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
105#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
106#define CONFIG_ENV_EEPROM_IS_ON_I2C
107
108/* NAND Configuration */
109#define CONFIG_NAND_DAVINCI
110#define CONFIG_SYS_NAND_CS 2
111#define CONFIG_SYS_NAND_USE_FLASH_BBT
112#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
113#define CONFIG_SYS_NAND_PAGE_2K
114
115#define CONFIG_SYS_NAND_LARGEPAGE
116#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
117#define CONFIG_SYS_MAX_NAND_DEVICE 1
118#define CONFIG_SYS_NAND_MAX_CHIPS 1
119#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
120#define CONFIG_ENV_SIZE (256 << 10) /* 256 KiB */
121#define CONFIG_ENV_IS_IN_NAND
122#define CONFIG_ENV_OFFSET 0x100000
123#define CONFIG_MTD_PARTITIONS
124#define CONFIG_MTD_DEVICE
125#define CONFIG_RBTREE
126#define CONFIG_LZO
127#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
128 "1024k(bootloader)ro,512k(params)ro," \
129 "-(ubifs)"
130/* U-Boot command configuration */
131#include <config_cmd_default.h>
132#define CONFIG_CMD_ASKENV
133#define CONFIG_CMD_DHCP
134#define CONFIG_CMD_I2C
135#define CONFIG_CMD_PING
136#define CONFIG_CMD_SAVES
137#define CONFIG_CMD_MTDPARTS
138#define CONFIG_CMD_NAND
139#define CONFIG_CMD_UBI
140#define CONFIG_CMD_UBIFS
141#define CONFIG_CMD_SF
142#define CONFIG_CMD_EEPROM
143
144/* U-Boot general configuration */
145#define CONFIG_SYS_PROMPT "K2HK EVM # "
146#define CONFIG_SYS_CBSIZE 1024
147#define CONFIG_SYS_PBSIZE 2048
148#define CONFIG_SYS_MAXARGS 16
149#define CONFIG_SYS_HUSH_PARSER
150#define CONFIG_SYS_LONGHELP
151#define CONFIG_CRC32_VERIFY
152#define CONFIG_MX_CYCLIC
153#define CONFIG_CMDLINE_EDITING
154#define CONFIG_VERSION_VARIABLE
155#define CONFIG_TIMESTAMP
156
157#define CONFIG_BOOTDELAY 3
158#define CONFIG_BOOTFILE "uImage"
159#define CONFIG_EXTRA_ENV_SETTINGS \
160 "boot=ramfs\0" \
161 "tftp_root=/\0" \
162 "nfs_root=/export\0" \
163 "mem_lpae=1\0" \
164 "mem_reserve=512M\0" \
165 "addr_fdt=0x87000000\0" \
166 "addr_kern=0x88000000\0" \
167 "addr_mon=0x0c5f0000\0" \
168 "addr_uboot=0x87000000\0" \
169 "addr_fs=0x82000000\0" \
170 "addr_ubi=0x82000000\0" \
171 "fdt_high=0xffffffff\0" \
172 "run_mon=mon_install ${addr_mon}\0" \
173 "run_kern=bootm ${addr_kern} - ${addr_fdt}\0" \
174 "init_ubi=run args_all args_ubi; " \
175 "ubi part ubifs; ubifsmount boot\0" \
176 "get_fdt_ubi=ubifsload ${addr_fdt} ${name_fdt}\0" \
177 "get_kern_ubi=ubifsload ${addr_kern} ${name_kern}\0" \
178 "get_mon_ubi=ubifsload ${addr_mon} ${name_mon}\0" \
179 "burn_uboot=sf probe; sf erase 0 0x100000; " \
180 "sf write ${addr_uboot} 0 ${filesize}\0" \
181 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1\0" \
182 "args_ubi=setenv bootargs ${bootargs} rootfstype=ubifs " \
183 "root=ubi0:rootfs rootflags=sync rw ubi.mtd=2,2048\0" \
184 "burn_ubi=nand erase.part ubifs; " \
185 "nand write ${addr_ubi} ubifs ${filesize}\0" \
186 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
187 "args_ramfs=setenv bootargs ${bootargs} earlyprintk " \
188 "rdinit=/sbin/init rw root=/dev/ram0 " \
189 "initrd=0x802000000,9M\0" \
190 "mtdparts=mtdparts=davinci_nand.0:" \
191 "1024k(bootloader)ro,512k(params)ro,522752k(ubifs)\0"
192#define CONFIG_BOOTCOMMAND \
193 "run init_${boot} get_fdt_${boot} get_mon_${boot} " \
194 "get_kern_${boot} run_mon run_kern"
195#define CONFIG_BOOTARGS \
196
197/* Linux interfacing */
198#define CONFIG_CMDLINE_TAG
199#define CONFIG_SETUP_MEMORY_TAGS
200#define CONFIG_OF_LIBFDT 1
201#define CONFIG_OF_BOARD_SETUP
202#define CONFIG_SYS_BARGSIZE 1024
203#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x08000000)
204
205#define CONFIG_SUPPORT_RAW_INITRD
206
207/* we may include files below only after all above definitions */
208#include <asm/arch/hardware.h>
209#include <asm/arch/clock.h>
210#define CONFIG_SYS_HZ_CLOCK clk_get_rate(K2HK_CLK1_6)
211
212#endif /* __CONFIG_K2HK_EVM_H */