blob: 518992578c1e9156d033d5f12004da5044d4c132 [file] [log] [blame]
Andre Schwarz3f4bd652010-04-01 21:26:55 +02001/*
2 * (C) Copyright 2002
3 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
4 * Keith Outwater, keith_outwater@mvis.com.
5 *
6 * (C) Copyright 2010
7 * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
8 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Andre Schwarz3f4bd652010-04-01 21:26:55 +020010 */
11
12#include <common.h>
13#include <spartan3.h>
14#include <command.h>
15#include <asm/io.h>
16#include "fpga.h"
17#include "mvsmr.h"
18
Michal Simek2091a0c2014-03-13 11:28:42 +010019xilinx_spartan3_slave_serial_fns fpga_fns = {
Andre Schwarz3f4bd652010-04-01 21:26:55 +020020 fpga_pre_config_fn,
21 fpga_pgm_fn,
22 fpga_clk_fn,
23 fpga_init_fn,
24 fpga_done_fn,
25 fpga_wr_fn,
26 0
27};
28
Michal Simek25e1e2e2014-03-13 12:49:21 +010029xilinx_desc spartan3 = {
Michal Simek5206cca2014-03-13 11:23:43 +010030 xilinx_spartan2,
Andre Schwarz3f4bd652010-04-01 21:26:55 +020031 slave_serial,
32 XILINX_XC3S200_SIZE,
33 (void *) &fpga_fns,
34 0,
35};
36
37DECLARE_GLOBAL_DATA_PTR;
38
39int mvsmr_init_fpga(void)
40{
41 fpga_init();
42 fpga_add(fpga_xilinx, &spartan3);
43
44 return 1;
45}
46
47int fpga_init_fn(int cookie)
48{
49 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
50
51 if (in_be32(&gpio->simple_ival) & FPGA_CONFIG)
52 return 0;
53
54 return 1;
55}
56
57int fpga_done_fn(int cookie)
58{
59 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
60 int result = 0;
61
62 udelay(10);
63 if (in_be32(&gpio->simple_ival) & FPGA_DONE)
64 result = 1;
65
66 return result;
67}
68
69int fpga_pgm_fn(int assert, int flush, int cookie)
70{
71 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
72
73 if (!assert)
74 setbits_8(&gpio->sint_dvo, FPGA_STATUS);
75 else
76 clrbits_8(&gpio->sint_dvo, FPGA_STATUS);
77
78 return assert;
79}
80
81int fpga_clk_fn(int assert_clk, int flush, int cookie)
82{
83 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
84
85 if (assert_clk)
86 setbits_be32(&gpio->simple_dvo, FPGA_CCLK);
87 else
88 clrbits_be32(&gpio->simple_dvo, FPGA_CCLK);
89
90 return assert_clk;
91}
92
93int fpga_wr_fn(int assert_write, int flush, int cookie)
94{
95 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
96
97 if (assert_write)
98 setbits_be32(&gpio->simple_dvo, FPGA_DIN);
99 else
100 clrbits_be32(&gpio->simple_dvo, FPGA_DIN);
101
102 return assert_write;
103}
104
105int fpga_pre_config_fn(int cookie)
106{
107 struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
108
109 setbits_8(&gpio->sint_dvo, FPGA_STATUS);
110
111 return 0;
112}