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git01.mediatek.com / filogic / uboot / 38b5c393ab57a4dee13e04d0d84c1046f3c91987 / . / arch / arm / dts / imx8mm-venice-u-boot.dtsi
blob: 8337c4aea8077e0fc2c9f5bb55aeb50da547149e [file] [log] [blame]
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2021 Gateworks Corporation
4 */
5
Jagan Teki73d51182021-04-26 18:23:46 +0530[diff] [blame]6#include "imx8mm-u-boot.dtsi"
7
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]8/ {
9 wdt-reboot {
10 compatible = "wdt-reboot";
11 wdt = <&wdog1>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]12 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]13 };
14};
15
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]16&gpio1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]17 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]18};
19
20&gpio2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]21 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]22};
23
24&gpio3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]25 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]26};
27
28&gpio4 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]29 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]30};
31
32&gpio5 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]33 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]34};
35
36&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]37 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]38};
39
40&pinctrl_uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]41 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]42};
43
44&usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]45 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]46};
47
48&pinctrl_usdhc3 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]49 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]50};
51
52&i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]53 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]54};
55
56&pinctrl_i2c1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]57 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]58};
59
Tim Harvey2ccf28d2022-11-11 08:03:07 -0800[diff] [blame]60&pinctrl_i2c1_gpio {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]61 bootph-pre-ram;
Tim Harvey2ccf28d2022-11-11 08:03:07 -0800[diff] [blame]62};
63
Tim Harveyd4daeaa2022-04-13 08:56:40 -0700[diff] [blame]64&gsc {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]65 bootph-pre-ram;
Tim Harveyd4daeaa2022-04-13 08:56:40 -0700[diff] [blame]66};
67
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]68&i2c2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]69 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]70};
71
72&pinctrl_i2c2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]73 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]74};
75
76&wdog1 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]77 bootph-pre-ram;
Tim Harvey256dba02021-03-02 14:00:21 -0800[diff] [blame]78};
Peng Fan8cf3c8e2022-06-11 20:21:05 +0800[diff] [blame]79
80&pinctrl_wdog {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]81 bootph-pre-ram;
Peng Fan8cf3c8e2022-06-11 20:21:05 +0800[diff] [blame]82};