Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 2 | /* |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 3 | * Device Tree Source for the R-Car M3-W (R8A77960) SoC |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 4 | * |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 5 | * Copyright (C) 2016-2017 Renesas Electronics Corp. |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <dt-bindings/clock/r8a7796-cpg-mssr.h> |
| 9 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 10 | #include <dt-bindings/power/r8a7796-sysc.h> |
| 11 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 12 | #define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 |
| 13 | |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 14 | / { |
| 15 | compatible = "renesas,r8a7796"; |
| 16 | #address-cells = <2>; |
| 17 | #size-cells = <2>; |
| 18 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 19 | /* |
| 20 | * The external audio clocks are configured as 0 Hz fixed frequency |
| 21 | * clocks by default. |
| 22 | * Boards that provide audio clocks should override them. |
| 23 | */ |
| 24 | audio_clk_a: audio_clk_a { |
| 25 | compatible = "fixed-clock"; |
| 26 | #clock-cells = <0>; |
| 27 | clock-frequency = <0>; |
| 28 | }; |
| 29 | |
| 30 | audio_clk_b: audio_clk_b { |
| 31 | compatible = "fixed-clock"; |
| 32 | #clock-cells = <0>; |
| 33 | clock-frequency = <0>; |
| 34 | }; |
| 35 | |
| 36 | audio_clk_c: audio_clk_c { |
| 37 | compatible = "fixed-clock"; |
| 38 | #clock-cells = <0>; |
| 39 | clock-frequency = <0>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 40 | }; |
| 41 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 42 | /* External CAN clock - to be overridden by boards that provide it */ |
| 43 | can_clk: can { |
| 44 | compatible = "fixed-clock"; |
| 45 | #clock-cells = <0>; |
| 46 | clock-frequency = <0>; |
| 47 | }; |
| 48 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 49 | cluster0_opp: opp-table-0 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 50 | compatible = "operating-points-v2"; |
| 51 | opp-shared; |
| 52 | |
| 53 | opp-500000000 { |
| 54 | opp-hz = /bits/ 64 <500000000>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 55 | opp-microvolt = <830000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 56 | clock-latency-ns = <300000>; |
| 57 | }; |
| 58 | opp-1000000000 { |
| 59 | opp-hz = /bits/ 64 <1000000000>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 60 | opp-microvolt = <830000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 61 | clock-latency-ns = <300000>; |
| 62 | }; |
| 63 | opp-1500000000 { |
| 64 | opp-hz = /bits/ 64 <1500000000>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 65 | opp-microvolt = <830000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 66 | clock-latency-ns = <300000>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 67 | opp-suspend; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 68 | }; |
| 69 | opp-1600000000 { |
| 70 | opp-hz = /bits/ 64 <1600000000>; |
| 71 | opp-microvolt = <900000>; |
| 72 | clock-latency-ns = <300000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 73 | }; |
| 74 | opp-1700000000 { |
| 75 | opp-hz = /bits/ 64 <1700000000>; |
| 76 | opp-microvolt = <900000>; |
| 77 | clock-latency-ns = <300000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 78 | }; |
| 79 | opp-1800000000 { |
| 80 | opp-hz = /bits/ 64 <1800000000>; |
| 81 | opp-microvolt = <960000>; |
| 82 | clock-latency-ns = <300000>; |
| 83 | turbo-mode; |
| 84 | }; |
| 85 | }; |
| 86 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 87 | cluster1_opp: opp-table-1 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 88 | compatible = "operating-points-v2"; |
| 89 | opp-shared; |
| 90 | |
| 91 | opp-800000000 { |
| 92 | opp-hz = /bits/ 64 <800000000>; |
| 93 | opp-microvolt = <820000>; |
| 94 | clock-latency-ns = <300000>; |
| 95 | }; |
| 96 | opp-1000000000 { |
| 97 | opp-hz = /bits/ 64 <1000000000>; |
| 98 | opp-microvolt = <820000>; |
| 99 | clock-latency-ns = <300000>; |
| 100 | }; |
| 101 | opp-1200000000 { |
| 102 | opp-hz = /bits/ 64 <1200000000>; |
| 103 | opp-microvolt = <820000>; |
| 104 | clock-latency-ns = <300000>; |
| 105 | }; |
| 106 | opp-1300000000 { |
| 107 | opp-hz = /bits/ 64 <1300000000>; |
| 108 | opp-microvolt = <820000>; |
| 109 | clock-latency-ns = <300000>; |
| 110 | turbo-mode; |
| 111 | }; |
| 112 | }; |
| 113 | |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 114 | cpus { |
| 115 | #address-cells = <1>; |
| 116 | #size-cells = <0>; |
| 117 | |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 118 | cpu-map { |
| 119 | cluster0 { |
| 120 | core0 { |
| 121 | cpu = <&a57_0>; |
| 122 | }; |
| 123 | core1 { |
| 124 | cpu = <&a57_1>; |
| 125 | }; |
| 126 | }; |
| 127 | |
| 128 | cluster1 { |
| 129 | core0 { |
| 130 | cpu = <&a53_0>; |
| 131 | }; |
| 132 | core1 { |
| 133 | cpu = <&a53_1>; |
| 134 | }; |
| 135 | core2 { |
| 136 | cpu = <&a53_2>; |
| 137 | }; |
| 138 | core3 { |
| 139 | cpu = <&a53_3>; |
| 140 | }; |
| 141 | }; |
| 142 | }; |
| 143 | |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 144 | a57_0: cpu@0 { |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 145 | compatible = "arm,cortex-a57"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 146 | reg = <0x0>; |
| 147 | device_type = "cpu"; |
| 148 | power-domains = <&sysc R8A7796_PD_CA57_CPU0>; |
| 149 | next-level-cache = <&L2_CA57>; |
| 150 | enable-method = "psci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 151 | cpu-idle-states = <&CPU_SLEEP_0>; |
| 152 | dynamic-power-coefficient = <854>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 153 | clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 154 | operating-points-v2 = <&cluster0_opp>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 155 | capacity-dmips-mhz = <1024>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 156 | #cooling-cells = <2>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 157 | }; |
| 158 | |
| 159 | a57_1: cpu@1 { |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 160 | compatible = "arm,cortex-a57"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 161 | reg = <0x1>; |
| 162 | device_type = "cpu"; |
| 163 | power-domains = <&sysc R8A7796_PD_CA57_CPU1>; |
| 164 | next-level-cache = <&L2_CA57>; |
| 165 | enable-method = "psci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 166 | cpu-idle-states = <&CPU_SLEEP_0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 167 | clocks = <&cpg CPG_CORE R8A7796_CLK_Z>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 168 | operating-points-v2 = <&cluster0_opp>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 169 | capacity-dmips-mhz = <1024>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 170 | #cooling-cells = <2>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 171 | }; |
| 172 | |
| 173 | a53_0: cpu@100 { |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 174 | compatible = "arm,cortex-a53"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 175 | reg = <0x100>; |
| 176 | device_type = "cpu"; |
| 177 | power-domains = <&sysc R8A7796_PD_CA53_CPU0>; |
| 178 | next-level-cache = <&L2_CA53>; |
| 179 | enable-method = "psci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 180 | cpu-idle-states = <&CPU_SLEEP_1>; |
| 181 | #cooling-cells = <2>; |
| 182 | dynamic-power-coefficient = <277>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 183 | clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 184 | operating-points-v2 = <&cluster1_opp>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 185 | capacity-dmips-mhz = <535>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 186 | }; |
| 187 | |
| 188 | a53_1: cpu@101 { |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 189 | compatible = "arm,cortex-a53"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 190 | reg = <0x101>; |
| 191 | device_type = "cpu"; |
| 192 | power-domains = <&sysc R8A7796_PD_CA53_CPU1>; |
| 193 | next-level-cache = <&L2_CA53>; |
| 194 | enable-method = "psci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 195 | cpu-idle-states = <&CPU_SLEEP_1>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 196 | clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 197 | operating-points-v2 = <&cluster1_opp>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 198 | capacity-dmips-mhz = <535>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 199 | }; |
| 200 | |
| 201 | a53_2: cpu@102 { |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 202 | compatible = "arm,cortex-a53"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 203 | reg = <0x102>; |
| 204 | device_type = "cpu"; |
| 205 | power-domains = <&sysc R8A7796_PD_CA53_CPU2>; |
| 206 | next-level-cache = <&L2_CA53>; |
| 207 | enable-method = "psci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 208 | cpu-idle-states = <&CPU_SLEEP_1>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 209 | clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 210 | operating-points-v2 = <&cluster1_opp>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 211 | capacity-dmips-mhz = <535>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 212 | }; |
| 213 | |
| 214 | a53_3: cpu@103 { |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 215 | compatible = "arm,cortex-a53"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 216 | reg = <0x103>; |
| 217 | device_type = "cpu"; |
| 218 | power-domains = <&sysc R8A7796_PD_CA53_CPU3>; |
| 219 | next-level-cache = <&L2_CA53>; |
| 220 | enable-method = "psci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 221 | cpu-idle-states = <&CPU_SLEEP_1>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 222 | clocks = <&cpg CPG_CORE R8A7796_CLK_Z2>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 223 | operating-points-v2 = <&cluster1_opp>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 224 | capacity-dmips-mhz = <535>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 225 | }; |
| 226 | |
| 227 | L2_CA57: cache-controller-0 { |
| 228 | compatible = "cache"; |
| 229 | power-domains = <&sysc R8A7796_PD_CA57_SCU>; |
| 230 | cache-unified; |
| 231 | cache-level = <2>; |
| 232 | }; |
| 233 | |
| 234 | L2_CA53: cache-controller-1 { |
| 235 | compatible = "cache"; |
| 236 | power-domains = <&sysc R8A7796_PD_CA53_SCU>; |
| 237 | cache-unified; |
| 238 | cache-level = <2>; |
| 239 | }; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 240 | |
| 241 | idle-states { |
| 242 | entry-method = "psci"; |
| 243 | |
| 244 | CPU_SLEEP_0: cpu-sleep-0 { |
| 245 | compatible = "arm,idle-state"; |
| 246 | arm,psci-suspend-param = <0x0010000>; |
| 247 | local-timer-stop; |
| 248 | entry-latency-us = <400>; |
| 249 | exit-latency-us = <500>; |
| 250 | min-residency-us = <4000>; |
| 251 | }; |
| 252 | |
| 253 | CPU_SLEEP_1: cpu-sleep-1 { |
| 254 | compatible = "arm,idle-state"; |
| 255 | arm,psci-suspend-param = <0x0010000>; |
| 256 | local-timer-stop; |
| 257 | entry-latency-us = <700>; |
| 258 | exit-latency-us = <700>; |
| 259 | min-residency-us = <5000>; |
| 260 | }; |
| 261 | }; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 262 | }; |
| 263 | |
| 264 | extal_clk: extal { |
| 265 | compatible = "fixed-clock"; |
| 266 | #clock-cells = <0>; |
| 267 | /* This value must be overridden by the board */ |
| 268 | clock-frequency = <0>; |
| 269 | }; |
| 270 | |
| 271 | extalr_clk: extalr { |
| 272 | compatible = "fixed-clock"; |
| 273 | #clock-cells = <0>; |
| 274 | /* This value must be overridden by the board */ |
| 275 | clock-frequency = <0>; |
| 276 | }; |
| 277 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 278 | /* External PCIe clock - can be overridden by the board */ |
| 279 | pcie_bus_clk: pcie_bus { |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 280 | compatible = "fixed-clock"; |
| 281 | #clock-cells = <0>; |
| 282 | clock-frequency = <0>; |
| 283 | }; |
| 284 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 285 | pmu_a53 { |
| 286 | compatible = "arm,cortex-a53-pmu"; |
| 287 | interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, |
| 288 | <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, |
| 289 | <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, |
| 290 | <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; |
| 291 | interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 292 | }; |
| 293 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 294 | pmu_a57 { |
| 295 | compatible = "arm,cortex-a57-pmu"; |
| 296 | interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, |
| 297 | <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
| 298 | interrupt-affinity = <&a57_0>, <&a57_1>; |
| 299 | }; |
| 300 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 301 | psci { |
| 302 | compatible = "arm,psci-1.0", "arm,psci-0.2"; |
| 303 | method = "smc"; |
| 304 | }; |
| 305 | |
| 306 | /* External SCIF clock - to be overridden by boards that provide it */ |
| 307 | scif_clk: scif { |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 308 | compatible = "fixed-clock"; |
| 309 | #clock-cells = <0>; |
| 310 | clock-frequency = <0>; |
| 311 | }; |
| 312 | |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 313 | soc { |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 314 | compatible = "simple-bus"; |
| 315 | interrupt-parent = <&gic>; |
| 316 | #address-cells = <2>; |
| 317 | #size-cells = <2>; |
| 318 | ranges; |
| 319 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 320 | rwdt: watchdog@e6020000 { |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 321 | compatible = "renesas,r8a7796-wdt", |
| 322 | "renesas,rcar-gen3-wdt"; |
| 323 | reg = <0 0xe6020000 0 0x0c>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 324 | interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 325 | clocks = <&cpg CPG_MOD 402>; |
| 326 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 327 | resets = <&cpg 402>; |
| 328 | status = "disabled"; |
| 329 | }; |
| 330 | |
| 331 | gpio0: gpio@e6050000 { |
| 332 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 333 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 334 | reg = <0 0xe6050000 0 0x50>; |
| 335 | interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; |
| 336 | #gpio-cells = <2>; |
| 337 | gpio-controller; |
| 338 | gpio-ranges = <&pfc 0 0 16>; |
| 339 | #interrupt-cells = <2>; |
| 340 | interrupt-controller; |
| 341 | clocks = <&cpg CPG_MOD 912>; |
| 342 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 343 | resets = <&cpg 912>; |
| 344 | }; |
| 345 | |
| 346 | gpio1: gpio@e6051000 { |
| 347 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 348 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 349 | reg = <0 0xe6051000 0 0x50>; |
| 350 | interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; |
| 351 | #gpio-cells = <2>; |
| 352 | gpio-controller; |
| 353 | gpio-ranges = <&pfc 0 32 29>; |
| 354 | #interrupt-cells = <2>; |
| 355 | interrupt-controller; |
| 356 | clocks = <&cpg CPG_MOD 911>; |
| 357 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 358 | resets = <&cpg 911>; |
| 359 | }; |
| 360 | |
| 361 | gpio2: gpio@e6052000 { |
| 362 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 363 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 364 | reg = <0 0xe6052000 0 0x50>; |
| 365 | interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; |
| 366 | #gpio-cells = <2>; |
| 367 | gpio-controller; |
| 368 | gpio-ranges = <&pfc 0 64 15>; |
| 369 | #interrupt-cells = <2>; |
| 370 | interrupt-controller; |
| 371 | clocks = <&cpg CPG_MOD 910>; |
| 372 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 373 | resets = <&cpg 910>; |
| 374 | }; |
| 375 | |
| 376 | gpio3: gpio@e6053000 { |
| 377 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 378 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 379 | reg = <0 0xe6053000 0 0x50>; |
| 380 | interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; |
| 381 | #gpio-cells = <2>; |
| 382 | gpio-controller; |
| 383 | gpio-ranges = <&pfc 0 96 16>; |
| 384 | #interrupt-cells = <2>; |
| 385 | interrupt-controller; |
| 386 | clocks = <&cpg CPG_MOD 909>; |
| 387 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 388 | resets = <&cpg 909>; |
| 389 | }; |
| 390 | |
| 391 | gpio4: gpio@e6054000 { |
| 392 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 393 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 394 | reg = <0 0xe6054000 0 0x50>; |
| 395 | interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; |
| 396 | #gpio-cells = <2>; |
| 397 | gpio-controller; |
| 398 | gpio-ranges = <&pfc 0 128 18>; |
| 399 | #interrupt-cells = <2>; |
| 400 | interrupt-controller; |
| 401 | clocks = <&cpg CPG_MOD 908>; |
| 402 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 403 | resets = <&cpg 908>; |
| 404 | }; |
| 405 | |
| 406 | gpio5: gpio@e6055000 { |
| 407 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 408 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 409 | reg = <0 0xe6055000 0 0x50>; |
| 410 | interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; |
| 411 | #gpio-cells = <2>; |
| 412 | gpio-controller; |
| 413 | gpio-ranges = <&pfc 0 160 26>; |
| 414 | #interrupt-cells = <2>; |
| 415 | interrupt-controller; |
| 416 | clocks = <&cpg CPG_MOD 907>; |
| 417 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 418 | resets = <&cpg 907>; |
| 419 | }; |
| 420 | |
| 421 | gpio6: gpio@e6055400 { |
| 422 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 423 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 424 | reg = <0 0xe6055400 0 0x50>; |
| 425 | interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; |
| 426 | #gpio-cells = <2>; |
| 427 | gpio-controller; |
| 428 | gpio-ranges = <&pfc 0 192 32>; |
| 429 | #interrupt-cells = <2>; |
| 430 | interrupt-controller; |
| 431 | clocks = <&cpg CPG_MOD 906>; |
| 432 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 433 | resets = <&cpg 906>; |
| 434 | }; |
| 435 | |
| 436 | gpio7: gpio@e6055800 { |
| 437 | compatible = "renesas,gpio-r8a7796", |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 438 | "renesas,rcar-gen3-gpio"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 439 | reg = <0 0xe6055800 0 0x50>; |
| 440 | interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; |
| 441 | #gpio-cells = <2>; |
| 442 | gpio-controller; |
| 443 | gpio-ranges = <&pfc 0 224 4>; |
| 444 | #interrupt-cells = <2>; |
| 445 | interrupt-controller; |
| 446 | clocks = <&cpg CPG_MOD 905>; |
| 447 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 448 | resets = <&cpg 905>; |
| 449 | }; |
| 450 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 451 | pfc: pinctrl@e6060000 { |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 452 | compatible = "renesas,pfc-r8a7796"; |
| 453 | reg = <0 0xe6060000 0 0x50c>; |
| 454 | }; |
| 455 | |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 456 | cmt0: timer@e60f0000 { |
| 457 | compatible = "renesas,r8a7796-cmt0", |
| 458 | "renesas,rcar-gen3-cmt0"; |
| 459 | reg = <0 0xe60f0000 0 0x1004>; |
| 460 | interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |
| 461 | <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; |
| 462 | clocks = <&cpg CPG_MOD 303>; |
| 463 | clock-names = "fck"; |
| 464 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 465 | resets = <&cpg 303>; |
| 466 | status = "disabled"; |
| 467 | }; |
| 468 | |
| 469 | cmt1: timer@e6130000 { |
| 470 | compatible = "renesas,r8a7796-cmt1", |
| 471 | "renesas,rcar-gen3-cmt1"; |
| 472 | reg = <0 0xe6130000 0 0x1004>; |
| 473 | interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, |
| 474 | <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, |
| 475 | <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, |
| 476 | <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, |
| 477 | <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, |
| 478 | <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, |
| 479 | <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, |
| 480 | <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; |
| 481 | clocks = <&cpg CPG_MOD 302>; |
| 482 | clock-names = "fck"; |
| 483 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 484 | resets = <&cpg 302>; |
| 485 | status = "disabled"; |
| 486 | }; |
| 487 | |
| 488 | cmt2: timer@e6140000 { |
| 489 | compatible = "renesas,r8a7796-cmt1", |
| 490 | "renesas,rcar-gen3-cmt1"; |
| 491 | reg = <0 0xe6140000 0 0x1004>; |
| 492 | interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, |
| 493 | <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, |
| 494 | <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, |
| 495 | <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, |
| 496 | <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, |
| 497 | <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, |
| 498 | <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, |
| 499 | <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; |
| 500 | clocks = <&cpg CPG_MOD 301>; |
| 501 | clock-names = "fck"; |
| 502 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 503 | resets = <&cpg 301>; |
| 504 | status = "disabled"; |
| 505 | }; |
| 506 | |
| 507 | cmt3: timer@e6148000 { |
| 508 | compatible = "renesas,r8a7796-cmt1", |
| 509 | "renesas,rcar-gen3-cmt1"; |
| 510 | reg = <0 0xe6148000 0 0x1004>; |
| 511 | interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, |
| 512 | <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, |
| 513 | <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, |
| 514 | <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, |
| 515 | <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, |
| 516 | <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, |
| 517 | <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, |
| 518 | <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; |
| 519 | clocks = <&cpg CPG_MOD 300>; |
| 520 | clock-names = "fck"; |
| 521 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 522 | resets = <&cpg 300>; |
| 523 | status = "disabled"; |
| 524 | }; |
| 525 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 526 | cpg: clock-controller@e6150000 { |
| 527 | compatible = "renesas,r8a7796-cpg-mssr"; |
| 528 | reg = <0 0xe6150000 0 0x1000>; |
| 529 | clocks = <&extal_clk>, <&extalr_clk>; |
| 530 | clock-names = "extal", "extalr"; |
| 531 | #clock-cells = <2>; |
| 532 | #power-domain-cells = <0>; |
| 533 | #reset-cells = <1>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 534 | }; |
| 535 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 536 | rst: reset-controller@e6160000 { |
| 537 | compatible = "renesas,r8a7796-rst"; |
| 538 | reg = <0 0xe6160000 0 0x0200>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 539 | }; |
| 540 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 541 | sysc: system-controller@e6180000 { |
| 542 | compatible = "renesas,r8a7796-sysc"; |
| 543 | reg = <0 0xe6180000 0 0x0400>; |
| 544 | #power-domain-cells = <1>; |
| 545 | }; |
| 546 | |
| 547 | tsc: thermal@e6198000 { |
| 548 | compatible = "renesas,r8a7796-thermal"; |
| 549 | reg = <0 0xe6198000 0 0x100>, |
| 550 | <0 0xe61a0000 0 0x100>, |
| 551 | <0 0xe61a8000 0 0x100>; |
| 552 | interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, |
| 553 | <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, |
| 554 | <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; |
| 555 | clocks = <&cpg CPG_MOD 522>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 556 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 557 | resets = <&cpg 522>; |
| 558 | #thermal-sensor-cells = <1>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 559 | }; |
| 560 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 561 | intc_ex: interrupt-controller@e61c0000 { |
| 562 | compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; |
| 563 | #interrupt-cells = <2>; |
| 564 | interrupt-controller; |
| 565 | reg = <0 0xe61c0000 0 0x200>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 566 | interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, |
| 567 | <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, |
| 568 | <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, |
| 569 | <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, |
| 570 | <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, |
| 571 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 572 | clocks = <&cpg CPG_MOD 407>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 573 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 574 | resets = <&cpg 407>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 575 | }; |
| 576 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 577 | tmu0: timer@e61e0000 { |
| 578 | compatible = "renesas,tmu-r8a7796", "renesas,tmu"; |
| 579 | reg = <0 0xe61e0000 0 0x30>; |
| 580 | interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, |
| 581 | <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, |
| 582 | <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; |
| 583 | clocks = <&cpg CPG_MOD 125>; |
| 584 | clock-names = "fck"; |
| 585 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 586 | resets = <&cpg 125>; |
| 587 | status = "disabled"; |
| 588 | }; |
| 589 | |
| 590 | tmu1: timer@e6fc0000 { |
| 591 | compatible = "renesas,tmu-r8a7796", "renesas,tmu"; |
| 592 | reg = <0 0xe6fc0000 0 0x30>; |
| 593 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, |
| 594 | <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, |
| 595 | <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; |
| 596 | clocks = <&cpg CPG_MOD 124>; |
| 597 | clock-names = "fck"; |
| 598 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 599 | resets = <&cpg 124>; |
| 600 | status = "disabled"; |
| 601 | }; |
| 602 | |
| 603 | tmu2: timer@e6fd0000 { |
| 604 | compatible = "renesas,tmu-r8a7796", "renesas,tmu"; |
| 605 | reg = <0 0xe6fd0000 0 0x30>; |
| 606 | interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, |
| 607 | <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, |
| 608 | <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; |
| 609 | clocks = <&cpg CPG_MOD 123>; |
| 610 | clock-names = "fck"; |
| 611 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 612 | resets = <&cpg 123>; |
| 613 | status = "disabled"; |
| 614 | }; |
| 615 | |
| 616 | tmu3: timer@e6fe0000 { |
| 617 | compatible = "renesas,tmu-r8a7796", "renesas,tmu"; |
| 618 | reg = <0 0xe6fe0000 0 0x30>; |
| 619 | interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, |
| 620 | <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, |
| 621 | <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; |
| 622 | clocks = <&cpg CPG_MOD 122>; |
| 623 | clock-names = "fck"; |
| 624 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 625 | resets = <&cpg 122>; |
| 626 | status = "disabled"; |
| 627 | }; |
| 628 | |
| 629 | tmu4: timer@ffc00000 { |
| 630 | compatible = "renesas,tmu-r8a7796", "renesas,tmu"; |
| 631 | reg = <0 0xffc00000 0 0x30>; |
| 632 | interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, |
| 633 | <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, |
| 634 | <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; |
| 635 | clocks = <&cpg CPG_MOD 121>; |
| 636 | clock-names = "fck"; |
| 637 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 638 | resets = <&cpg 121>; |
| 639 | status = "disabled"; |
| 640 | }; |
| 641 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 642 | i2c0: i2c@e6500000 { |
| 643 | #address-cells = <1>; |
| 644 | #size-cells = <0>; |
| 645 | compatible = "renesas,i2c-r8a7796", |
| 646 | "renesas,rcar-gen3-i2c"; |
| 647 | reg = <0 0xe6500000 0 0x40>; |
| 648 | interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; |
| 649 | clocks = <&cpg CPG_MOD 931>; |
| 650 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 651 | resets = <&cpg 931>; |
| 652 | dmas = <&dmac1 0x91>, <&dmac1 0x90>, |
| 653 | <&dmac2 0x91>, <&dmac2 0x90>; |
| 654 | dma-names = "tx", "rx", "tx", "rx"; |
| 655 | i2c-scl-internal-delay-ns = <110>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 656 | status = "disabled"; |
| 657 | }; |
| 658 | |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 659 | i2c1: i2c@e6508000 { |
| 660 | #address-cells = <1>; |
| 661 | #size-cells = <0>; |
| 662 | compatible = "renesas,i2c-r8a7796", |
| 663 | "renesas,rcar-gen3-i2c"; |
| 664 | reg = <0 0xe6508000 0 0x40>; |
| 665 | interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; |
| 666 | clocks = <&cpg CPG_MOD 930>; |
| 667 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 668 | resets = <&cpg 930>; |
| 669 | dmas = <&dmac1 0x93>, <&dmac1 0x92>, |
| 670 | <&dmac2 0x93>, <&dmac2 0x92>; |
| 671 | dma-names = "tx", "rx", "tx", "rx"; |
| 672 | i2c-scl-internal-delay-ns = <6>; |
| 673 | status = "disabled"; |
| 674 | }; |
| 675 | |
| 676 | i2c2: i2c@e6510000 { |
| 677 | #address-cells = <1>; |
| 678 | #size-cells = <0>; |
| 679 | compatible = "renesas,i2c-r8a7796", |
| 680 | "renesas,rcar-gen3-i2c"; |
| 681 | reg = <0 0xe6510000 0 0x40>; |
| 682 | interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; |
| 683 | clocks = <&cpg CPG_MOD 929>; |
| 684 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 685 | resets = <&cpg 929>; |
| 686 | dmas = <&dmac1 0x95>, <&dmac1 0x94>, |
| 687 | <&dmac2 0x95>, <&dmac2 0x94>; |
| 688 | dma-names = "tx", "rx", "tx", "rx"; |
| 689 | i2c-scl-internal-delay-ns = <6>; |
| 690 | status = "disabled"; |
| 691 | }; |
| 692 | |
| 693 | i2c3: i2c@e66d0000 { |
| 694 | #address-cells = <1>; |
| 695 | #size-cells = <0>; |
| 696 | compatible = "renesas,i2c-r8a7796", |
| 697 | "renesas,rcar-gen3-i2c"; |
| 698 | reg = <0 0xe66d0000 0 0x40>; |
| 699 | interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; |
| 700 | clocks = <&cpg CPG_MOD 928>; |
| 701 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 702 | resets = <&cpg 928>; |
| 703 | dmas = <&dmac0 0x97>, <&dmac0 0x96>; |
| 704 | dma-names = "tx", "rx"; |
| 705 | i2c-scl-internal-delay-ns = <110>; |
| 706 | status = "disabled"; |
| 707 | }; |
| 708 | |
| 709 | i2c4: i2c@e66d8000 { |
| 710 | #address-cells = <1>; |
| 711 | #size-cells = <0>; |
| 712 | compatible = "renesas,i2c-r8a7796", |
| 713 | "renesas,rcar-gen3-i2c"; |
| 714 | reg = <0 0xe66d8000 0 0x40>; |
| 715 | interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; |
| 716 | clocks = <&cpg CPG_MOD 927>; |
| 717 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 718 | resets = <&cpg 927>; |
| 719 | dmas = <&dmac0 0x99>, <&dmac0 0x98>; |
| 720 | dma-names = "tx", "rx"; |
| 721 | i2c-scl-internal-delay-ns = <110>; |
| 722 | status = "disabled"; |
| 723 | }; |
| 724 | |
| 725 | i2c5: i2c@e66e0000 { |
| 726 | #address-cells = <1>; |
| 727 | #size-cells = <0>; |
| 728 | compatible = "renesas,i2c-r8a7796", |
| 729 | "renesas,rcar-gen3-i2c"; |
| 730 | reg = <0 0xe66e0000 0 0x40>; |
| 731 | interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; |
| 732 | clocks = <&cpg CPG_MOD 919>; |
| 733 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 734 | resets = <&cpg 919>; |
| 735 | dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; |
| 736 | dma-names = "tx", "rx"; |
| 737 | i2c-scl-internal-delay-ns = <110>; |
| 738 | status = "disabled"; |
| 739 | }; |
| 740 | |
| 741 | i2c6: i2c@e66e8000 { |
| 742 | #address-cells = <1>; |
| 743 | #size-cells = <0>; |
| 744 | compatible = "renesas,i2c-r8a7796", |
| 745 | "renesas,rcar-gen3-i2c"; |
| 746 | reg = <0 0xe66e8000 0 0x40>; |
| 747 | interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; |
| 748 | clocks = <&cpg CPG_MOD 918>; |
| 749 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 750 | resets = <&cpg 918>; |
| 751 | dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; |
| 752 | dma-names = "tx", "rx"; |
| 753 | i2c-scl-internal-delay-ns = <6>; |
| 754 | status = "disabled"; |
| 755 | }; |
| 756 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 757 | i2c_dvfs: i2c@e60b0000 { |
| 758 | #address-cells = <1>; |
| 759 | #size-cells = <0>; |
| 760 | compatible = "renesas,iic-r8a7796", |
| 761 | "renesas,rcar-gen3-iic", |
| 762 | "renesas,rmobile-iic"; |
| 763 | reg = <0 0xe60b0000 0 0x425>; |
| 764 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; |
| 765 | clocks = <&cpg CPG_MOD 926>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 766 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 767 | resets = <&cpg 926>; |
| 768 | dmas = <&dmac0 0x11>, <&dmac0 0x10>; |
| 769 | dma-names = "tx", "rx"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 770 | status = "disabled"; |
| 771 | }; |
| 772 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 773 | hscif0: serial@e6540000 { |
| 774 | compatible = "renesas,hscif-r8a7796", |
| 775 | "renesas,rcar-gen3-hscif", |
| 776 | "renesas,hscif"; |
| 777 | reg = <0 0xe6540000 0 0x60>; |
| 778 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; |
| 779 | clocks = <&cpg CPG_MOD 520>, |
| 780 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 781 | <&scif_clk>; |
| 782 | clock-names = "fck", "brg_int", "scif_clk"; |
| 783 | dmas = <&dmac1 0x31>, <&dmac1 0x30>, |
| 784 | <&dmac2 0x31>, <&dmac2 0x30>; |
| 785 | dma-names = "tx", "rx", "tx", "rx"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 786 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 787 | resets = <&cpg 520>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 788 | status = "disabled"; |
| 789 | }; |
| 790 | |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 791 | hscif1: serial@e6550000 { |
| 792 | compatible = "renesas,hscif-r8a7796", |
| 793 | "renesas,rcar-gen3-hscif", |
| 794 | "renesas,hscif"; |
| 795 | reg = <0 0xe6550000 0 0x60>; |
| 796 | interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; |
| 797 | clocks = <&cpg CPG_MOD 519>, |
| 798 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 799 | <&scif_clk>; |
| 800 | clock-names = "fck", "brg_int", "scif_clk"; |
| 801 | dmas = <&dmac1 0x33>, <&dmac1 0x32>, |
| 802 | <&dmac2 0x33>, <&dmac2 0x32>; |
| 803 | dma-names = "tx", "rx", "tx", "rx"; |
| 804 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 805 | resets = <&cpg 519>; |
| 806 | status = "disabled"; |
| 807 | }; |
| 808 | |
| 809 | hscif2: serial@e6560000 { |
| 810 | compatible = "renesas,hscif-r8a7796", |
| 811 | "renesas,rcar-gen3-hscif", |
| 812 | "renesas,hscif"; |
| 813 | reg = <0 0xe6560000 0 0x60>; |
| 814 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; |
| 815 | clocks = <&cpg CPG_MOD 518>, |
| 816 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 817 | <&scif_clk>; |
| 818 | clock-names = "fck", "brg_int", "scif_clk"; |
| 819 | dmas = <&dmac1 0x35>, <&dmac1 0x34>, |
| 820 | <&dmac2 0x35>, <&dmac2 0x34>; |
| 821 | dma-names = "tx", "rx", "tx", "rx"; |
| 822 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 823 | resets = <&cpg 518>; |
| 824 | status = "disabled"; |
| 825 | }; |
| 826 | |
| 827 | hscif3: serial@e66a0000 { |
| 828 | compatible = "renesas,hscif-r8a7796", |
| 829 | "renesas,rcar-gen3-hscif", |
| 830 | "renesas,hscif"; |
| 831 | reg = <0 0xe66a0000 0 0x60>; |
| 832 | interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; |
| 833 | clocks = <&cpg CPG_MOD 517>, |
| 834 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 835 | <&scif_clk>; |
| 836 | clock-names = "fck", "brg_int", "scif_clk"; |
| 837 | dmas = <&dmac0 0x37>, <&dmac0 0x36>; |
| 838 | dma-names = "tx", "rx"; |
| 839 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 840 | resets = <&cpg 517>; |
| 841 | status = "disabled"; |
| 842 | }; |
| 843 | |
| 844 | hscif4: serial@e66b0000 { |
| 845 | compatible = "renesas,hscif-r8a7796", |
| 846 | "renesas,rcar-gen3-hscif", |
| 847 | "renesas,hscif"; |
| 848 | reg = <0 0xe66b0000 0 0x60>; |
| 849 | interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; |
| 850 | clocks = <&cpg CPG_MOD 516>, |
| 851 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 852 | <&scif_clk>; |
| 853 | clock-names = "fck", "brg_int", "scif_clk"; |
| 854 | dmas = <&dmac0 0x39>, <&dmac0 0x38>; |
| 855 | dma-names = "tx", "rx"; |
| 856 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 857 | resets = <&cpg 516>; |
| 858 | status = "disabled"; |
| 859 | }; |
| 860 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 861 | hsusb: usb@e6590000 { |
| 862 | compatible = "renesas,usbhs-r8a7796", |
| 863 | "renesas,rcar-gen3-usbhs"; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 864 | reg = <0 0xe6590000 0 0x200>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 865 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 866 | clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 867 | dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, |
| 868 | <&usb_dmac1 0>, <&usb_dmac1 1>; |
| 869 | dma-names = "ch0", "ch1", "ch2", "ch3"; |
| 870 | renesas,buswait = <11>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 871 | phys = <&usb2_phy0 3>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 872 | phy-names = "usb"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 873 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 874 | resets = <&cpg 704>, <&cpg 703>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 875 | status = "disabled"; |
| 876 | }; |
| 877 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 878 | usb_dmac0: dma-controller@e65a0000 { |
| 879 | compatible = "renesas,r8a7796-usb-dmac", |
| 880 | "renesas,usb-dmac"; |
| 881 | reg = <0 0xe65a0000 0 0x100>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 882 | interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, |
| 883 | <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 884 | interrupt-names = "ch0", "ch1"; |
| 885 | clocks = <&cpg CPG_MOD 330>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 886 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 887 | resets = <&cpg 330>; |
| 888 | #dma-cells = <1>; |
| 889 | dma-channels = <2>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 890 | }; |
| 891 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 892 | usb_dmac1: dma-controller@e65b0000 { |
| 893 | compatible = "renesas,r8a7796-usb-dmac", |
| 894 | "renesas,usb-dmac"; |
| 895 | reg = <0 0xe65b0000 0 0x100>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 896 | interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
| 897 | <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 898 | interrupt-names = "ch0", "ch1"; |
| 899 | clocks = <&cpg CPG_MOD 331>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 900 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 901 | resets = <&cpg 331>; |
| 902 | #dma-cells = <1>; |
| 903 | dma-channels = <2>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 904 | }; |
| 905 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 906 | usb3_phy0: usb-phy@e65ee000 { |
| 907 | compatible = "renesas,r8a7796-usb3-phy", |
| 908 | "renesas,rcar-gen3-usb3-phy"; |
| 909 | reg = <0 0xe65ee000 0 0x90>; |
| 910 | clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, |
| 911 | <&usb_extal_clk>; |
| 912 | clock-names = "usb3-if", "usb3s_clk", "usb_extal"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 913 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 914 | resets = <&cpg 328>; |
| 915 | #phy-cells = <0>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 916 | status = "disabled"; |
| 917 | }; |
| 918 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 919 | arm_cc630p: crypto@e6601000 { |
| 920 | compatible = "arm,cryptocell-630p-ree"; |
| 921 | interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; |
| 922 | reg = <0x0 0xe6601000 0 0x1000>; |
| 923 | clocks = <&cpg CPG_MOD 229>; |
| 924 | resets = <&cpg 229>; |
| 925 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 926 | }; |
| 927 | |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 928 | dmac0: dma-controller@e6700000 { |
| 929 | compatible = "renesas,dmac-r8a7796", |
| 930 | "renesas,rcar-dmac"; |
| 931 | reg = <0 0xe6700000 0 0x10000>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 932 | interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, |
| 933 | <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, |
| 934 | <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, |
| 935 | <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, |
| 936 | <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, |
| 937 | <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, |
| 938 | <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, |
| 939 | <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, |
| 940 | <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, |
| 941 | <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, |
| 942 | <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, |
| 943 | <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, |
| 944 | <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, |
| 945 | <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, |
| 946 | <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, |
| 947 | <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, |
| 948 | <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 949 | interrupt-names = "error", |
| 950 | "ch0", "ch1", "ch2", "ch3", |
| 951 | "ch4", "ch5", "ch6", "ch7", |
| 952 | "ch8", "ch9", "ch10", "ch11", |
| 953 | "ch12", "ch13", "ch14", "ch15"; |
| 954 | clocks = <&cpg CPG_MOD 219>; |
| 955 | clock-names = "fck"; |
| 956 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 957 | resets = <&cpg 219>; |
| 958 | #dma-cells = <1>; |
| 959 | dma-channels = <16>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 960 | iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, |
| 961 | <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, |
| 962 | <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, |
| 963 | <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, |
| 964 | <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, |
| 965 | <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, |
| 966 | <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, |
| 967 | <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 968 | }; |
| 969 | |
| 970 | dmac1: dma-controller@e7300000 { |
| 971 | compatible = "renesas,dmac-r8a7796", |
| 972 | "renesas,rcar-dmac"; |
| 973 | reg = <0 0xe7300000 0 0x10000>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 974 | interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, |
| 975 | <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, |
| 976 | <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, |
| 977 | <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, |
| 978 | <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, |
| 979 | <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, |
| 980 | <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, |
| 981 | <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, |
| 982 | <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, |
| 983 | <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, |
| 984 | <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, |
| 985 | <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, |
| 986 | <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, |
| 987 | <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, |
| 988 | <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, |
| 989 | <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, |
| 990 | <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 991 | interrupt-names = "error", |
| 992 | "ch0", "ch1", "ch2", "ch3", |
| 993 | "ch4", "ch5", "ch6", "ch7", |
| 994 | "ch8", "ch9", "ch10", "ch11", |
| 995 | "ch12", "ch13", "ch14", "ch15"; |
| 996 | clocks = <&cpg CPG_MOD 218>; |
| 997 | clock-names = "fck"; |
| 998 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 999 | resets = <&cpg 218>; |
| 1000 | #dma-cells = <1>; |
| 1001 | dma-channels = <16>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1002 | iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, |
| 1003 | <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, |
| 1004 | <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, |
| 1005 | <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, |
| 1006 | <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, |
| 1007 | <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, |
| 1008 | <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, |
| 1009 | <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1010 | }; |
| 1011 | |
| 1012 | dmac2: dma-controller@e7310000 { |
| 1013 | compatible = "renesas,dmac-r8a7796", |
| 1014 | "renesas,rcar-dmac"; |
| 1015 | reg = <0 0xe7310000 0 0x10000>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 1016 | interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, |
| 1017 | <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, |
| 1018 | <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, |
| 1019 | <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, |
| 1020 | <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, |
| 1021 | <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, |
| 1022 | <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, |
| 1023 | <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, |
| 1024 | <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, |
| 1025 | <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, |
| 1026 | <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, |
| 1027 | <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, |
| 1028 | <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, |
| 1029 | <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, |
| 1030 | <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, |
| 1031 | <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, |
| 1032 | <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1033 | interrupt-names = "error", |
| 1034 | "ch0", "ch1", "ch2", "ch3", |
| 1035 | "ch4", "ch5", "ch6", "ch7", |
| 1036 | "ch8", "ch9", "ch10", "ch11", |
| 1037 | "ch12", "ch13", "ch14", "ch15"; |
| 1038 | clocks = <&cpg CPG_MOD 217>; |
| 1039 | clock-names = "fck"; |
| 1040 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1041 | resets = <&cpg 217>; |
| 1042 | #dma-cells = <1>; |
| 1043 | dma-channels = <16>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1044 | iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, |
| 1045 | <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, |
| 1046 | <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, |
| 1047 | <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, |
| 1048 | <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, |
| 1049 | <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, |
| 1050 | <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, |
| 1051 | <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1052 | }; |
| 1053 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1054 | ipmmu_ds0: iommu@e6740000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1055 | compatible = "renesas,ipmmu-r8a7796"; |
| 1056 | reg = <0 0xe6740000 0 0x1000>; |
| 1057 | renesas,ipmmu-main = <&ipmmu_mm 0>; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1058 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1059 | #iommu-cells = <1>; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1060 | }; |
| 1061 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1062 | ipmmu_ds1: iommu@e7740000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1063 | compatible = "renesas,ipmmu-r8a7796"; |
| 1064 | reg = <0 0xe7740000 0 0x1000>; |
| 1065 | renesas,ipmmu-main = <&ipmmu_mm 1>; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1066 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1067 | #iommu-cells = <1>; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1068 | }; |
| 1069 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1070 | ipmmu_hc: iommu@e6570000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1071 | compatible = "renesas,ipmmu-r8a7796"; |
| 1072 | reg = <0 0xe6570000 0 0x1000>; |
| 1073 | renesas,ipmmu-main = <&ipmmu_mm 2>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 1074 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1075 | #iommu-cells = <1>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 1076 | }; |
| 1077 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1078 | ipmmu_ir: iommu@ff8b0000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1079 | compatible = "renesas,ipmmu-r8a7796"; |
| 1080 | reg = <0 0xff8b0000 0 0x1000>; |
| 1081 | renesas,ipmmu-main = <&ipmmu_mm 3>; |
| 1082 | power-domains = <&sysc R8A7796_PD_A3IR>; |
| 1083 | #iommu-cells = <1>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 1084 | }; |
| 1085 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1086 | ipmmu_mm: iommu@e67b0000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1087 | compatible = "renesas,ipmmu-r8a7796"; |
| 1088 | reg = <0 0xe67b0000 0 0x1000>; |
| 1089 | interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, |
| 1090 | <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; |
| 1091 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1092 | #iommu-cells = <1>; |
| 1093 | }; |
| 1094 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1095 | ipmmu_mp: iommu@ec670000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1096 | compatible = "renesas,ipmmu-r8a7796"; |
| 1097 | reg = <0 0xec670000 0 0x1000>; |
| 1098 | renesas,ipmmu-main = <&ipmmu_mm 4>; |
| 1099 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1100 | #iommu-cells = <1>; |
| 1101 | }; |
| 1102 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1103 | ipmmu_pv0: iommu@fd800000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1104 | compatible = "renesas,ipmmu-r8a7796"; |
| 1105 | reg = <0 0xfd800000 0 0x1000>; |
| 1106 | renesas,ipmmu-main = <&ipmmu_mm 5>; |
| 1107 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1108 | #iommu-cells = <1>; |
| 1109 | }; |
| 1110 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1111 | ipmmu_pv1: iommu@fd950000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1112 | compatible = "renesas,ipmmu-r8a7796"; |
| 1113 | reg = <0 0xfd950000 0 0x1000>; |
| 1114 | renesas,ipmmu-main = <&ipmmu_mm 6>; |
| 1115 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1116 | #iommu-cells = <1>; |
| 1117 | }; |
| 1118 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1119 | ipmmu_rt: iommu@ffc80000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1120 | compatible = "renesas,ipmmu-r8a7796"; |
| 1121 | reg = <0 0xffc80000 0 0x1000>; |
| 1122 | renesas,ipmmu-main = <&ipmmu_mm 7>; |
| 1123 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1124 | #iommu-cells = <1>; |
| 1125 | }; |
| 1126 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1127 | ipmmu_vc0: iommu@fe6b0000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1128 | compatible = "renesas,ipmmu-r8a7796"; |
| 1129 | reg = <0 0xfe6b0000 0 0x1000>; |
| 1130 | renesas,ipmmu-main = <&ipmmu_mm 8>; |
| 1131 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 1132 | #iommu-cells = <1>; |
| 1133 | }; |
| 1134 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1135 | ipmmu_vi0: iommu@febd0000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1136 | compatible = "renesas,ipmmu-r8a7796"; |
| 1137 | reg = <0 0xfebd0000 0 0x1000>; |
| 1138 | renesas,ipmmu-main = <&ipmmu_mm 9>; |
| 1139 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1140 | #iommu-cells = <1>; |
| 1141 | }; |
| 1142 | |
| 1143 | avb: ethernet@e6800000 { |
| 1144 | compatible = "renesas,etheravb-r8a7796", |
| 1145 | "renesas,etheravb-rcar-gen3"; |
| 1146 | reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; |
| 1147 | interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, |
| 1148 | <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, |
| 1149 | <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, |
| 1150 | <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, |
| 1151 | <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, |
| 1152 | <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, |
| 1153 | <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, |
| 1154 | <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, |
| 1155 | <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, |
| 1156 | <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, |
| 1157 | <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, |
| 1158 | <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, |
| 1159 | <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, |
| 1160 | <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, |
| 1161 | <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, |
| 1162 | <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, |
| 1163 | <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, |
| 1164 | <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, |
| 1165 | <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, |
| 1166 | <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, |
| 1167 | <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, |
| 1168 | <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, |
| 1169 | <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, |
| 1170 | <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, |
| 1171 | <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; |
| 1172 | interrupt-names = "ch0", "ch1", "ch2", "ch3", |
| 1173 | "ch4", "ch5", "ch6", "ch7", |
| 1174 | "ch8", "ch9", "ch10", "ch11", |
| 1175 | "ch12", "ch13", "ch14", "ch15", |
| 1176 | "ch16", "ch17", "ch18", "ch19", |
| 1177 | "ch20", "ch21", "ch22", "ch23", |
| 1178 | "ch24"; |
| 1179 | clocks = <&cpg CPG_MOD 812>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1180 | clock-names = "fck"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1181 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1182 | resets = <&cpg 812>; |
| 1183 | phy-mode = "rgmii"; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1184 | rx-internal-delay-ps = <0>; |
| 1185 | tx-internal-delay-ps = <0>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1186 | iommus = <&ipmmu_ds0 16>; |
| 1187 | #address-cells = <1>; |
| 1188 | #size-cells = <0>; |
| 1189 | status = "disabled"; |
| 1190 | }; |
| 1191 | |
| 1192 | can0: can@e6c30000 { |
| 1193 | compatible = "renesas,can-r8a7796", |
| 1194 | "renesas,rcar-gen3-can"; |
| 1195 | reg = <0 0xe6c30000 0 0x1000>; |
| 1196 | interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; |
| 1197 | clocks = <&cpg CPG_MOD 916>, |
| 1198 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, |
| 1199 | <&can_clk>; |
| 1200 | clock-names = "clkp1", "clkp2", "can_clk"; |
| 1201 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; |
| 1202 | assigned-clock-rates = <40000000>; |
| 1203 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1204 | resets = <&cpg 916>; |
| 1205 | status = "disabled"; |
| 1206 | }; |
| 1207 | |
| 1208 | can1: can@e6c38000 { |
| 1209 | compatible = "renesas,can-r8a7796", |
| 1210 | "renesas,rcar-gen3-can"; |
| 1211 | reg = <0 0xe6c38000 0 0x1000>; |
| 1212 | interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; |
| 1213 | clocks = <&cpg CPG_MOD 915>, |
| 1214 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, |
| 1215 | <&can_clk>; |
| 1216 | clock-names = "clkp1", "clkp2", "can_clk"; |
| 1217 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; |
| 1218 | assigned-clock-rates = <40000000>; |
| 1219 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1220 | resets = <&cpg 915>; |
| 1221 | status = "disabled"; |
| 1222 | }; |
| 1223 | |
| 1224 | canfd: can@e66c0000 { |
| 1225 | compatible = "renesas,r8a7796-canfd", |
| 1226 | "renesas,rcar-gen3-canfd"; |
| 1227 | reg = <0 0xe66c0000 0 0x8000>; |
| 1228 | interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, |
| 1229 | <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1230 | interrupt-names = "ch_int", "g_int"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1231 | clocks = <&cpg CPG_MOD 914>, |
| 1232 | <&cpg CPG_CORE R8A7796_CLK_CANFD>, |
| 1233 | <&can_clk>; |
| 1234 | clock-names = "fck", "canfd", "can_clk"; |
| 1235 | assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; |
| 1236 | assigned-clock-rates = <40000000>; |
| 1237 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1238 | resets = <&cpg 914>; |
| 1239 | status = "disabled"; |
| 1240 | |
| 1241 | channel0 { |
| 1242 | status = "disabled"; |
| 1243 | }; |
| 1244 | |
| 1245 | channel1 { |
| 1246 | status = "disabled"; |
| 1247 | }; |
| 1248 | }; |
| 1249 | |
| 1250 | pwm0: pwm@e6e30000 { |
| 1251 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; |
| 1252 | reg = <0 0xe6e30000 0 8>; |
| 1253 | #pwm-cells = <2>; |
| 1254 | clocks = <&cpg CPG_MOD 523>; |
| 1255 | resets = <&cpg 523>; |
| 1256 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1257 | status = "disabled"; |
| 1258 | }; |
| 1259 | |
| 1260 | pwm1: pwm@e6e31000 { |
| 1261 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; |
| 1262 | reg = <0 0xe6e31000 0 8>; |
| 1263 | #pwm-cells = <2>; |
| 1264 | clocks = <&cpg CPG_MOD 523>; |
| 1265 | resets = <&cpg 523>; |
| 1266 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1267 | status = "disabled"; |
| 1268 | }; |
| 1269 | |
| 1270 | pwm2: pwm@e6e32000 { |
| 1271 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; |
| 1272 | reg = <0 0xe6e32000 0 8>; |
| 1273 | #pwm-cells = <2>; |
| 1274 | clocks = <&cpg CPG_MOD 523>; |
| 1275 | resets = <&cpg 523>; |
| 1276 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1277 | status = "disabled"; |
| 1278 | }; |
| 1279 | |
| 1280 | pwm3: pwm@e6e33000 { |
| 1281 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; |
| 1282 | reg = <0 0xe6e33000 0 8>; |
| 1283 | #pwm-cells = <2>; |
| 1284 | clocks = <&cpg CPG_MOD 523>; |
| 1285 | resets = <&cpg 523>; |
| 1286 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1287 | status = "disabled"; |
| 1288 | }; |
| 1289 | |
| 1290 | pwm4: pwm@e6e34000 { |
| 1291 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; |
| 1292 | reg = <0 0xe6e34000 0 8>; |
| 1293 | #pwm-cells = <2>; |
| 1294 | clocks = <&cpg CPG_MOD 523>; |
| 1295 | resets = <&cpg 523>; |
| 1296 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1297 | status = "disabled"; |
| 1298 | }; |
| 1299 | |
| 1300 | pwm5: pwm@e6e35000 { |
| 1301 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; |
| 1302 | reg = <0 0xe6e35000 0 8>; |
| 1303 | #pwm-cells = <2>; |
| 1304 | clocks = <&cpg CPG_MOD 523>; |
| 1305 | resets = <&cpg 523>; |
| 1306 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1307 | status = "disabled"; |
| 1308 | }; |
| 1309 | |
| 1310 | pwm6: pwm@e6e36000 { |
| 1311 | compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; |
| 1312 | reg = <0 0xe6e36000 0 8>; |
| 1313 | #pwm-cells = <2>; |
| 1314 | clocks = <&cpg CPG_MOD 523>; |
| 1315 | resets = <&cpg 523>; |
| 1316 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1317 | status = "disabled"; |
| 1318 | }; |
| 1319 | |
| 1320 | scif0: serial@e6e60000 { |
| 1321 | compatible = "renesas,scif-r8a7796", |
| 1322 | "renesas,rcar-gen3-scif", "renesas,scif"; |
| 1323 | reg = <0 0xe6e60000 0 64>; |
| 1324 | interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; |
| 1325 | clocks = <&cpg CPG_MOD 207>, |
| 1326 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 1327 | <&scif_clk>; |
| 1328 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1329 | dmas = <&dmac1 0x51>, <&dmac1 0x50>, |
| 1330 | <&dmac2 0x51>, <&dmac2 0x50>; |
| 1331 | dma-names = "tx", "rx", "tx", "rx"; |
| 1332 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1333 | resets = <&cpg 207>; |
| 1334 | status = "disabled"; |
| 1335 | }; |
| 1336 | |
| 1337 | scif1: serial@e6e68000 { |
| 1338 | compatible = "renesas,scif-r8a7796", |
| 1339 | "renesas,rcar-gen3-scif", "renesas,scif"; |
| 1340 | reg = <0 0xe6e68000 0 64>; |
| 1341 | interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; |
| 1342 | clocks = <&cpg CPG_MOD 206>, |
| 1343 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 1344 | <&scif_clk>; |
| 1345 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1346 | dmas = <&dmac1 0x53>, <&dmac1 0x52>, |
| 1347 | <&dmac2 0x53>, <&dmac2 0x52>; |
| 1348 | dma-names = "tx", "rx", "tx", "rx"; |
| 1349 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1350 | resets = <&cpg 206>; |
| 1351 | status = "disabled"; |
| 1352 | }; |
| 1353 | |
| 1354 | scif2: serial@e6e88000 { |
| 1355 | compatible = "renesas,scif-r8a7796", |
| 1356 | "renesas,rcar-gen3-scif", "renesas,scif"; |
| 1357 | reg = <0 0xe6e88000 0 64>; |
| 1358 | interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; |
| 1359 | clocks = <&cpg CPG_MOD 310>, |
| 1360 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 1361 | <&scif_clk>; |
| 1362 | clock-names = "fck", "brg_int", "scif_clk"; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1363 | dmas = <&dmac1 0x13>, <&dmac1 0x12>, |
| 1364 | <&dmac2 0x13>, <&dmac2 0x12>; |
| 1365 | dma-names = "tx", "rx", "tx", "rx"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1366 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1367 | resets = <&cpg 310>; |
| 1368 | status = "disabled"; |
| 1369 | }; |
| 1370 | |
| 1371 | scif3: serial@e6c50000 { |
| 1372 | compatible = "renesas,scif-r8a7796", |
| 1373 | "renesas,rcar-gen3-scif", "renesas,scif"; |
| 1374 | reg = <0 0xe6c50000 0 64>; |
| 1375 | interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; |
| 1376 | clocks = <&cpg CPG_MOD 204>, |
| 1377 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 1378 | <&scif_clk>; |
| 1379 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1380 | dmas = <&dmac0 0x57>, <&dmac0 0x56>; |
| 1381 | dma-names = "tx", "rx"; |
| 1382 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1383 | resets = <&cpg 204>; |
| 1384 | status = "disabled"; |
| 1385 | }; |
| 1386 | |
| 1387 | scif4: serial@e6c40000 { |
| 1388 | compatible = "renesas,scif-r8a7796", |
| 1389 | "renesas,rcar-gen3-scif", "renesas,scif"; |
| 1390 | reg = <0 0xe6c40000 0 64>; |
| 1391 | interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; |
| 1392 | clocks = <&cpg CPG_MOD 203>, |
| 1393 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 1394 | <&scif_clk>; |
| 1395 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1396 | dmas = <&dmac0 0x59>, <&dmac0 0x58>; |
| 1397 | dma-names = "tx", "rx"; |
| 1398 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1399 | resets = <&cpg 203>; |
| 1400 | status = "disabled"; |
| 1401 | }; |
| 1402 | |
| 1403 | scif5: serial@e6f30000 { |
| 1404 | compatible = "renesas,scif-r8a7796", |
| 1405 | "renesas,rcar-gen3-scif", "renesas,scif"; |
| 1406 | reg = <0 0xe6f30000 0 64>; |
| 1407 | interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; |
| 1408 | clocks = <&cpg CPG_MOD 202>, |
| 1409 | <&cpg CPG_CORE R8A7796_CLK_S3D1>, |
| 1410 | <&scif_clk>; |
| 1411 | clock-names = "fck", "brg_int", "scif_clk"; |
| 1412 | dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, |
| 1413 | <&dmac2 0x5b>, <&dmac2 0x5a>; |
| 1414 | dma-names = "tx", "rx", "tx", "rx"; |
| 1415 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1416 | resets = <&cpg 202>; |
| 1417 | status = "disabled"; |
| 1418 | }; |
| 1419 | |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 1420 | tpu: pwm@e6e80000 { |
| 1421 | compatible = "renesas,tpu-r8a7796", "renesas,tpu"; |
| 1422 | reg = <0 0xe6e80000 0 0x148>; |
| 1423 | interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; |
| 1424 | clocks = <&cpg CPG_MOD 304>; |
| 1425 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1426 | resets = <&cpg 304>; |
| 1427 | #pwm-cells = <3>; |
| 1428 | status = "disabled"; |
| 1429 | }; |
| 1430 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1431 | msiof0: spi@e6e90000 { |
| 1432 | compatible = "renesas,msiof-r8a7796", |
| 1433 | "renesas,rcar-gen3-msiof"; |
| 1434 | reg = <0 0xe6e90000 0 0x0064>; |
| 1435 | interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; |
| 1436 | clocks = <&cpg CPG_MOD 211>; |
| 1437 | dmas = <&dmac1 0x41>, <&dmac1 0x40>, |
| 1438 | <&dmac2 0x41>, <&dmac2 0x40>; |
| 1439 | dma-names = "tx", "rx", "tx", "rx"; |
| 1440 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1441 | resets = <&cpg 211>; |
| 1442 | #address-cells = <1>; |
| 1443 | #size-cells = <0>; |
| 1444 | status = "disabled"; |
| 1445 | }; |
| 1446 | |
| 1447 | msiof1: spi@e6ea0000 { |
| 1448 | compatible = "renesas,msiof-r8a7796", |
| 1449 | "renesas,rcar-gen3-msiof"; |
| 1450 | reg = <0 0xe6ea0000 0 0x0064>; |
| 1451 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; |
| 1452 | clocks = <&cpg CPG_MOD 210>; |
| 1453 | dmas = <&dmac1 0x43>, <&dmac1 0x42>, |
| 1454 | <&dmac2 0x43>, <&dmac2 0x42>; |
| 1455 | dma-names = "tx", "rx", "tx", "rx"; |
| 1456 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1457 | resets = <&cpg 210>; |
| 1458 | #address-cells = <1>; |
| 1459 | #size-cells = <0>; |
| 1460 | status = "disabled"; |
| 1461 | }; |
| 1462 | |
| 1463 | msiof2: spi@e6c00000 { |
| 1464 | compatible = "renesas,msiof-r8a7796", |
| 1465 | "renesas,rcar-gen3-msiof"; |
| 1466 | reg = <0 0xe6c00000 0 0x0064>; |
| 1467 | interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; |
| 1468 | clocks = <&cpg CPG_MOD 209>; |
| 1469 | dmas = <&dmac0 0x45>, <&dmac0 0x44>; |
| 1470 | dma-names = "tx", "rx"; |
| 1471 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1472 | resets = <&cpg 209>; |
| 1473 | #address-cells = <1>; |
| 1474 | #size-cells = <0>; |
| 1475 | status = "disabled"; |
| 1476 | }; |
| 1477 | |
| 1478 | msiof3: spi@e6c10000 { |
| 1479 | compatible = "renesas,msiof-r8a7796", |
| 1480 | "renesas,rcar-gen3-msiof"; |
| 1481 | reg = <0 0xe6c10000 0 0x0064>; |
| 1482 | interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; |
| 1483 | clocks = <&cpg CPG_MOD 208>; |
| 1484 | dmas = <&dmac0 0x47>, <&dmac0 0x46>; |
| 1485 | dma-names = "tx", "rx"; |
| 1486 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1487 | resets = <&cpg 208>; |
| 1488 | #address-cells = <1>; |
| 1489 | #size-cells = <0>; |
| 1490 | status = "disabled"; |
| 1491 | }; |
| 1492 | |
| 1493 | vin0: video@e6ef0000 { |
| 1494 | compatible = "renesas,vin-r8a7796"; |
| 1495 | reg = <0 0xe6ef0000 0 0x1000>; |
| 1496 | interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; |
| 1497 | clocks = <&cpg CPG_MOD 811>; |
| 1498 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1499 | resets = <&cpg 811>; |
| 1500 | renesas,id = <0>; |
| 1501 | status = "disabled"; |
| 1502 | |
| 1503 | ports { |
| 1504 | #address-cells = <1>; |
| 1505 | #size-cells = <0>; |
| 1506 | |
| 1507 | port@1 { |
| 1508 | #address-cells = <1>; |
| 1509 | #size-cells = <0>; |
| 1510 | |
| 1511 | reg = <1>; |
| 1512 | |
| 1513 | vin0csi20: endpoint@0 { |
| 1514 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1515 | remote-endpoint = <&csi20vin0>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1516 | }; |
| 1517 | vin0csi40: endpoint@2 { |
| 1518 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1519 | remote-endpoint = <&csi40vin0>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1520 | }; |
| 1521 | }; |
| 1522 | }; |
| 1523 | }; |
| 1524 | |
| 1525 | vin1: video@e6ef1000 { |
| 1526 | compatible = "renesas,vin-r8a7796"; |
| 1527 | reg = <0 0xe6ef1000 0 0x1000>; |
| 1528 | interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; |
| 1529 | clocks = <&cpg CPG_MOD 810>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1530 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1531 | resets = <&cpg 810>; |
| 1532 | renesas,id = <1>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1533 | status = "disabled"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1534 | |
| 1535 | ports { |
| 1536 | #address-cells = <1>; |
| 1537 | #size-cells = <0>; |
| 1538 | |
| 1539 | port@1 { |
| 1540 | #address-cells = <1>; |
| 1541 | #size-cells = <0>; |
| 1542 | |
| 1543 | reg = <1>; |
| 1544 | |
| 1545 | vin1csi20: endpoint@0 { |
| 1546 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1547 | remote-endpoint = <&csi20vin1>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1548 | }; |
| 1549 | vin1csi40: endpoint@2 { |
| 1550 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1551 | remote-endpoint = <&csi40vin1>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1552 | }; |
| 1553 | }; |
| 1554 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1555 | }; |
| 1556 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1557 | vin2: video@e6ef2000 { |
| 1558 | compatible = "renesas,vin-r8a7796"; |
| 1559 | reg = <0 0xe6ef2000 0 0x1000>; |
| 1560 | interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; |
| 1561 | clocks = <&cpg CPG_MOD 809>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1562 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1563 | resets = <&cpg 809>; |
| 1564 | renesas,id = <2>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1565 | status = "disabled"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1566 | |
| 1567 | ports { |
| 1568 | #address-cells = <1>; |
| 1569 | #size-cells = <0>; |
| 1570 | |
| 1571 | port@1 { |
| 1572 | #address-cells = <1>; |
| 1573 | #size-cells = <0>; |
| 1574 | |
| 1575 | reg = <1>; |
| 1576 | |
| 1577 | vin2csi20: endpoint@0 { |
| 1578 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1579 | remote-endpoint = <&csi20vin2>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1580 | }; |
| 1581 | vin2csi40: endpoint@2 { |
| 1582 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1583 | remote-endpoint = <&csi40vin2>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1584 | }; |
| 1585 | }; |
| 1586 | }; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1587 | }; |
| 1588 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1589 | vin3: video@e6ef3000 { |
| 1590 | compatible = "renesas,vin-r8a7796"; |
| 1591 | reg = <0 0xe6ef3000 0 0x1000>; |
| 1592 | interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; |
| 1593 | clocks = <&cpg CPG_MOD 808>; |
Marek Vasut | 878668d | 2017-09-12 23:02:30 +0200 | [diff] [blame] | 1594 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1595 | resets = <&cpg 808>; |
| 1596 | renesas,id = <3>; |
Marek Vasut | 878668d | 2017-09-12 23:02:30 +0200 | [diff] [blame] | 1597 | status = "disabled"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1598 | |
| 1599 | ports { |
| 1600 | #address-cells = <1>; |
| 1601 | #size-cells = <0>; |
| 1602 | |
| 1603 | port@1 { |
| 1604 | #address-cells = <1>; |
| 1605 | #size-cells = <0>; |
| 1606 | |
| 1607 | reg = <1>; |
| 1608 | |
| 1609 | vin3csi20: endpoint@0 { |
| 1610 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1611 | remote-endpoint = <&csi20vin3>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1612 | }; |
| 1613 | vin3csi40: endpoint@2 { |
| 1614 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1615 | remote-endpoint = <&csi40vin3>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1616 | }; |
| 1617 | }; |
| 1618 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1619 | }; |
| 1620 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1621 | vin4: video@e6ef4000 { |
| 1622 | compatible = "renesas,vin-r8a7796"; |
| 1623 | reg = <0 0xe6ef4000 0 0x1000>; |
| 1624 | interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; |
| 1625 | clocks = <&cpg CPG_MOD 807>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1626 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1627 | resets = <&cpg 807>; |
| 1628 | renesas,id = <4>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1629 | status = "disabled"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1630 | |
| 1631 | ports { |
| 1632 | #address-cells = <1>; |
| 1633 | #size-cells = <0>; |
| 1634 | |
| 1635 | port@1 { |
| 1636 | #address-cells = <1>; |
| 1637 | #size-cells = <0>; |
| 1638 | |
| 1639 | reg = <1>; |
| 1640 | |
| 1641 | vin4csi20: endpoint@0 { |
| 1642 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1643 | remote-endpoint = <&csi20vin4>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1644 | }; |
| 1645 | vin4csi40: endpoint@2 { |
| 1646 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1647 | remote-endpoint = <&csi40vin4>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1648 | }; |
| 1649 | }; |
| 1650 | }; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 1651 | }; |
| 1652 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1653 | vin5: video@e6ef5000 { |
| 1654 | compatible = "renesas,vin-r8a7796"; |
| 1655 | reg = <0 0xe6ef5000 0 0x1000>; |
| 1656 | interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; |
| 1657 | clocks = <&cpg CPG_MOD 806>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 1658 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1659 | resets = <&cpg 806>; |
| 1660 | renesas,id = <5>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 1661 | status = "disabled"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1662 | |
| 1663 | ports { |
| 1664 | #address-cells = <1>; |
| 1665 | #size-cells = <0>; |
| 1666 | |
| 1667 | port@1 { |
| 1668 | #address-cells = <1>; |
| 1669 | #size-cells = <0>; |
| 1670 | |
| 1671 | reg = <1>; |
| 1672 | |
| 1673 | vin5csi20: endpoint@0 { |
| 1674 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1675 | remote-endpoint = <&csi20vin5>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1676 | }; |
| 1677 | vin5csi40: endpoint@2 { |
| 1678 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1679 | remote-endpoint = <&csi40vin5>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1680 | }; |
| 1681 | }; |
| 1682 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1683 | }; |
| 1684 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1685 | vin6: video@e6ef6000 { |
| 1686 | compatible = "renesas,vin-r8a7796"; |
| 1687 | reg = <0 0xe6ef6000 0 0x1000>; |
| 1688 | interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; |
| 1689 | clocks = <&cpg CPG_MOD 805>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1690 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1691 | resets = <&cpg 805>; |
| 1692 | renesas,id = <6>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1693 | status = "disabled"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1694 | |
| 1695 | ports { |
| 1696 | #address-cells = <1>; |
| 1697 | #size-cells = <0>; |
| 1698 | |
| 1699 | port@1 { |
| 1700 | #address-cells = <1>; |
| 1701 | #size-cells = <0>; |
| 1702 | |
| 1703 | reg = <1>; |
| 1704 | |
| 1705 | vin6csi20: endpoint@0 { |
| 1706 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1707 | remote-endpoint = <&csi20vin6>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1708 | }; |
| 1709 | vin6csi40: endpoint@2 { |
| 1710 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1711 | remote-endpoint = <&csi40vin6>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1712 | }; |
| 1713 | }; |
| 1714 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1715 | }; |
| 1716 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1717 | vin7: video@e6ef7000 { |
| 1718 | compatible = "renesas,vin-r8a7796"; |
| 1719 | reg = <0 0xe6ef7000 0 0x1000>; |
| 1720 | interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; |
| 1721 | clocks = <&cpg CPG_MOD 804>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1722 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1723 | resets = <&cpg 804>; |
| 1724 | renesas,id = <7>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1725 | status = "disabled"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1726 | |
| 1727 | ports { |
| 1728 | #address-cells = <1>; |
| 1729 | #size-cells = <0>; |
| 1730 | |
| 1731 | port@1 { |
| 1732 | #address-cells = <1>; |
| 1733 | #size-cells = <0>; |
| 1734 | |
| 1735 | reg = <1>; |
| 1736 | |
| 1737 | vin7csi20: endpoint@0 { |
| 1738 | reg = <0>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1739 | remote-endpoint = <&csi20vin7>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1740 | }; |
| 1741 | vin7csi40: endpoint@2 { |
| 1742 | reg = <2>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 1743 | remote-endpoint = <&csi40vin7>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1744 | }; |
| 1745 | }; |
| 1746 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1747 | }; |
| 1748 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1749 | drif00: rif@e6f40000 { |
| 1750 | compatible = "renesas,r8a7796-drif", |
| 1751 | "renesas,rcar-gen3-drif"; |
| 1752 | reg = <0 0xe6f40000 0 0x64>; |
| 1753 | interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; |
| 1754 | clocks = <&cpg CPG_MOD 515>; |
| 1755 | clock-names = "fck"; |
| 1756 | dmas = <&dmac1 0x20>, <&dmac2 0x20>; |
| 1757 | dma-names = "rx", "rx"; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 1758 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1759 | resets = <&cpg 515>; |
| 1760 | renesas,bonding = <&drif01>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 1761 | status = "disabled"; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1762 | }; |
| 1763 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1764 | drif01: rif@e6f50000 { |
| 1765 | compatible = "renesas,r8a7796-drif", |
| 1766 | "renesas,rcar-gen3-drif"; |
| 1767 | reg = <0 0xe6f50000 0 0x64>; |
| 1768 | interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; |
| 1769 | clocks = <&cpg CPG_MOD 514>; |
| 1770 | clock-names = "fck"; |
| 1771 | dmas = <&dmac1 0x22>, <&dmac2 0x22>; |
| 1772 | dma-names = "rx", "rx"; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1773 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1774 | resets = <&cpg 514>; |
| 1775 | renesas,bonding = <&drif00>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1776 | status = "disabled"; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1777 | }; |
| 1778 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1779 | drif10: rif@e6f60000 { |
| 1780 | compatible = "renesas,r8a7796-drif", |
| 1781 | "renesas,rcar-gen3-drif"; |
| 1782 | reg = <0 0xe6f60000 0 0x64>; |
| 1783 | interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; |
| 1784 | clocks = <&cpg CPG_MOD 513>; |
| 1785 | clock-names = "fck"; |
| 1786 | dmas = <&dmac1 0x24>, <&dmac2 0x24>; |
| 1787 | dma-names = "rx", "rx"; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1788 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1789 | resets = <&cpg 513>; |
| 1790 | renesas,bonding = <&drif11>; |
Marek Vasut | 35b854d | 2017-09-12 19:07:20 +0200 | [diff] [blame] | 1791 | status = "disabled"; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1792 | }; |
| 1793 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1794 | drif11: rif@e6f70000 { |
| 1795 | compatible = "renesas,r8a7796-drif", |
| 1796 | "renesas,rcar-gen3-drif"; |
| 1797 | reg = <0 0xe6f70000 0 0x64>; |
| 1798 | interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; |
| 1799 | clocks = <&cpg CPG_MOD 512>; |
| 1800 | clock-names = "fck"; |
| 1801 | dmas = <&dmac1 0x26>, <&dmac2 0x26>; |
| 1802 | dma-names = "rx", "rx"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1803 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1804 | resets = <&cpg 512>; |
| 1805 | renesas,bonding = <&drif10>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1806 | status = "disabled"; |
| 1807 | }; |
| 1808 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1809 | drif20: rif@e6f80000 { |
| 1810 | compatible = "renesas,r8a7796-drif", |
| 1811 | "renesas,rcar-gen3-drif"; |
| 1812 | reg = <0 0xe6f80000 0 0x64>; |
| 1813 | interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; |
| 1814 | clocks = <&cpg CPG_MOD 511>; |
| 1815 | clock-names = "fck"; |
| 1816 | dmas = <&dmac1 0x28>, <&dmac2 0x28>; |
| 1817 | dma-names = "rx", "rx"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1818 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1819 | resets = <&cpg 511>; |
| 1820 | renesas,bonding = <&drif21>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1821 | status = "disabled"; |
| 1822 | }; |
| 1823 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1824 | drif21: rif@e6f90000 { |
| 1825 | compatible = "renesas,r8a7796-drif", |
| 1826 | "renesas,rcar-gen3-drif"; |
| 1827 | reg = <0 0xe6f90000 0 0x64>; |
| 1828 | interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; |
| 1829 | clocks = <&cpg CPG_MOD 510>; |
| 1830 | clock-names = "fck"; |
| 1831 | dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; |
| 1832 | dma-names = "rx", "rx"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1833 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1834 | resets = <&cpg 510>; |
| 1835 | renesas,bonding = <&drif20>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1836 | status = "disabled"; |
| 1837 | }; |
| 1838 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1839 | drif30: rif@e6fa0000 { |
| 1840 | compatible = "renesas,r8a7796-drif", |
| 1841 | "renesas,rcar-gen3-drif"; |
| 1842 | reg = <0 0xe6fa0000 0 0x64>; |
| 1843 | interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; |
| 1844 | clocks = <&cpg CPG_MOD 509>; |
| 1845 | clock-names = "fck"; |
| 1846 | dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; |
| 1847 | dma-names = "rx", "rx"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1848 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1849 | resets = <&cpg 509>; |
| 1850 | renesas,bonding = <&drif31>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1851 | status = "disabled"; |
| 1852 | }; |
| 1853 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1854 | drif31: rif@e6fb0000 { |
| 1855 | compatible = "renesas,r8a7796-drif", |
| 1856 | "renesas,rcar-gen3-drif"; |
| 1857 | reg = <0 0xe6fb0000 0 0x64>; |
| 1858 | interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; |
| 1859 | clocks = <&cpg CPG_MOD 508>; |
| 1860 | clock-names = "fck"; |
| 1861 | dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; |
| 1862 | dma-names = "rx", "rx"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1863 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 1864 | resets = <&cpg 508>; |
| 1865 | renesas,bonding = <&drif30>; |
| 1866 | status = "disabled"; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 1867 | }; |
| 1868 | |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1869 | rcar_sound: sound@ec500000 { |
| 1870 | /* |
Marek Vasut | 9c41af8 | 2023-09-17 16:13:05 +0200 | [diff] [blame] | 1871 | * #sound-dai-cells is required if simple-card |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1872 | * |
| 1873 | * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; |
| 1874 | * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; |
| 1875 | */ |
| 1876 | /* |
| 1877 | * #clock-cells is required for audio_clkout0/1/2/3 |
| 1878 | * |
| 1879 | * clkout : #clock-cells = <0>; <&rcar_sound>; |
| 1880 | * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; |
| 1881 | */ |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 1882 | compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; |
| 1883 | reg = <0 0xec500000 0 0x1000>, /* SCU */ |
| 1884 | <0 0xec5a0000 0 0x100>, /* ADG */ |
| 1885 | <0 0xec540000 0 0x1000>, /* SSIU */ |
| 1886 | <0 0xec541000 0 0x280>, /* SSI */ |
| 1887 | <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1888 | reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; |
| 1889 | |
| 1890 | clocks = <&cpg CPG_MOD 1005>, |
| 1891 | <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, |
| 1892 | <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, |
| 1893 | <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, |
| 1894 | <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, |
| 1895 | <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, |
| 1896 | <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, |
| 1897 | <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, |
| 1898 | <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, |
| 1899 | <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, |
| 1900 | <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, |
| 1901 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| 1902 | <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, |
| 1903 | <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, |
| 1904 | <&audio_clk_a>, <&audio_clk_b>, |
| 1905 | <&audio_clk_c>, |
| 1906 | <&cpg CPG_CORE R8A7796_CLK_S0D4>; |
| 1907 | clock-names = "ssi-all", |
| 1908 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", |
| 1909 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", |
| 1910 | "ssi.1", "ssi.0", |
| 1911 | "src.9", "src.8", "src.7", "src.6", |
| 1912 | "src.5", "src.4", "src.3", "src.2", |
| 1913 | "src.1", "src.0", |
| 1914 | "mix.1", "mix.0", |
| 1915 | "ctu.1", "ctu.0", |
| 1916 | "dvc.0", "dvc.1", |
| 1917 | "clk_a", "clk_b", "clk_c", "clk_i"; |
| 1918 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 1919 | resets = <&cpg 1005>, |
| 1920 | <&cpg 1006>, <&cpg 1007>, |
| 1921 | <&cpg 1008>, <&cpg 1009>, |
| 1922 | <&cpg 1010>, <&cpg 1011>, |
| 1923 | <&cpg 1012>, <&cpg 1013>, |
| 1924 | <&cpg 1014>, <&cpg 1015>; |
| 1925 | reset-names = "ssi-all", |
| 1926 | "ssi.9", "ssi.8", "ssi.7", "ssi.6", |
| 1927 | "ssi.5", "ssi.4", "ssi.3", "ssi.2", |
| 1928 | "ssi.1", "ssi.0"; |
| 1929 | status = "disabled"; |
| 1930 | |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 1931 | rcar_sound,ctu { |
| 1932 | ctu00: ctu-0 { }; |
| 1933 | ctu01: ctu-1 { }; |
| 1934 | ctu02: ctu-2 { }; |
| 1935 | ctu03: ctu-3 { }; |
| 1936 | ctu10: ctu-4 { }; |
| 1937 | ctu11: ctu-5 { }; |
| 1938 | ctu12: ctu-6 { }; |
| 1939 | ctu13: ctu-7 { }; |
| 1940 | }; |
| 1941 | |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1942 | rcar_sound,dvc { |
| 1943 | dvc0: dvc-0 { |
| 1944 | dmas = <&audma1 0xbc>; |
| 1945 | dma-names = "tx"; |
| 1946 | }; |
| 1947 | dvc1: dvc-1 { |
| 1948 | dmas = <&audma1 0xbe>; |
| 1949 | dma-names = "tx"; |
| 1950 | }; |
| 1951 | }; |
| 1952 | |
| 1953 | rcar_sound,mix { |
| 1954 | mix0: mix-0 { }; |
| 1955 | mix1: mix-1 { }; |
| 1956 | }; |
| 1957 | |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 1958 | rcar_sound,src { |
| 1959 | src0: src-0 { |
| 1960 | interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; |
| 1961 | dmas = <&audma0 0x85>, <&audma1 0x9a>; |
| 1962 | dma-names = "rx", "tx"; |
| 1963 | }; |
| 1964 | src1: src-1 { |
| 1965 | interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; |
| 1966 | dmas = <&audma0 0x87>, <&audma1 0x9c>; |
| 1967 | dma-names = "rx", "tx"; |
| 1968 | }; |
| 1969 | src2: src-2 { |
| 1970 | interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; |
| 1971 | dmas = <&audma0 0x89>, <&audma1 0x9e>; |
| 1972 | dma-names = "rx", "tx"; |
| 1973 | }; |
| 1974 | src3: src-3 { |
| 1975 | interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; |
| 1976 | dmas = <&audma0 0x8b>, <&audma1 0xa0>; |
| 1977 | dma-names = "rx", "tx"; |
| 1978 | }; |
| 1979 | src4: src-4 { |
| 1980 | interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; |
| 1981 | dmas = <&audma0 0x8d>, <&audma1 0xb0>; |
| 1982 | dma-names = "rx", "tx"; |
| 1983 | }; |
| 1984 | src5: src-5 { |
| 1985 | interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; |
| 1986 | dmas = <&audma0 0x8f>, <&audma1 0xb2>; |
| 1987 | dma-names = "rx", "tx"; |
| 1988 | }; |
| 1989 | src6: src-6 { |
| 1990 | interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; |
| 1991 | dmas = <&audma0 0x91>, <&audma1 0xb4>; |
| 1992 | dma-names = "rx", "tx"; |
| 1993 | }; |
| 1994 | src7: src-7 { |
| 1995 | interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; |
| 1996 | dmas = <&audma0 0x93>, <&audma1 0xb6>; |
| 1997 | dma-names = "rx", "tx"; |
| 1998 | }; |
| 1999 | src8: src-8 { |
| 2000 | interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; |
| 2001 | dmas = <&audma0 0x95>, <&audma1 0xb8>; |
| 2002 | dma-names = "rx", "tx"; |
| 2003 | }; |
| 2004 | src9: src-9 { |
| 2005 | interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; |
| 2006 | dmas = <&audma0 0x97>, <&audma1 0xba>; |
| 2007 | dma-names = "rx", "tx"; |
| 2008 | }; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2009 | }; |
| 2010 | |
| 2011 | rcar_sound,ssi { |
| 2012 | ssi0: ssi-0 { |
| 2013 | interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; |
| 2014 | dmas = <&audma0 0x01>, <&audma1 0x02>; |
| 2015 | dma-names = "rx", "tx"; |
| 2016 | }; |
| 2017 | ssi1: ssi-1 { |
| 2018 | interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; |
| 2019 | dmas = <&audma0 0x03>, <&audma1 0x04>; |
| 2020 | dma-names = "rx", "tx"; |
| 2021 | }; |
| 2022 | ssi2: ssi-2 { |
| 2023 | interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; |
| 2024 | dmas = <&audma0 0x05>, <&audma1 0x06>; |
| 2025 | dma-names = "rx", "tx"; |
| 2026 | }; |
| 2027 | ssi3: ssi-3 { |
| 2028 | interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; |
| 2029 | dmas = <&audma0 0x07>, <&audma1 0x08>; |
| 2030 | dma-names = "rx", "tx"; |
| 2031 | }; |
| 2032 | ssi4: ssi-4 { |
| 2033 | interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; |
| 2034 | dmas = <&audma0 0x09>, <&audma1 0x0a>; |
| 2035 | dma-names = "rx", "tx"; |
| 2036 | }; |
| 2037 | ssi5: ssi-5 { |
| 2038 | interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; |
| 2039 | dmas = <&audma0 0x0b>, <&audma1 0x0c>; |
| 2040 | dma-names = "rx", "tx"; |
| 2041 | }; |
| 2042 | ssi6: ssi-6 { |
| 2043 | interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; |
| 2044 | dmas = <&audma0 0x0d>, <&audma1 0x0e>; |
| 2045 | dma-names = "rx", "tx"; |
| 2046 | }; |
| 2047 | ssi7: ssi-7 { |
| 2048 | interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; |
| 2049 | dmas = <&audma0 0x0f>, <&audma1 0x10>; |
| 2050 | dma-names = "rx", "tx"; |
| 2051 | }; |
| 2052 | ssi8: ssi-8 { |
| 2053 | interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; |
| 2054 | dmas = <&audma0 0x11>, <&audma1 0x12>; |
| 2055 | dma-names = "rx", "tx"; |
| 2056 | }; |
| 2057 | ssi9: ssi-9 { |
| 2058 | interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; |
| 2059 | dmas = <&audma0 0x13>, <&audma1 0x14>; |
| 2060 | dma-names = "rx", "tx"; |
| 2061 | }; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2062 | }; |
| 2063 | |
| 2064 | rcar_sound,ssiu { |
| 2065 | ssiu00: ssiu-0 { |
| 2066 | dmas = <&audma0 0x15>, <&audma1 0x16>; |
| 2067 | dma-names = "rx", "tx"; |
| 2068 | }; |
| 2069 | ssiu01: ssiu-1 { |
| 2070 | dmas = <&audma0 0x35>, <&audma1 0x36>; |
| 2071 | dma-names = "rx", "tx"; |
| 2072 | }; |
| 2073 | ssiu02: ssiu-2 { |
| 2074 | dmas = <&audma0 0x37>, <&audma1 0x38>; |
| 2075 | dma-names = "rx", "tx"; |
| 2076 | }; |
| 2077 | ssiu03: ssiu-3 { |
| 2078 | dmas = <&audma0 0x47>, <&audma1 0x48>; |
| 2079 | dma-names = "rx", "tx"; |
| 2080 | }; |
| 2081 | ssiu04: ssiu-4 { |
| 2082 | dmas = <&audma0 0x3F>, <&audma1 0x40>; |
| 2083 | dma-names = "rx", "tx"; |
| 2084 | }; |
| 2085 | ssiu05: ssiu-5 { |
| 2086 | dmas = <&audma0 0x43>, <&audma1 0x44>; |
| 2087 | dma-names = "rx", "tx"; |
| 2088 | }; |
| 2089 | ssiu06: ssiu-6 { |
| 2090 | dmas = <&audma0 0x4F>, <&audma1 0x50>; |
| 2091 | dma-names = "rx", "tx"; |
| 2092 | }; |
| 2093 | ssiu07: ssiu-7 { |
| 2094 | dmas = <&audma0 0x53>, <&audma1 0x54>; |
| 2095 | dma-names = "rx", "tx"; |
| 2096 | }; |
| 2097 | ssiu10: ssiu-8 { |
| 2098 | dmas = <&audma0 0x49>, <&audma1 0x4a>; |
| 2099 | dma-names = "rx", "tx"; |
| 2100 | }; |
| 2101 | ssiu11: ssiu-9 { |
| 2102 | dmas = <&audma0 0x4B>, <&audma1 0x4C>; |
| 2103 | dma-names = "rx", "tx"; |
| 2104 | }; |
| 2105 | ssiu12: ssiu-10 { |
| 2106 | dmas = <&audma0 0x57>, <&audma1 0x58>; |
| 2107 | dma-names = "rx", "tx"; |
| 2108 | }; |
| 2109 | ssiu13: ssiu-11 { |
| 2110 | dmas = <&audma0 0x59>, <&audma1 0x5A>; |
| 2111 | dma-names = "rx", "tx"; |
| 2112 | }; |
| 2113 | ssiu14: ssiu-12 { |
| 2114 | dmas = <&audma0 0x5F>, <&audma1 0x60>; |
| 2115 | dma-names = "rx", "tx"; |
| 2116 | }; |
| 2117 | ssiu15: ssiu-13 { |
| 2118 | dmas = <&audma0 0xC3>, <&audma1 0xC4>; |
| 2119 | dma-names = "rx", "tx"; |
| 2120 | }; |
| 2121 | ssiu16: ssiu-14 { |
| 2122 | dmas = <&audma0 0xC7>, <&audma1 0xC8>; |
| 2123 | dma-names = "rx", "tx"; |
| 2124 | }; |
| 2125 | ssiu17: ssiu-15 { |
| 2126 | dmas = <&audma0 0xCB>, <&audma1 0xCC>; |
| 2127 | dma-names = "rx", "tx"; |
| 2128 | }; |
| 2129 | ssiu20: ssiu-16 { |
| 2130 | dmas = <&audma0 0x63>, <&audma1 0x64>; |
| 2131 | dma-names = "rx", "tx"; |
| 2132 | }; |
| 2133 | ssiu21: ssiu-17 { |
| 2134 | dmas = <&audma0 0x67>, <&audma1 0x68>; |
| 2135 | dma-names = "rx", "tx"; |
| 2136 | }; |
| 2137 | ssiu22: ssiu-18 { |
| 2138 | dmas = <&audma0 0x6B>, <&audma1 0x6C>; |
| 2139 | dma-names = "rx", "tx"; |
| 2140 | }; |
| 2141 | ssiu23: ssiu-19 { |
| 2142 | dmas = <&audma0 0x6D>, <&audma1 0x6E>; |
| 2143 | dma-names = "rx", "tx"; |
| 2144 | }; |
| 2145 | ssiu24: ssiu-20 { |
| 2146 | dmas = <&audma0 0xCF>, <&audma1 0xCE>; |
| 2147 | dma-names = "rx", "tx"; |
| 2148 | }; |
| 2149 | ssiu25: ssiu-21 { |
| 2150 | dmas = <&audma0 0xEB>, <&audma1 0xEC>; |
| 2151 | dma-names = "rx", "tx"; |
| 2152 | }; |
| 2153 | ssiu26: ssiu-22 { |
| 2154 | dmas = <&audma0 0xED>, <&audma1 0xEE>; |
| 2155 | dma-names = "rx", "tx"; |
| 2156 | }; |
| 2157 | ssiu27: ssiu-23 { |
| 2158 | dmas = <&audma0 0xEF>, <&audma1 0xF0>; |
| 2159 | dma-names = "rx", "tx"; |
| 2160 | }; |
| 2161 | ssiu30: ssiu-24 { |
| 2162 | dmas = <&audma0 0x6f>, <&audma1 0x70>; |
| 2163 | dma-names = "rx", "tx"; |
| 2164 | }; |
| 2165 | ssiu31: ssiu-25 { |
| 2166 | dmas = <&audma0 0x21>, <&audma1 0x22>; |
| 2167 | dma-names = "rx", "tx"; |
| 2168 | }; |
| 2169 | ssiu32: ssiu-26 { |
| 2170 | dmas = <&audma0 0x23>, <&audma1 0x24>; |
| 2171 | dma-names = "rx", "tx"; |
| 2172 | }; |
| 2173 | ssiu33: ssiu-27 { |
| 2174 | dmas = <&audma0 0x25>, <&audma1 0x26>; |
| 2175 | dma-names = "rx", "tx"; |
| 2176 | }; |
| 2177 | ssiu34: ssiu-28 { |
| 2178 | dmas = <&audma0 0x27>, <&audma1 0x28>; |
| 2179 | dma-names = "rx", "tx"; |
| 2180 | }; |
| 2181 | ssiu35: ssiu-29 { |
| 2182 | dmas = <&audma0 0x29>, <&audma1 0x2A>; |
| 2183 | dma-names = "rx", "tx"; |
| 2184 | }; |
| 2185 | ssiu36: ssiu-30 { |
| 2186 | dmas = <&audma0 0x2B>, <&audma1 0x2C>; |
| 2187 | dma-names = "rx", "tx"; |
| 2188 | }; |
| 2189 | ssiu37: ssiu-31 { |
| 2190 | dmas = <&audma0 0x2D>, <&audma1 0x2E>; |
| 2191 | dma-names = "rx", "tx"; |
| 2192 | }; |
| 2193 | ssiu40: ssiu-32 { |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2194 | dmas = <&audma0 0x71>, <&audma1 0x72>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2195 | dma-names = "rx", "tx"; |
| 2196 | }; |
| 2197 | ssiu41: ssiu-33 { |
| 2198 | dmas = <&audma0 0x17>, <&audma1 0x18>; |
| 2199 | dma-names = "rx", "tx"; |
| 2200 | }; |
| 2201 | ssiu42: ssiu-34 { |
| 2202 | dmas = <&audma0 0x19>, <&audma1 0x1A>; |
| 2203 | dma-names = "rx", "tx"; |
| 2204 | }; |
| 2205 | ssiu43: ssiu-35 { |
| 2206 | dmas = <&audma0 0x1B>, <&audma1 0x1C>; |
| 2207 | dma-names = "rx", "tx"; |
| 2208 | }; |
| 2209 | ssiu44: ssiu-36 { |
| 2210 | dmas = <&audma0 0x1D>, <&audma1 0x1E>; |
| 2211 | dma-names = "rx", "tx"; |
| 2212 | }; |
| 2213 | ssiu45: ssiu-37 { |
| 2214 | dmas = <&audma0 0x1F>, <&audma1 0x20>; |
| 2215 | dma-names = "rx", "tx"; |
| 2216 | }; |
| 2217 | ssiu46: ssiu-38 { |
| 2218 | dmas = <&audma0 0x31>, <&audma1 0x32>; |
| 2219 | dma-names = "rx", "tx"; |
| 2220 | }; |
| 2221 | ssiu47: ssiu-39 { |
| 2222 | dmas = <&audma0 0x33>, <&audma1 0x34>; |
| 2223 | dma-names = "rx", "tx"; |
| 2224 | }; |
| 2225 | ssiu50: ssiu-40 { |
| 2226 | dmas = <&audma0 0x73>, <&audma1 0x74>; |
| 2227 | dma-names = "rx", "tx"; |
| 2228 | }; |
| 2229 | ssiu60: ssiu-41 { |
| 2230 | dmas = <&audma0 0x75>, <&audma1 0x76>; |
| 2231 | dma-names = "rx", "tx"; |
| 2232 | }; |
| 2233 | ssiu70: ssiu-42 { |
| 2234 | dmas = <&audma0 0x79>, <&audma1 0x7a>; |
| 2235 | dma-names = "rx", "tx"; |
| 2236 | }; |
| 2237 | ssiu80: ssiu-43 { |
| 2238 | dmas = <&audma0 0x7b>, <&audma1 0x7c>; |
| 2239 | dma-names = "rx", "tx"; |
| 2240 | }; |
| 2241 | ssiu90: ssiu-44 { |
| 2242 | dmas = <&audma0 0x7d>, <&audma1 0x7e>; |
| 2243 | dma-names = "rx", "tx"; |
| 2244 | }; |
| 2245 | ssiu91: ssiu-45 { |
| 2246 | dmas = <&audma0 0x7F>, <&audma1 0x80>; |
| 2247 | dma-names = "rx", "tx"; |
| 2248 | }; |
| 2249 | ssiu92: ssiu-46 { |
| 2250 | dmas = <&audma0 0x81>, <&audma1 0x82>; |
| 2251 | dma-names = "rx", "tx"; |
| 2252 | }; |
| 2253 | ssiu93: ssiu-47 { |
| 2254 | dmas = <&audma0 0x83>, <&audma1 0x84>; |
| 2255 | dma-names = "rx", "tx"; |
| 2256 | }; |
| 2257 | ssiu94: ssiu-48 { |
| 2258 | dmas = <&audma0 0xA3>, <&audma1 0xA4>; |
| 2259 | dma-names = "rx", "tx"; |
| 2260 | }; |
| 2261 | ssiu95: ssiu-49 { |
| 2262 | dmas = <&audma0 0xA5>, <&audma1 0xA6>; |
| 2263 | dma-names = "rx", "tx"; |
| 2264 | }; |
| 2265 | ssiu96: ssiu-50 { |
| 2266 | dmas = <&audma0 0xA7>, <&audma1 0xA8>; |
| 2267 | dma-names = "rx", "tx"; |
| 2268 | }; |
| 2269 | ssiu97: ssiu-51 { |
| 2270 | dmas = <&audma0 0xA9>, <&audma1 0xAA>; |
| 2271 | dma-names = "rx", "tx"; |
| 2272 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2273 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2274 | }; |
| 2275 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2276 | mlp: mlp@ec520000 { |
| 2277 | compatible = "renesas,r8a7796-mlp", |
| 2278 | "renesas,rcar-gen3-mlp"; |
| 2279 | reg = <0 0xec520000 0 0x800>; |
| 2280 | interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, |
| 2281 | <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; |
| 2282 | clocks = <&cpg CPG_MOD 802>; |
| 2283 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2284 | resets = <&cpg 802>; |
| 2285 | status = "disabled"; |
| 2286 | }; |
| 2287 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2288 | audma0: dma-controller@ec700000 { |
| 2289 | compatible = "renesas,dmac-r8a7796", |
| 2290 | "renesas,rcar-dmac"; |
| 2291 | reg = <0 0xec700000 0 0x10000>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2292 | interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, |
| 2293 | <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, |
| 2294 | <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, |
| 2295 | <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, |
| 2296 | <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, |
| 2297 | <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, |
| 2298 | <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, |
| 2299 | <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, |
| 2300 | <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, |
| 2301 | <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, |
| 2302 | <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, |
| 2303 | <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, |
| 2304 | <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, |
| 2305 | <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, |
| 2306 | <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, |
| 2307 | <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, |
| 2308 | <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2309 | interrupt-names = "error", |
| 2310 | "ch0", "ch1", "ch2", "ch3", |
| 2311 | "ch4", "ch5", "ch6", "ch7", |
| 2312 | "ch8", "ch9", "ch10", "ch11", |
| 2313 | "ch12", "ch13", "ch14", "ch15"; |
| 2314 | clocks = <&cpg CPG_MOD 502>; |
| 2315 | clock-names = "fck"; |
| 2316 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2317 | resets = <&cpg 502>; |
| 2318 | #dma-cells = <1>; |
| 2319 | dma-channels = <16>; |
| 2320 | iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, |
| 2321 | <&ipmmu_mp 2>, <&ipmmu_mp 3>, |
| 2322 | <&ipmmu_mp 4>, <&ipmmu_mp 5>, |
| 2323 | <&ipmmu_mp 6>, <&ipmmu_mp 7>, |
| 2324 | <&ipmmu_mp 8>, <&ipmmu_mp 9>, |
| 2325 | <&ipmmu_mp 10>, <&ipmmu_mp 11>, |
| 2326 | <&ipmmu_mp 12>, <&ipmmu_mp 13>, |
| 2327 | <&ipmmu_mp 14>, <&ipmmu_mp 15>; |
| 2328 | }; |
| 2329 | |
| 2330 | audma1: dma-controller@ec720000 { |
| 2331 | compatible = "renesas,dmac-r8a7796", |
| 2332 | "renesas,rcar-dmac"; |
| 2333 | reg = <0 0xec720000 0 0x10000>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2334 | interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, |
| 2335 | <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, |
| 2336 | <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, |
| 2337 | <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, |
| 2338 | <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, |
| 2339 | <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, |
| 2340 | <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, |
| 2341 | <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, |
| 2342 | <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, |
| 2343 | <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, |
| 2344 | <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, |
| 2345 | <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, |
| 2346 | <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, |
| 2347 | <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, |
| 2348 | <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, |
| 2349 | <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, |
| 2350 | <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2351 | interrupt-names = "error", |
| 2352 | "ch0", "ch1", "ch2", "ch3", |
| 2353 | "ch4", "ch5", "ch6", "ch7", |
| 2354 | "ch8", "ch9", "ch10", "ch11", |
| 2355 | "ch12", "ch13", "ch14", "ch15"; |
| 2356 | clocks = <&cpg CPG_MOD 501>; |
| 2357 | clock-names = "fck"; |
| 2358 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2359 | resets = <&cpg 501>; |
| 2360 | #dma-cells = <1>; |
| 2361 | dma-channels = <16>; |
| 2362 | iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, |
| 2363 | <&ipmmu_mp 18>, <&ipmmu_mp 19>, |
| 2364 | <&ipmmu_mp 20>, <&ipmmu_mp 21>, |
| 2365 | <&ipmmu_mp 22>, <&ipmmu_mp 23>, |
| 2366 | <&ipmmu_mp 24>, <&ipmmu_mp 25>, |
| 2367 | <&ipmmu_mp 26>, <&ipmmu_mp 27>, |
| 2368 | <&ipmmu_mp 28>, <&ipmmu_mp 29>, |
| 2369 | <&ipmmu_mp 30>, <&ipmmu_mp 31>; |
| 2370 | }; |
| 2371 | |
| 2372 | xhci0: usb@ee000000 { |
| 2373 | compatible = "renesas,xhci-r8a7796", |
| 2374 | "renesas,rcar-gen3-xhci"; |
| 2375 | reg = <0 0xee000000 0 0xc00>; |
| 2376 | interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; |
| 2377 | clocks = <&cpg CPG_MOD 328>; |
| 2378 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2379 | resets = <&cpg 328>; |
| 2380 | status = "disabled"; |
| 2381 | }; |
| 2382 | |
| 2383 | usb3_peri0: usb@ee020000 { |
| 2384 | compatible = "renesas,r8a7796-usb3-peri", |
| 2385 | "renesas,rcar-gen3-usb3-peri"; |
| 2386 | reg = <0 0xee020000 0 0x400>; |
| 2387 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; |
| 2388 | clocks = <&cpg CPG_MOD 328>; |
| 2389 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2390 | resets = <&cpg 328>; |
| 2391 | status = "disabled"; |
| 2392 | }; |
| 2393 | |
| 2394 | ohci0: usb@ee080000 { |
| 2395 | compatible = "generic-ohci"; |
| 2396 | reg = <0 0xee080000 0 0x100>; |
| 2397 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2398 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2399 | phys = <&usb2_phy0 1>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2400 | phy-names = "usb"; |
| 2401 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2402 | resets = <&cpg 703>, <&cpg 704>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2403 | status = "disabled"; |
| 2404 | }; |
| 2405 | |
| 2406 | ohci1: usb@ee0a0000 { |
| 2407 | compatible = "generic-ohci"; |
| 2408 | reg = <0 0xee0a0000 0 0x100>; |
| 2409 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 2410 | clocks = <&cpg CPG_MOD 702>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2411 | phys = <&usb2_phy1 1>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2412 | phy-names = "usb"; |
| 2413 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2414 | resets = <&cpg 702>; |
| 2415 | status = "disabled"; |
| 2416 | }; |
| 2417 | |
| 2418 | ehci0: usb@ee080100 { |
| 2419 | compatible = "generic-ehci"; |
| 2420 | reg = <0 0xee080100 0 0x100>; |
| 2421 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2422 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2423 | phys = <&usb2_phy0 2>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2424 | phy-names = "usb"; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2425 | companion = <&ohci0>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2426 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2427 | resets = <&cpg 703>, <&cpg 704>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2428 | status = "disabled"; |
| 2429 | }; |
| 2430 | |
| 2431 | ehci1: usb@ee0a0100 { |
| 2432 | compatible = "generic-ehci"; |
| 2433 | reg = <0 0xee0a0100 0 0x100>; |
| 2434 | interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; |
| 2435 | clocks = <&cpg CPG_MOD 702>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2436 | phys = <&usb2_phy1 2>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2437 | phy-names = "usb"; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2438 | companion = <&ohci1>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2439 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2440 | resets = <&cpg 702>; |
| 2441 | status = "disabled"; |
| 2442 | }; |
| 2443 | |
| 2444 | usb2_phy0: usb-phy@ee080200 { |
| 2445 | compatible = "renesas,usb2-phy-r8a7796", |
| 2446 | "renesas,rcar-gen3-usb2-phy"; |
| 2447 | reg = <0 0xee080200 0 0x700>; |
| 2448 | interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2449 | clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2450 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2451 | resets = <&cpg 703>, <&cpg 704>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2452 | #phy-cells = <1>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2453 | status = "disabled"; |
| 2454 | }; |
| 2455 | |
| 2456 | usb2_phy1: usb-phy@ee0a0200 { |
| 2457 | compatible = "renesas,usb2-phy-r8a7796", |
| 2458 | "renesas,rcar-gen3-usb2-phy"; |
| 2459 | reg = <0 0xee0a0200 0 0x700>; |
| 2460 | clocks = <&cpg CPG_MOD 702>; |
| 2461 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2462 | resets = <&cpg 702>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2463 | #phy-cells = <1>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2464 | status = "disabled"; |
| 2465 | }; |
| 2466 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2467 | sdhi0: mmc@ee100000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2468 | compatible = "renesas,sdhi-r8a7796", |
| 2469 | "renesas,rcar-gen3-sdhi"; |
| 2470 | reg = <0 0xee100000 0 0x2000>; |
| 2471 | interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2472 | clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A7796_CLK_SD0H>; |
| 2473 | clock-names = "core", "clkh"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2474 | max-frequency = <200000000>; |
| 2475 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2476 | resets = <&cpg 314>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2477 | iommus = <&ipmmu_ds1 32>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2478 | status = "disabled"; |
| 2479 | }; |
| 2480 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2481 | sdhi1: mmc@ee120000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2482 | compatible = "renesas,sdhi-r8a7796", |
| 2483 | "renesas,rcar-gen3-sdhi"; |
| 2484 | reg = <0 0xee120000 0 0x2000>; |
| 2485 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2486 | clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A7796_CLK_SD1H>; |
| 2487 | clock-names = "core", "clkh"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2488 | max-frequency = <200000000>; |
| 2489 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2490 | resets = <&cpg 313>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2491 | iommus = <&ipmmu_ds1 33>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2492 | status = "disabled"; |
| 2493 | }; |
| 2494 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2495 | sdhi2: mmc@ee140000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2496 | compatible = "renesas,sdhi-r8a7796", |
| 2497 | "renesas,rcar-gen3-sdhi"; |
| 2498 | reg = <0 0xee140000 0 0x2000>; |
| 2499 | interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2500 | clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A7796_CLK_SD2H>; |
| 2501 | clock-names = "core", "clkh"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2502 | max-frequency = <200000000>; |
| 2503 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2504 | resets = <&cpg 312>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2505 | iommus = <&ipmmu_ds1 34>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2506 | status = "disabled"; |
| 2507 | }; |
| 2508 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2509 | sdhi3: mmc@ee160000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2510 | compatible = "renesas,sdhi-r8a7796", |
| 2511 | "renesas,rcar-gen3-sdhi"; |
| 2512 | reg = <0 0xee160000 0 0x2000>; |
| 2513 | interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2514 | clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A7796_CLK_SD3H>; |
| 2515 | clock-names = "core", "clkh"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2516 | max-frequency = <200000000>; |
| 2517 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2518 | resets = <&cpg 311>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2519 | iommus = <&ipmmu_ds1 35>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2520 | status = "disabled"; |
| 2521 | }; |
| 2522 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2523 | rpc: spi@ee200000 { |
| 2524 | compatible = "renesas,r8a7796-rpc-if", |
| 2525 | "renesas,rcar-gen3-rpc-if"; |
| 2526 | reg = <0 0xee200000 0 0x200>, |
| 2527 | <0 0x08000000 0 0x04000000>, |
| 2528 | <0 0xee208000 0 0x100>; |
| 2529 | reg-names = "regs", "dirmap", "wbuf"; |
| 2530 | interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; |
| 2531 | clocks = <&cpg CPG_MOD 917>; |
| 2532 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2533 | resets = <&cpg 917>; |
| 2534 | #address-cells = <1>; |
| 2535 | #size-cells = <0>; |
| 2536 | status = "disabled"; |
| 2537 | }; |
| 2538 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2539 | gic: interrupt-controller@f1010000 { |
| 2540 | compatible = "arm,gic-400"; |
| 2541 | #interrupt-cells = <3>; |
| 2542 | #address-cells = <0>; |
| 2543 | interrupt-controller; |
| 2544 | reg = <0x0 0xf1010000 0 0x1000>, |
| 2545 | <0x0 0xf1020000 0 0x20000>, |
| 2546 | <0x0 0xf1040000 0 0x20000>, |
| 2547 | <0x0 0xf1060000 0 0x20000>; |
| 2548 | interrupts = <GIC_PPI 9 |
| 2549 | (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; |
| 2550 | clocks = <&cpg CPG_MOD 408>; |
| 2551 | clock-names = "clk"; |
| 2552 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2553 | resets = <&cpg 408>; |
| 2554 | }; |
| 2555 | |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2556 | pciec0: pcie@fe000000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2557 | compatible = "renesas,pcie-r8a7796", |
| 2558 | "renesas,pcie-rcar-gen3"; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 2559 | reg = <0 0xfe000000 0 0x80000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2560 | #address-cells = <3>; |
| 2561 | #size-cells = <2>; |
| 2562 | bus-range = <0x00 0xff>; |
| 2563 | device_type = "pci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2564 | ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, |
| 2565 | <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, |
| 2566 | <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, |
| 2567 | <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; |
Marek Vasut | 9c41af8 | 2023-09-17 16:13:05 +0200 | [diff] [blame] | 2568 | /* Map all possible DDR/IOMMU as inbound ranges */ |
| 2569 | dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2570 | interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
| 2571 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, |
| 2572 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; |
| 2573 | #interrupt-cells = <1>; |
| 2574 | interrupt-map-mask = <0 0 0 0>; |
| 2575 | interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; |
| 2576 | clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; |
| 2577 | clock-names = "pcie", "pcie_bus"; |
| 2578 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2579 | resets = <&cpg 319>; |
Marek Vasut | 9c41af8 | 2023-09-17 16:13:05 +0200 | [diff] [blame] | 2580 | iommu-map = <0 &ipmmu_hc 0 1>; |
| 2581 | iommu-map-mask = <0>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2582 | status = "disabled"; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2583 | }; |
| 2584 | |
| 2585 | pciec1: pcie@ee800000 { |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2586 | compatible = "renesas,pcie-r8a7796", |
| 2587 | "renesas,pcie-rcar-gen3"; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 2588 | reg = <0 0xee800000 0 0x80000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2589 | #address-cells = <3>; |
| 2590 | #size-cells = <2>; |
| 2591 | bus-range = <0x00 0xff>; |
| 2592 | device_type = "pci"; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2593 | ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, |
| 2594 | <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, |
| 2595 | <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, |
| 2596 | <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; |
Marek Vasut | 9c41af8 | 2023-09-17 16:13:05 +0200 | [diff] [blame] | 2597 | /* Map all possible DDR/IOMMU as inbound ranges */ |
| 2598 | dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2599 | interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, |
| 2600 | <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, |
| 2601 | <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; |
| 2602 | #interrupt-cells = <1>; |
| 2603 | interrupt-map-mask = <0 0 0 0>; |
| 2604 | interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; |
| 2605 | clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; |
| 2606 | clock-names = "pcie", "pcie_bus"; |
| 2607 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2608 | resets = <&cpg 318>; |
Marek Vasut | 9c41af8 | 2023-09-17 16:13:05 +0200 | [diff] [blame] | 2609 | iommu-map = <0 &ipmmu_hc 1 1>; |
| 2610 | iommu-map-mask = <0>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2611 | status = "disabled"; |
| 2612 | }; |
| 2613 | |
| 2614 | imr-lx4@fe860000 { |
| 2615 | compatible = "renesas,r8a7796-imr-lx4", |
| 2616 | "renesas,imr-lx4"; |
| 2617 | reg = <0 0xfe860000 0 0x2000>; |
| 2618 | interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; |
| 2619 | clocks = <&cpg CPG_MOD 823>; |
| 2620 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2621 | resets = <&cpg 823>; |
| 2622 | }; |
| 2623 | |
| 2624 | imr-lx4@fe870000 { |
| 2625 | compatible = "renesas,r8a7796-imr-lx4", |
| 2626 | "renesas,imr-lx4"; |
| 2627 | reg = <0 0xfe870000 0 0x2000>; |
| 2628 | interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; |
| 2629 | clocks = <&cpg CPG_MOD 822>; |
| 2630 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2631 | resets = <&cpg 822>; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2632 | }; |
| 2633 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 2634 | fdp1@fe940000 { |
| 2635 | compatible = "renesas,fdp1"; |
| 2636 | reg = <0 0xfe940000 0 0x2400>; |
| 2637 | interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; |
| 2638 | clocks = <&cpg CPG_MOD 119>; |
| 2639 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2640 | resets = <&cpg 119>; |
| 2641 | renesas,fcp = <&fcpf0>; |
| 2642 | }; |
| 2643 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2644 | fcpf0: fcp@fe950000 { |
| 2645 | compatible = "renesas,fcpf"; |
| 2646 | reg = <0 0xfe950000 0 0x200>; |
| 2647 | clocks = <&cpg CPG_MOD 615>; |
| 2648 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2649 | resets = <&cpg 615>; |
| 2650 | }; |
| 2651 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2652 | fcpvb0: fcp@fe96f000 { |
| 2653 | compatible = "renesas,fcpv"; |
| 2654 | reg = <0 0xfe96f000 0 0x200>; |
| 2655 | clocks = <&cpg CPG_MOD 607>; |
| 2656 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2657 | resets = <&cpg 607>; |
| 2658 | }; |
| 2659 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2660 | fcpvi0: fcp@fe9af000 { |
| 2661 | compatible = "renesas,fcpv"; |
| 2662 | reg = <0 0xfe9af000 0 0x200>; |
| 2663 | clocks = <&cpg CPG_MOD 611>; |
| 2664 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2665 | resets = <&cpg 611>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 2666 | iommus = <&ipmmu_vc0 19>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2667 | }; |
| 2668 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2669 | fcpvd0: fcp@fea27000 { |
| 2670 | compatible = "renesas,fcpv"; |
| 2671 | reg = <0 0xfea27000 0 0x200>; |
| 2672 | clocks = <&cpg CPG_MOD 603>; |
| 2673 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2674 | resets = <&cpg 603>; |
| 2675 | iommus = <&ipmmu_vi0 8>; |
| 2676 | }; |
| 2677 | |
| 2678 | fcpvd1: fcp@fea2f000 { |
| 2679 | compatible = "renesas,fcpv"; |
| 2680 | reg = <0 0xfea2f000 0 0x200>; |
| 2681 | clocks = <&cpg CPG_MOD 602>; |
| 2682 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2683 | resets = <&cpg 602>; |
| 2684 | iommus = <&ipmmu_vi0 9>; |
| 2685 | }; |
| 2686 | |
| 2687 | fcpvd2: fcp@fea37000 { |
| 2688 | compatible = "renesas,fcpv"; |
| 2689 | reg = <0 0xfea37000 0 0x200>; |
| 2690 | clocks = <&cpg CPG_MOD 601>; |
| 2691 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2692 | resets = <&cpg 601>; |
| 2693 | iommus = <&ipmmu_vi0 10>; |
| 2694 | }; |
| 2695 | |
| 2696 | vspb: vsp@fe960000 { |
| 2697 | compatible = "renesas,vsp2"; |
| 2698 | reg = <0 0xfe960000 0 0x8000>; |
| 2699 | interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; |
| 2700 | clocks = <&cpg CPG_MOD 626>; |
| 2701 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2702 | resets = <&cpg 626>; |
| 2703 | |
| 2704 | renesas,fcp = <&fcpvb0>; |
| 2705 | }; |
| 2706 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2707 | vspd0: vsp@fea20000 { |
| 2708 | compatible = "renesas,vsp2"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2709 | reg = <0 0xfea20000 0 0x5000>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2710 | interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; |
| 2711 | clocks = <&cpg CPG_MOD 623>; |
| 2712 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2713 | resets = <&cpg 623>; |
| 2714 | |
| 2715 | renesas,fcp = <&fcpvd0>; |
| 2716 | }; |
| 2717 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2718 | vspd1: vsp@fea28000 { |
| 2719 | compatible = "renesas,vsp2"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2720 | reg = <0 0xfea28000 0 0x5000>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2721 | interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; |
| 2722 | clocks = <&cpg CPG_MOD 622>; |
| 2723 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2724 | resets = <&cpg 622>; |
| 2725 | |
| 2726 | renesas,fcp = <&fcpvd1>; |
| 2727 | }; |
| 2728 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2729 | vspd2: vsp@fea30000 { |
| 2730 | compatible = "renesas,vsp2"; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2731 | reg = <0 0xfea30000 0 0x5000>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2732 | interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; |
| 2733 | clocks = <&cpg CPG_MOD 621>; |
| 2734 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2735 | resets = <&cpg 621>; |
| 2736 | |
| 2737 | renesas,fcp = <&fcpvd2>; |
| 2738 | }; |
| 2739 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2740 | vspi0: vsp@fe9a0000 { |
| 2741 | compatible = "renesas,vsp2"; |
| 2742 | reg = <0 0xfe9a0000 0 0x8000>; |
| 2743 | interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; |
| 2744 | clocks = <&cpg CPG_MOD 631>; |
| 2745 | power-domains = <&sysc R8A7796_PD_A3VC>; |
| 2746 | resets = <&cpg 631>; |
| 2747 | |
| 2748 | renesas,fcp = <&fcpvi0>; |
| 2749 | }; |
| 2750 | |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2751 | cmm0: cmm@fea40000 { |
| 2752 | compatible = "renesas,r8a7796-cmm", |
| 2753 | "renesas,rcar-gen3-cmm"; |
| 2754 | reg = <0 0xfea40000 0 0x1000>; |
| 2755 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2756 | clocks = <&cpg CPG_MOD 711>; |
| 2757 | resets = <&cpg 711>; |
| 2758 | }; |
| 2759 | |
| 2760 | cmm1: cmm@fea50000 { |
| 2761 | compatible = "renesas,r8a7796-cmm", |
| 2762 | "renesas,rcar-gen3-cmm"; |
| 2763 | reg = <0 0xfea50000 0 0x1000>; |
| 2764 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2765 | clocks = <&cpg CPG_MOD 710>; |
| 2766 | resets = <&cpg 710>; |
| 2767 | }; |
| 2768 | |
| 2769 | cmm2: cmm@fea60000 { |
| 2770 | compatible = "renesas,r8a7796-cmm", |
| 2771 | "renesas,rcar-gen3-cmm"; |
| 2772 | reg = <0 0xfea60000 0 0x1000>; |
| 2773 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2774 | clocks = <&cpg CPG_MOD 709>; |
| 2775 | resets = <&cpg 709>; |
| 2776 | }; |
| 2777 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2778 | csi20: csi2@fea80000 { |
| 2779 | compatible = "renesas,r8a7796-csi2"; |
| 2780 | reg = <0 0xfea80000 0 0x10000>; |
| 2781 | interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; |
| 2782 | clocks = <&cpg CPG_MOD 714>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2783 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2784 | resets = <&cpg 714>; |
| 2785 | status = "disabled"; |
| 2786 | |
| 2787 | ports { |
| 2788 | #address-cells = <1>; |
| 2789 | #size-cells = <0>; |
| 2790 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2791 | port@0 { |
| 2792 | reg = <0>; |
| 2793 | }; |
| 2794 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2795 | port@1 { |
| 2796 | #address-cells = <1>; |
| 2797 | #size-cells = <0>; |
| 2798 | |
| 2799 | reg = <1>; |
| 2800 | |
| 2801 | csi20vin0: endpoint@0 { |
| 2802 | reg = <0>; |
| 2803 | remote-endpoint = <&vin0csi20>; |
| 2804 | }; |
| 2805 | csi20vin1: endpoint@1 { |
| 2806 | reg = <1>; |
| 2807 | remote-endpoint = <&vin1csi20>; |
| 2808 | }; |
| 2809 | csi20vin2: endpoint@2 { |
| 2810 | reg = <2>; |
| 2811 | remote-endpoint = <&vin2csi20>; |
| 2812 | }; |
| 2813 | csi20vin3: endpoint@3 { |
| 2814 | reg = <3>; |
| 2815 | remote-endpoint = <&vin3csi20>; |
| 2816 | }; |
| 2817 | csi20vin4: endpoint@4 { |
| 2818 | reg = <4>; |
| 2819 | remote-endpoint = <&vin4csi20>; |
| 2820 | }; |
| 2821 | csi20vin5: endpoint@5 { |
| 2822 | reg = <5>; |
| 2823 | remote-endpoint = <&vin5csi20>; |
| 2824 | }; |
| 2825 | csi20vin6: endpoint@6 { |
| 2826 | reg = <6>; |
| 2827 | remote-endpoint = <&vin6csi20>; |
| 2828 | }; |
| 2829 | csi20vin7: endpoint@7 { |
| 2830 | reg = <7>; |
| 2831 | remote-endpoint = <&vin7csi20>; |
| 2832 | }; |
| 2833 | }; |
| 2834 | }; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2835 | }; |
| 2836 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2837 | csi40: csi2@feaa0000 { |
| 2838 | compatible = "renesas,r8a7796-csi2"; |
| 2839 | reg = <0 0xfeaa0000 0 0x10000>; |
| 2840 | interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; |
| 2841 | clocks = <&cpg CPG_MOD 716>; |
| 2842 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2843 | resets = <&cpg 716>; |
| 2844 | status = "disabled"; |
| 2845 | |
| 2846 | ports { |
| 2847 | #address-cells = <1>; |
| 2848 | #size-cells = <0>; |
| 2849 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2850 | port@0 { |
| 2851 | reg = <0>; |
| 2852 | }; |
| 2853 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2854 | port@1 { |
| 2855 | #address-cells = <1>; |
| 2856 | #size-cells = <0>; |
| 2857 | |
| 2858 | reg = <1>; |
| 2859 | |
| 2860 | csi40vin0: endpoint@0 { |
| 2861 | reg = <0>; |
| 2862 | remote-endpoint = <&vin0csi40>; |
| 2863 | }; |
| 2864 | csi40vin1: endpoint@1 { |
| 2865 | reg = <1>; |
| 2866 | remote-endpoint = <&vin1csi40>; |
| 2867 | }; |
| 2868 | csi40vin2: endpoint@2 { |
| 2869 | reg = <2>; |
| 2870 | remote-endpoint = <&vin2csi40>; |
| 2871 | }; |
| 2872 | csi40vin3: endpoint@3 { |
| 2873 | reg = <3>; |
| 2874 | remote-endpoint = <&vin3csi40>; |
| 2875 | }; |
| 2876 | csi40vin4: endpoint@4 { |
| 2877 | reg = <4>; |
| 2878 | remote-endpoint = <&vin4csi40>; |
| 2879 | }; |
| 2880 | csi40vin5: endpoint@5 { |
| 2881 | reg = <5>; |
| 2882 | remote-endpoint = <&vin5csi40>; |
| 2883 | }; |
| 2884 | csi40vin6: endpoint@6 { |
| 2885 | reg = <6>; |
| 2886 | remote-endpoint = <&vin6csi40>; |
| 2887 | }; |
| 2888 | csi40vin7: endpoint@7 { |
| 2889 | reg = <7>; |
| 2890 | remote-endpoint = <&vin7csi40>; |
| 2891 | }; |
| 2892 | }; |
| 2893 | |
| 2894 | }; |
| 2895 | }; |
| 2896 | |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2897 | hdmi0: hdmi@fead0000 { |
| 2898 | compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; |
| 2899 | reg = <0 0xfead0000 0 0x10000>; |
| 2900 | interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; |
| 2901 | clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; |
| 2902 | clock-names = "iahb", "isfr"; |
| 2903 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2904 | resets = <&cpg 729>; |
| 2905 | status = "disabled"; |
| 2906 | |
| 2907 | ports { |
| 2908 | #address-cells = <1>; |
| 2909 | #size-cells = <0>; |
| 2910 | port@0 { |
| 2911 | reg = <0>; |
| 2912 | dw_hdmi0_in: endpoint { |
| 2913 | remote-endpoint = <&du_out_hdmi0>; |
| 2914 | }; |
| 2915 | }; |
| 2916 | port@1 { |
| 2917 | reg = <1>; |
| 2918 | }; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2919 | port@2 { |
| 2920 | /* HDMI sound */ |
| 2921 | reg = <2>; |
| 2922 | }; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2923 | }; |
| 2924 | }; |
| 2925 | |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2926 | du: display@feb00000 { |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2927 | compatible = "renesas,du-r8a7796"; |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2928 | reg = <0 0xfeb00000 0 0x70000>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2929 | interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, |
| 2930 | <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, |
| 2931 | <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2932 | clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2933 | <&cpg CPG_MOD 722>; |
| 2934 | clock-names = "du.0", "du.1", "du.2"; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2935 | resets = <&cpg 724>, <&cpg 722>; |
| 2936 | reset-names = "du.0", "du.2"; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2937 | |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2938 | renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>; |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2939 | renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 2940 | |
| 2941 | status = "disabled"; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2942 | |
| 2943 | ports { |
| 2944 | #address-cells = <1>; |
| 2945 | #size-cells = <0>; |
| 2946 | |
| 2947 | port@0 { |
| 2948 | reg = <0>; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2949 | }; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2950 | port@1 { |
| 2951 | reg = <1>; |
| 2952 | du_out_hdmi0: endpoint { |
| 2953 | remote-endpoint = <&dw_hdmi0_in>; |
| 2954 | }; |
| 2955 | }; |
| 2956 | port@2 { |
| 2957 | reg = <2>; |
| 2958 | du_out_lvds0: endpoint { |
Marek Vasut | fde558e | 2019-03-04 22:53:28 +0100 | [diff] [blame] | 2959 | remote-endpoint = <&lvds0_in>; |
| 2960 | }; |
| 2961 | }; |
| 2962 | }; |
| 2963 | }; |
| 2964 | |
| 2965 | lvds0: lvds@feb90000 { |
| 2966 | compatible = "renesas,r8a7796-lvds"; |
| 2967 | reg = <0 0xfeb90000 0 0x14>; |
| 2968 | clocks = <&cpg CPG_MOD 727>; |
| 2969 | power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; |
| 2970 | resets = <&cpg 727>; |
| 2971 | status = "disabled"; |
| 2972 | |
| 2973 | ports { |
| 2974 | #address-cells = <1>; |
| 2975 | #size-cells = <0>; |
| 2976 | |
| 2977 | port@0 { |
| 2978 | reg = <0>; |
| 2979 | lvds0_in: endpoint { |
| 2980 | remote-endpoint = <&du_out_lvds0>; |
| 2981 | }; |
| 2982 | }; |
| 2983 | port@1 { |
| 2984 | reg = <1>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2985 | }; |
Marek Vasut | 36f83d9 | 2017-09-12 23:01:51 +0200 | [diff] [blame] | 2986 | }; |
| 2987 | }; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2988 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 2989 | prr: chipid@fff00044 { |
| 2990 | compatible = "renesas,prr"; |
| 2991 | reg = <0 0xfff00044 0 4>; |
Marek Vasut | 07efb45 | 2017-11-29 04:27:36 +0100 | [diff] [blame] | 2992 | }; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 2993 | }; |
| 2994 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 2995 | thermal-zones { |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 2996 | sensor1_thermal: sensor1-thermal { |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 2997 | polling-delay-passive = <250>; |
| 2998 | polling-delay = <1000>; |
| 2999 | thermal-sensors = <&tsc 0>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 3000 | sustainable-power = <3874>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3001 | |
| 3002 | trips { |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3003 | sensor1_crit: sensor1-crit { |
| 3004 | temperature = <120000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 3005 | hysteresis = <1000>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3006 | type = "critical"; |
| 3007 | }; |
| 3008 | }; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3009 | }; |
| 3010 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 3011 | sensor2_thermal: sensor2-thermal { |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3012 | polling-delay-passive = <250>; |
| 3013 | polling-delay = <1000>; |
| 3014 | thermal-sensors = <&tsc 1>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 3015 | sustainable-power = <3874>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3016 | |
| 3017 | trips { |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3018 | sensor2_crit: sensor2-crit { |
| 3019 | temperature = <120000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 3020 | hysteresis = <1000>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3021 | type = "critical"; |
| 3022 | }; |
| 3023 | }; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3024 | }; |
| 3025 | |
Marek Vasut | 2a8450f | 2023-01-26 21:01:32 +0100 | [diff] [blame] | 3026 | sensor3_thermal: sensor3-thermal { |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3027 | polling-delay-passive = <250>; |
| 3028 | polling-delay = <1000>; |
| 3029 | thermal-sensors = <&tsc 2>; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 3030 | sustainable-power = <3874>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3031 | |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 3032 | cooling-maps { |
| 3033 | map0 { |
| 3034 | trip = <&target>; |
| 3035 | cooling-device = <&a57_0 2 4>; |
| 3036 | contribution = <1024>; |
| 3037 | }; |
| 3038 | map1 { |
| 3039 | trip = <&target>; |
| 3040 | cooling-device = <&a53_0 0 2>; |
| 3041 | contribution = <1024>; |
| 3042 | }; |
| 3043 | }; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3044 | trips { |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 3045 | target: trip-point1 { |
| 3046 | temperature = <100000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 3047 | hysteresis = <1000>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3048 | type = "passive"; |
| 3049 | }; |
Marek Vasut | adaa016 | 2020-04-04 16:12:48 +0200 | [diff] [blame] | 3050 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3051 | sensor3_crit: sensor3-crit { |
| 3052 | temperature = <120000>; |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 3053 | hysteresis = <1000>; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3054 | type = "critical"; |
| 3055 | }; |
| 3056 | }; |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3057 | }; |
| 3058 | }; |
| 3059 | |
Marek Vasut | ab9fbe9 | 2018-12-03 21:43:05 +0100 | [diff] [blame] | 3060 | timer { |
| 3061 | compatible = "arm,armv8-timer"; |
| 3062 | interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, |
| 3063 | <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, |
| 3064 | <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, |
| 3065 | <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; |
| 3066 | }; |
| 3067 | |
Marek Vasut | 051a526 | 2018-06-06 20:03:30 +0200 | [diff] [blame] | 3068 | /* External USB clocks - can be overridden by the board */ |
| 3069 | usb3s0_clk: usb3s0 { |
| 3070 | compatible = "fixed-clock"; |
| 3071 | #clock-cells = <0>; |
| 3072 | clock-frequency = <0>; |
| 3073 | }; |
| 3074 | |
| 3075 | usb_extal_clk: usb_extal { |
| 3076 | compatible = "fixed-clock"; |
| 3077 | #clock-cells = <0>; |
| 3078 | clock-frequency = <0>; |
Marek Vasut | b938f38 | 2017-07-21 23:16:59 +0200 | [diff] [blame] | 3079 | }; |
| 3080 | }; |