| Gregory CLEMENT | af05ee5 | 2018-12-14 16:16:47 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | |
| 3 | menu "MSCC VCore-III platforms" |
| 4 | depends on ARCH_MSCC |
| 5 | |
| 6 | config SOC_VCOREIII |
| 7 | select MIPS_TUNE_24KC |
| 8 | select ROM_EXCEPTION_VECTORS |
| 9 | select SUPPORTS_BIG_ENDIAN |
| 10 | select SUPPORTS_CPU_MIPS32_R1 |
| 11 | select SUPPORTS_CPU_MIPS32_R2 |
| 12 | select SUPPORTS_LITTLE_ENDIAN |
| 13 | bool |
| 14 | |
| 15 | config SYS_SOC |
| 16 | default "mscc" |
| 17 | |
| Lars Povlsen | 9039282 | 2018-12-20 09:56:05 +0100 | [diff] [blame] | 18 | choice |
| 19 | |
| 20 | prompt "SOC Family Variant" |
| 21 | |
| Gregory CLEMENT | af05ee5 | 2018-12-14 16:16:47 +0100 | [diff] [blame] | 22 | config SOC_OCELOT |
| Lars Povlsen | 9039282 | 2018-12-20 09:56:05 +0100 | [diff] [blame] | 23 | bool "Ocelot SOC Family" |
| Gregory CLEMENT | af05ee5 | 2018-12-14 16:16:47 +0100 | [diff] [blame] | 24 | select SOC_VCOREIII |
| Lars Povlsen | 9039282 | 2018-12-20 09:56:05 +0100 | [diff] [blame] | 25 | select DESIGNWARE_SPI |
| Gregory CLEMENT | af05ee5 | 2018-12-14 16:16:47 +0100 | [diff] [blame] | 26 | help |
| 27 | This supports MSCC Ocelot family of SOCs. |
| 28 | |
| Gregory CLEMENT | 819b5721 | 2018-12-14 16:16:48 +0100 | [diff] [blame] | 29 | config SOC_LUTON |
| Lars Povlsen | 9039282 | 2018-12-20 09:56:05 +0100 | [diff] [blame] | 30 | bool "Luton SOC Family" |
| Gregory CLEMENT | 819b5721 | 2018-12-14 16:16:48 +0100 | [diff] [blame] | 31 | select SOC_VCOREIII |
| 32 | help |
| 33 | This supports MSCC Luton family of SOCs. |
| 34 | |
| Horatiu Vultur | 8a22b88 | 2019-01-12 18:56:56 +0100 | [diff] [blame] | 35 | config SOC_JR2 |
| 36 | bool "Jaguar2 SOC Family" |
| 37 | select SOC_VCOREIII |
| 38 | select DESIGNWARE_SPI |
| 39 | help |
| 40 | This supports MSCC Jaguar2 family of SOCs. |
| 41 | |
| Horatiu Vultur | c15620a | 2019-01-17 15:33:27 +0100 | [diff] [blame] | 42 | config SOC_SERVALT |
| 43 | bool "Servalt SOC Family" |
| 44 | select SOC_VCOREIII |
| 45 | select MSCC_BB_SPI |
| 46 | help |
| 47 | This supports MSCC Servalt family of SOCs. |
| 48 | |
| Horatiu Vultur | 914e787 | 2019-01-23 16:39:42 +0100 | [diff] [blame] | 49 | config SOC_SERVAL |
| 50 | bool "Serval SOC Family" |
| 51 | select SOC_VCOREIII |
| 52 | select MSCC_BB_SPI |
| 53 | help |
| 54 | This supports MSCC Serval family of SOCs. |
| 55 | |
| Lars Povlsen | 9039282 | 2018-12-20 09:56:05 +0100 | [diff] [blame] | 56 | endchoice |
| 57 | |
| Gregory CLEMENT | af05ee5 | 2018-12-14 16:16:47 +0100 | [diff] [blame] | 58 | config SYS_CONFIG_NAME |
| 59 | default "vcoreiii" |
| 60 | |
| 61 | choice |
| Gregory CLEMENT | af05ee5 | 2018-12-14 16:16:47 +0100 | [diff] [blame] | 62 | prompt "DDR type" |
| 63 | |
| 64 | config DDRTYPE_H5TQ4G63MFR |
| 65 | bool "Hynix H5TQ4G63MFR-PBC (4Gbit, DDR3-800, 256Mbitx16)" |
| 66 | |
| 67 | config DDRTYPE_MT41K256M16 |
| 68 | bool "Micron MT41K256M16 (4Gbit, DDR3L-800, 256Mbitx16)" |
| 69 | |
| 70 | config DDRTYPE_H5TQ1G63BFA |
| 71 | bool "Hynix H5TQ1G63BFA (1Gbit DDR3, x16)" |
| 72 | |
| 73 | config DDRTYPE_MT41J128M16HA |
| 74 | bool "Micron MT41J128M16HA-15E:D (2Gbit DDR3, x16)" |
| 75 | |
| 76 | config DDRTYPE_MT41K128M16JT |
| 77 | bool "Micron MT41K128M16JT-125 (2Gbit DDR3L, 128Mbitx16)" |
| 78 | |
| 79 | config DDRTYPE_MT47H128M8HQ |
| 80 | bool "Micron MT47H128M8-3 (1Gbit, DDR-533@CL4 @ 4.80ns 16Mbisx8x8)" |
| 81 | |
| 82 | endchoice |
| 83 | |
| Gregory CLEMENT | b622f8f | 2018-12-14 16:16:49 +0100 | [diff] [blame] | 84 | source "board/mscc/ocelot/Kconfig" |
| 85 | |
| Gregory CLEMENT | dc253e2 | 2018-12-14 16:16:50 +0100 | [diff] [blame] | 86 | source "board/mscc/luton/Kconfig" |
| 87 | |
| Horatiu Vultur | 8a22b88 | 2019-01-12 18:56:56 +0100 | [diff] [blame] | 88 | source "board/mscc/jr2/Kconfig" |
| 89 | |
| Horatiu Vultur | c15620a | 2019-01-17 15:33:27 +0100 | [diff] [blame] | 90 | source "board/mscc/servalt/Kconfig" |
| Horatiu Vultur | 914e787 | 2019-01-23 16:39:42 +0100 | [diff] [blame] | 91 | |
| 92 | source "board/mscc/serval/Kconfig" |
| Gregory CLEMENT | af05ee5 | 2018-12-14 16:16:47 +0100 | [diff] [blame] | 93 | endmenu |