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Robert Markoe4b17a72020-10-08 22:05:09 +02001Qualcomm QUP SPI controller Device Tree Bindings
2-------------------------------------------
3
4Required properties:
5- compatible : Should be "qcom,spi-qup-v1.1.1", "qcom,spi-qup-v2.1.1"
6 or "qcom,spi-qup-v2.2.1"
7- reg : Physical base address and size of SPI registers map.
8- clock : Clock phandle (see clock bindings for details).
9- #address-cells : Number of cells required to define a chip select
Wolfgang Denk62fb2b42021-09-27 17:42:39 +020010 address on the SPI bus. Should be set to 1.
Robert Markoe4b17a72020-10-08 22:05:09 +020011- #size-cells : Should be zero.
12- pinctrl-names : Must be "default"
13- pinctrl-n : At least one pinctrl phandle
14- cs-gpios : Should specify GPIOs used for chipselects.
15 The gpios will be referred to as reg = <index> in the
16 SPI child nodes.
17
18Optional properties:
19- num-cs : total number of chipselects
20
21Example:
22
23 blsp1_spi1: spi@78b5000 {
24 compatible = "qcom,spi-qup-v2.2.1";
25 reg = <0x78b5000 0x600>;
26 clock = <&gcc 23>;
27 #address-cells = <1>;
28 #size-cells = <0>;
29 pinctrl-names = "spi";
30 pinctrl-0 = <&blsp_spi0>;
31 num-cs = <2>;
32 cs-gpios = <&soc_gpios 54 GPIO_ACTIVE_HIGH>, <&soc_gpios 4 GPIO_ACTIVE_HIGH>;
33 };