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Sergey Kubushyne8f39122007-08-10 20:26:18 +02001/*
2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
17 * MA 02111-1307 USA
18 */
19
20#ifndef __CONFIG_H
21#define __CONFIG_H
Sergey Kubushyne8f39122007-08-10 20:26:18 +020022
23/*
24 * Define this to make U-Boot skip low level initialization when loaded
25 * by initial bootloader. Not required by NAND U-Boot version but IS
26 * required for a NOR version used to burn the real NOR U-Boot into
27 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
28 * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
29 * NOR U-Boot is loaded directly from Flash so it must perform all the
30 * low level initialization itself. NAND version is loaded by an initial
31 * bootloader (UBL in TI-ese) that performs such an initialization so it's
32 * skipped in NAND version. The third DaVinci boot mode loads a bootloader
33 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
34 * performing low level init prior to loading. All that means we can NOT use
35 * NAND version to put U-Boot into NOR because it doesn't have NOR support and
36 * we can NOT use NOR version because it performs low level initialization
37 * effectively destroying itself in DDR memory. That's why a separate NOR
38 * version with this define is needed. It is loaded via UART, then one uses
39 * it to somehow download a proper NOR version built WITHOUT this define to
40 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
41 * NOR support into the initial bootloader so it won't be needed but DaVinci
42 * static RAM might be too small for this (I have something like 2Kbytes left
43 * as of now, without NOR support) so this might've not happened...
44 *
45#define CONFIG_NOR_UART_BOOT
46 */
47
48/*=======*/
49/* Board */
50/*=======*/
51#define DV_EVM
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#define CONFIG_SYS_NAND_SMALLPAGE
Sandeep Paulrajc492a7d2010-12-11 10:47:30 -050053#define CONFIG_SYS_USE_NAND
David Brownell45064002009-05-15 23:47:12 +020054#define CONFIG_DISPLAY_CPUINFO
Sergey Kubushyne8f39122007-08-10 20:26:18 +020055/*===================*/
56/* SoC Configuration */
57/*===================*/
58#define CONFIG_ARM926EJS /* arm926ejs CPU core */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020059#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */
60#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */
61#define CONFIG_SYS_HZ 1000
David Brownell5f02add2009-05-15 23:44:08 +020062#define CONFIG_SOC_DM644X
Nagabhushana Netagunte17639f32011-09-03 22:12:56 -040063#define CONFIG_SYS_ICACHE_OFF
64#define CONFIG_SYS_DCACHE_OFF
65#define CONFIG_SYS_L2CACHE_OFF
Sergey Kubushyne8f39122007-08-10 20:26:18 +020066/*====================================================*/
67/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
68/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
69/*====================================================*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020070#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
71#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
72#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
73#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
Sergey Kubushyne8f39122007-08-10 20:26:18 +020074/*=============*/
75/* Memory Info */
76/*=============*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020077#define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020078#define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */
79#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */
Sergey Kubushyne8f39122007-08-10 20:26:18 +020080#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
81#define CONFIG_STACKSIZE (256*1024) /* regular stack */
82#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
83#define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */
Sandeep Paulrajc492a7d2010-12-11 10:47:30 -050084
Sergey Kubushyne8f39122007-08-10 20:26:18 +020085#define DDR_8BANKS /* 8-bank DDR2 (256MB) */
86/*====================*/
87/* Serial Driver info */
88/*====================*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020089#define CONFIG_SYS_NS16550
90#define CONFIG_SYS_NS16550_SERIAL
David Brownellfedd22d2009-04-12 15:38:06 -070091#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020092#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */
David Brownell1fc59072009-04-12 15:40:16 -070093#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */
Sergey Kubushyne8f39122007-08-10 20:26:18 +020094#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
95#define CONFIG_BAUDRATE 115200 /* Default baud rate */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020096#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
Sergey Kubushyne8f39122007-08-10 20:26:18 +020097/*===================*/
98/* I2C Configuration */
99/*===================*/
100#define CONFIG_HARD_I2C
101#define CONFIG_DRIVER_DAVINCI_I2C
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200102#define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
103#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200104/*==================================*/
105/* Network & Ethernet Configuration */
106/*==================================*/
107#define CONFIG_DRIVER_TI_EMAC
Prakash PMc458d492010-06-22 10:24:43 -0400108#define CONFIG_EMAC_MDIO_PHY_NUM 1
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200109#define CONFIG_MII
110#define CONFIG_BOOTP_DEFAULT
111#define CONFIG_BOOTP_DNS
112#define CONFIG_BOOTP_DNS2
113#define CONFIG_BOOTP_SEND_HOSTNAME
114#define CONFIG_NET_RETRY_COUNT 10
Ben Warren5301bbf2009-05-26 00:34:07 -0700115#define CONFIG_NET_MULTI
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200116/*=====================*/
117/* Flash & Environment */
118/*=====================*/
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200119#ifdef CONFIG_SYS_USE_NAND
Jean-Christophe PLAGNIOL-VILLARDf6812502009-03-30 18:58:39 +0200120#define CONFIG_NAND_DAVINCI
Nick Thompson789c8872009-12-12 12:12:26 -0500121#define CONFIG_SYS_NAND_CS 2
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200122#undef CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200123#define CONFIG_SYS_NO_FLASH
Jean-Christophe PLAGNIOL-VILLARDdda84dd2008-09-10 22:47:58 +0200124#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200125#ifdef CONFIG_SYS_NAND_SMALLPAGE
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200126#define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */
Sandeep Paulraj391d1a62009-09-08 17:09:52 -0400127#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
David Brownell451af0a2009-05-15 23:47:13 +0200128#define CONFIG_MTD_PARTITIONS
Sandeep Paulraj7533bc02009-09-09 15:26:00 -0400129#define CONFIG_MTD_DEVICE
David Brownell451af0a2009-05-15 23:47:13 +0200130#define CONFIG_CMD_MTDPARTS
131#define MTDIDS_DEFAULT \
132 "nand0=davinci_nand.0"
133#define MTDPARTS_DEFAULT \
134 "mtdparts=davinci_nand.0:384k(bootloader)ro,4m(kernel),-(filesystem)"
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200135#else
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200136#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */
Sandeep Paulraj391d1a62009-09-08 17:09:52 -0400137#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200138#endif
139#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200140#define CONFIG_SYS_NAND_BASE 0x02000000
David Brownell451af0a2009-05-15 23:47:13 +0200141#define CONFIG_SYS_NAND_USE_FLASH_BBT
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200142#define CONFIG_SYS_NAND_HW_ECC
143#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200144#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200145#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200146#ifdef CONFIG_NOR_UART_BOOT
147#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200148#else
149#undef CONFIG_SKIP_LOWLEVEL_INIT
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200150#endif
Jean-Christophe PLAGNIOL-VILLARD53db4cd2008-09-10 22:48:04 +0200151#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200152#undef CONFIG_SYS_NO_FLASH
Jean-Christophe PLAGNIOL-VILLARD8d94c232008-08-13 01:40:42 +0200153#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200154#define CONFIG_SYS_FLASH_CFI
155#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
156#define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* 64KB sect size AMD Flash */
157#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3)
Wolfgang Denka1be4762008-05-20 16:00:29 +0200158#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200159#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
Wolfgang Denka1be4762008-05-20 16:00:29 +0200160#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200161#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
162#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200163#endif
164/*==============================*/
165/* U-Boot general configuration */
166/*==============================*/
Wolfgang Denka1be4762008-05-20 16:00:29 +0200167#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200168#define CONFIG_MISC_INIT_R
Wolfgang Denka48499f2008-04-11 15:11:26 +0200169#undef CONFIG_BOOTDELAY
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200170#define CONFIG_BOOTFILE "uImage" /* Boot file name */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200171#define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */
172#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
173#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */
174#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
175#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
176#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200177#define CONFIG_VERSION_VARIABLE
178#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200179#define CONFIG_SYS_HUSH_PARSER
180#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200181#define CONFIG_CMDLINE_EDITING
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200182#define CONFIG_SYS_LONGHELP
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200183#define CONFIG_CRC32_VERIFY
184#define CONFIG_MX_CYCLIC
Thomas Abraham08658a82009-01-04 09:41:20 +0530185#define CONFIG_MUSB_HCD
186#define CONFIG_USB_DAVINCI
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200187/*===================*/
188/* Linux Information */
189/*===================*/
190#define LINUX_BOOT_PARAM_ADDR 0x80000100
191#define CONFIG_CMDLINE_TAG
192#define CONFIG_SETUP_MEMORY_TAGS
193#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
194#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000"
195/*=================*/
196/* U-Boot commands */
197/*=================*/
198#include <config_cmd_default.h>
199#define CONFIG_CMD_ASKENV
200#define CONFIG_CMD_DHCP
201#define CONFIG_CMD_DIAG
202#define CONFIG_CMD_I2C
203#define CONFIG_CMD_MII
204#define CONFIG_CMD_PING
205#define CONFIG_CMD_SAVES
206#define CONFIG_CMD_EEPROM
207#undef CONFIG_CMD_BDI
208#undef CONFIG_CMD_FPGA
209#undef CONFIG_CMD_SETGETDCR
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200210#ifdef CONFIG_SYS_USE_NAND
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200211#undef CONFIG_CMD_FLASH
212#undef CONFIG_CMD_IMLS
213#define CONFIG_CMD_NAND
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200214#elif defined(CONFIG_SYS_USE_NOR)
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200215#define CONFIG_CMD_JFFS2
216#else
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200217#error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!"
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200218#endif
Thomas Abraham08658a82009-01-04 09:41:20 +0530219/*==========================*/
220/* USB MSC support (if any) */
221/*==========================*/
222#ifdef CONFIG_USB_DAVINCI
223#define CONFIG_CMD_USB
224#ifdef CONFIG_MUSB_HCD
225#define CONFIG_USB_STORAGE
226#define CONFIG_CMD_STORAGE
227#define CONFIG_CMD_FAT
228#define CONFIG_DOS_PARTITION
229#endif
230#ifdef CONFIG_USB_KEYBOARD
231#define CONFIG_SYS_USB_EVENT_POLL
232#define CONFIG_PREBOOT "usb start"
233#endif
234#endif
Sandeep Paulrajc492a7d2010-12-11 10:47:30 -0500235
236#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */
237
238#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
239#define CONFIG_SYS_INIT_RAM_SIZE 0x1000
240#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \
241 CONFIG_SYS_INIT_RAM_SIZE - \
242 GENERATED_GBL_DATA_SIZE)
243
Sergey Kubushyne8f39122007-08-10 20:26:18 +0200244#endif /* __CONFIG_H */