| Paul Kocialkowski | 368beeb | 2015-07-15 16:02:24 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * OMAP3 boot |
| 3 | * |
| 4 | * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr> |
| 5 | * |
| 6 | * SPDX-License-Identifier: GPL-2.0+ |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <asm/io.h> |
| 11 | #include <asm/arch/sys_proto.h> |
| 12 | #include <spl.h> |
| 13 | |
| 14 | static u32 boot_devices[] = { |
| 15 | BOOT_DEVICE_ONENAND, |
| 16 | BOOT_DEVICE_NAND, |
| 17 | BOOT_DEVICE_ONENAND, |
| 18 | BOOT_DEVICE_MMC2, |
| 19 | BOOT_DEVICE_ONENAND, |
| 20 | BOOT_DEVICE_MMC2, |
| 21 | BOOT_DEVICE_MMC1, |
| 22 | BOOT_DEVICE_XIP, |
| 23 | BOOT_DEVICE_XIPWAIT, |
| 24 | BOOT_DEVICE_MMC2, |
| 25 | BOOT_DEVICE_XIP, |
| 26 | BOOT_DEVICE_XIPWAIT, |
| 27 | BOOT_DEVICE_NAND, |
| 28 | BOOT_DEVICE_XIP, |
| 29 | BOOT_DEVICE_XIPWAIT, |
| 30 | BOOT_DEVICE_NAND, |
| 31 | BOOT_DEVICE_ONENAND, |
| 32 | BOOT_DEVICE_MMC2, |
| 33 | BOOT_DEVICE_MMC1, |
| 34 | BOOT_DEVICE_XIP, |
| 35 | BOOT_DEVICE_XIPWAIT, |
| 36 | BOOT_DEVICE_NAND, |
| 37 | BOOT_DEVICE_ONENAND, |
| 38 | BOOT_DEVICE_MMC2, |
| 39 | BOOT_DEVICE_MMC1, |
| 40 | BOOT_DEVICE_XIP, |
| 41 | BOOT_DEVICE_XIPWAIT, |
| 42 | BOOT_DEVICE_NAND, |
| 43 | BOOT_DEVICE_MMC2_2, |
| 44 | }; |
| 45 | |
| 46 | u32 omap_sys_boot_device(void) |
| 47 | { |
| 48 | struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; |
| 49 | u32 sys_boot; |
| 50 | |
| 51 | /* Grab the first 5 bits of the status register for SYS_BOOT. */ |
| 52 | sys_boot = readl(&ctrl_base->status) & ((1 << 5) - 1); |
| 53 | |
| 54 | if (sys_boot >= (sizeof(boot_devices) / sizeof(u32))) |
| 55 | return BOOT_DEVICE_NONE; |
| 56 | |
| 57 | return boot_devices[sys_boot]; |
| 58 | } |